dataMonitoring.h 2.2 KB

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  1. /*
  2. * Table of the DAVINCI register configurations for the PINMUX combinations
  3. *
  4. * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
  5. *
  6. * Based on linux/include/asm-arm/arch-omap/mux.h:
  7. * Copyright (C) 2003 - 2005 Nokia Corporation
  8. *
  9. * Written by Tony Lindgren
  10. *
  11. * 2007 (c) MontaVista Software, Inc. This file is licensed under
  12. * the terms of the GNU General Public License version 2. This program
  13. * is licensed "as is" without any warranty of any kind, whether express
  14. * or implied.
  15. *
  16. * Copyright (C) 2008 Texas Instruments.
  17. */
  18. #ifndef __INC_MACH_MUX_H
  19. #define __INC_MACH_MUX_H
  20. struct mux_config {
  21. const char *name;
  22. const char *mux_reg_name;
  23. const unsigned char mux_reg;
  24. const unsigned char mask_offset;
  25. const unsigned char mask;
  26. const unsigned char mode;
  27. bool debug;
  28. };
  29. enum davinci_dm644x_index {
  30. /* ATA and HDDIR functions */
  31. DM644X_HDIREN,
  32. DM644X_ATAEN,
  33. DM644X_ATAEN_DISABLE,
  34. /* HPI functions */
  35. DM644X_HPIEN_DISABLE,
  36. /* AEAW functions */
  37. DM644X_AEAW,
  38. DM644X_AEAW0,
  39. DM644X_AEAW1,
  40. DM644X_AEAW2,
  41. DM644X_AEAW3,
  42. DM644X_AEAW4,
  43. /* Memory Stick */
  44. DM644X_MSTK,
  45. /* I2C */
  46. DM644X_I2C,
  47. /* ASP function */
  48. DM644X_MCBSP,
  49. /* UART1 */
  50. DM644X_UART1,
  51. /* UART2 */
  52. DM644X_UART2,
  53. /* PWM0 */
  54. DM644X_PWM0,
  55. /* PWM1 */
  56. DM644X_PWM1,
  57. /* PWM2 */
  58. DM644X_PWM2,
  59. /* VLYNQ function */
  60. DM644X_VLYNQEN,
  61. DM644X_VLSCREN,
  62. DM644X_VLYNQWD,
  63. /* EMAC and MDIO function */
  64. DM644X_EMACEN,
  65. /* GPIO3V[0:16] pins */
  66. DM644X_GPIO3V,
  67. /* GPIO pins */
  68. DM644X_GPIO0,
  69. DM644X_GPIO3,
  70. DM644X_GPIO43_44,
  71. DM644X_GPIO46_47,
  72. /* VPBE */
  73. DM644X_RGB666,
  74. /* LCD */
  75. DM644X_LOEEN,
  76. DM644X_LFLDEN,
  77. };
  78. enum davinci_dm646x_index {
  79. /* ATA function */
  80. DM646X_ATAEN,
  81. /* AUDIO Clock */
  82. DM646X_AUDCK1,
  83. DM646X_AUDCK0,
  84. /* CRGEN Control */
  85. DM646X_CRGMUX,
  86. /* VPIF Control */
  87. DM646X_STSOMUX_DISABLE,
  88. DM646X_STSIMUX_DISABLE,
  89. DM646X_PTSOMUX_DISABLE,
  90. DM646X_PTSIMUX_DISABLE,
  91. /* TSIF Control */
  92. DM646X_STSOMUX,
  93. DM646X_STSIMUX,
  94. DM646X_PTSOMUX_PARALLEL,
  95. DM646X_PTSIMUX_PARALLEL,
  96. DM646X_PTSOMUX_SERIAL,
  97. DM646X_PTSIMUX_SERIAL,
  98. };
  99. enum davinci_dm355_index {
  100. /* MMC/SD 0 */
  101. DM355_MMCSD0,
  102. /* MMC/SD 1 */
  103. DM355_SD1_CLK,
  104. DM355_SD1_CMD,
  105. DM355_SD1_DATA3,
  106. DM355_SD1_DATA2,
  107. DM355_SD1_DATA1,
  108. DM355_SD1_DATA0,
  109. /* I2C */
  110. DM355_I2C_SDA,