| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661 | /* * arch/arm/mach-at91/at91sam9260_devices.c * *  Copyright (C) 2006 Atmel * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * */#include <asm/mach/arch.h>#include <asm/mach/map.h>#include <linux/dma-mapping.h>#include <linux/gpio.h>#include <linux/platform_device.h>#include <linux/i2c-gpio.h>#include <linux/platform_data/at91_adc.h>#include <mach/cpu.h>#include <mach/at91sam9260.h>#include <mach/at91sam9260_matrix.h>#include <mach/at91_matrix.h>#include <mach/at91sam9_smc.h>#include <mach/at91_adc.h>#include "board.h"#include "generic.h"/* -------------------------------------------------------------------- *  USB Host * -------------------------------------------------------------------- */#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)static u64 ohci_dmamask = DMA_BIT_MASK(32);static struct at91_usbh_data usbh_data;static struct resource usbh_resources[] = {	[0] = {		.start	= AT91SAM9260_UHP_BASE,		.end	= AT91SAM9260_UHP_BASE + SZ_1M - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,		.flags	= IORESOURCE_IRQ,	},};static struct platform_device at91_usbh_device = {	.name		= "at91_ohci",	.id		= -1,	.dev		= {				.dma_mask		= &ohci_dmamask,				.coherent_dma_mask	= DMA_BIT_MASK(32),				.platform_data		= &usbh_data,	},	.resource	= usbh_resources,	.num_resources	= ARRAY_SIZE(usbh_resources),};void __init at91_add_device_usbh(struct at91_usbh_data *data){	int i;	if (!data)		return;	/* Enable overcurrent notification */	for (i = 0; i < data->ports; i++) {		if (gpio_is_valid(data->overcurrent_pin[i]))			at91_set_gpio_input(data->overcurrent_pin[i], 1);	}	usbh_data = *data;	platform_device_register(&at91_usbh_device);}#elsevoid __init at91_add_device_usbh(struct at91_usbh_data *data) {}#endif/* -------------------------------------------------------------------- *  USB Device (Gadget) * -------------------------------------------------------------------- */#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)static struct at91_udc_data udc_data;static struct resource udc_resources[] = {	[0] = {		.start	= AT91SAM9260_BASE_UDP,		.end	= AT91SAM9260_BASE_UDP + SZ_16K - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,		.flags	= IORESOURCE_IRQ,	},};static struct platform_device at91_udc_device = {	.name		= "at91_udc",	.id		= -1,	.dev		= {				.platform_data		= &udc_data,	},	.resource	= udc_resources,	.num_resources	= ARRAY_SIZE(udc_resources),};void __init at91_add_device_udc(struct at91_udc_data *data){	if (!data)		return;	if (gpio_is_valid(data->vbus_pin)) {		at91_set_gpio_input(data->vbus_pin, 0);		at91_set_deglitch(data->vbus_pin, 1);	}	/* Pullup pin is handled internally by USB device peripheral */	udc_data = *data;	platform_device_register(&at91_udc_device);}#elsevoid __init at91_add_device_udc(struct at91_udc_data *data) {}#endif/* -------------------------------------------------------------------- *  Ethernet * -------------------------------------------------------------------- */#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)static u64 eth_dmamask = DMA_BIT_MASK(32);static struct macb_platform_data eth_data;static struct resource eth_resources[] = {	[0] = {		.start	= AT91SAM9260_BASE_EMAC,		.end	= AT91SAM9260_BASE_EMAC + SZ_16K - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,		.flags	= IORESOURCE_IRQ,	},};static struct platform_device at91sam9260_eth_device = {	.name		= "macb",	.id		= -1,	.dev		= {				.dma_mask		= ð_dmamask,				.coherent_dma_mask	= DMA_BIT_MASK(32),				.platform_data		= ð_data,	},	.resource	= eth_resources,	.num_resources	= ARRAY_SIZE(eth_resources),};void __init at91_add_device_eth(struct macb_platform_data *data){	if (!data)		return;	if (gpio_is_valid(data->phy_irq_pin)) {		at91_set_gpio_input(data->phy_irq_pin, 0);		at91_set_deglitch(data->phy_irq_pin, 1);	}	/* Pins used for MII and RMII */	at91_set_A_periph(AT91_PIN_PA19, 0);	/* ETXCK_EREFCK */	at91_set_A_periph(AT91_PIN_PA17, 0);	/* ERXDV */	at91_set_A_periph(AT91_PIN_PA14, 0);	/* ERX0 */	at91_set_A_periph(AT91_PIN_PA15, 0);	/* ERX1 */	at91_set_A_periph(AT91_PIN_PA18, 0);	/* ERXER */	at91_set_A_periph(AT91_PIN_PA16, 0);	/* ETXEN */	at91_set_A_periph(AT91_PIN_PA12, 0);	/* ETX0 */	at91_set_A_periph(AT91_PIN_PA13, 0);	/* ETX1 */	at91_set_A_periph(AT91_PIN_PA21, 0);	/* EMDIO */	at91_set_A_periph(AT91_PIN_PA20, 0);	/* EMDC */	if (!data->is_rmii) {		at91_set_B_periph(AT91_PIN_PA28, 0);	/* ECRS */		at91_set_B_periph(AT91_PIN_PA29, 0);	/* ECOL */		at91_set_B_periph(AT91_PIN_PA25, 0);	/* ERX2 */		at91_set_B_periph(AT91_PIN_PA26, 0);	/* ERX3 */		at91_set_B_periph(AT91_PIN_PA27, 0);	/* ERXCK */		at91_set_B_periph(AT91_PIN_PA23, 0);	/* ETX2 */		at91_set_B_periph(AT91_PIN_PA24, 0);	/* ETX3 */		at91_set_B_periph(AT91_PIN_PA22, 0);	/* ETXER */	}	eth_data = *data;	platform_device_register(&at91sam9260_eth_device);}#elsevoid __init at91_add_device_eth(struct macb_platform_data *data) {}#endif/* -------------------------------------------------------------------- *  MMC / SD Slot for Atmel MCI Driver * -------------------------------------------------------------------- */#if IS_ENABLED(CONFIG_MMC_ATMELMCI)static u64 mmc_dmamask = DMA_BIT_MASK(32);static struct mci_platform_data mmc_data;static struct resource mmc_resources[] = {	[0] = {		.start	= AT91SAM9260_BASE_MCI,		.end	= AT91SAM9260_BASE_MCI + SZ_16K - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,		.flags	= IORESOURCE_IRQ,	},};static struct platform_device at91sam9260_mmc_device = {	.name		= "atmel_mci",	.id		= -1,	.dev		= {				.dma_mask		= &mmc_dmamask,				.coherent_dma_mask	= DMA_BIT_MASK(32),				.platform_data		= &mmc_data,	},	.resource	= mmc_resources,	.num_resources	= ARRAY_SIZE(mmc_resources),};void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data){	unsigned int i;	unsigned int slot_count = 0;	if (!data)		return;	for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {		if (data->slot[i].bus_width) {			/* input/irq */			if (gpio_is_valid(data->slot[i].detect_pin)) {				at91_set_gpio_input(data->slot[i].detect_pin, 1);				at91_set_deglitch(data->slot[i].detect_pin, 1);			}			if (gpio_is_valid(data->slot[i].wp_pin))				at91_set_gpio_input(data->slot[i].wp_pin, 1);			switch (i) {			case 0:				/* CMD */				at91_set_A_periph(AT91_PIN_PA7, 1);				/* DAT0, maybe DAT1..DAT3 */				at91_set_A_periph(AT91_PIN_PA6, 1);				if (data->slot[i].bus_width == 4) {					at91_set_A_periph(AT91_PIN_PA9, 1);					at91_set_A_periph(AT91_PIN_PA10, 1);					at91_set_A_periph(AT91_PIN_PA11, 1);				}				slot_count++;				break;			case 1:				/* CMD */				at91_set_B_periph(AT91_PIN_PA1, 1);				/* DAT0, maybe DAT1..DAT3 */				at91_set_B_periph(AT91_PIN_PA0, 1);				if (data->slot[i].bus_width == 4) {					at91_set_B_periph(AT91_PIN_PA5, 1);					at91_set_B_periph(AT91_PIN_PA4, 1);					at91_set_B_periph(AT91_PIN_PA3, 1);				}				slot_count++;				break;			default:				printk(KERN_ERR					"AT91: SD/MMC slot %d not available\n", i);				break;			}		}	}	if (slot_count) {		/* CLK */		at91_set_A_periph(AT91_PIN_PA8, 0);		mmc_data = *data;		platform_device_register(&at91sam9260_mmc_device);	}}#elsevoid __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}#endif/* -------------------------------------------------------------------- *  NAND / SmartMedia * -------------------------------------------------------------------- */#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)static struct atmel_nand_data nand_data;#define NAND_BASE	AT91_CHIPSELECT_3static struct resource nand_resources[] = {	[0] = {		.start	= NAND_BASE,		.end	= NAND_BASE + SZ_256M - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= AT91SAM9260_BASE_ECC,		.end	= AT91SAM9260_BASE_ECC + SZ_512 - 1,		.flags	= IORESOURCE_MEM,	}};static struct platform_device at91sam9260_nand_device = {	.name		= "atmel_nand",	.id		= -1,	.dev		= {				.platform_data	= &nand_data,	},	.resource	= nand_resources,	.num_resources	= ARRAY_SIZE(nand_resources),};void __init at91_add_device_nand(struct atmel_nand_data *data){	unsigned long csa;	if (!data)		return;	csa = at91_matrix_read(AT91_MATRIX_EBICSA);	at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);	/* enable pin */	if (gpio_is_valid(data->enable_pin))		at91_set_gpio_output(data->enable_pin, 1);	/* ready/busy pin */	if (gpio_is_valid(data->rdy_pin))		at91_set_gpio_input(data->rdy_pin, 1);	/* card detect pin */	if (gpio_is_valid(data->det_pin))		at91_set_gpio_input(data->det_pin, 1);	nand_data = *data;	platform_device_register(&at91sam9260_nand_device);}#elsevoid __init at91_add_device_nand(struct atmel_nand_data *data) {}#endif/* -------------------------------------------------------------------- *  TWI (i2c) * -------------------------------------------------------------------- *//* * Prefer the GPIO code since the TWI controller isn't robust * (gets overruns and underruns under load) and can only issue * repeated STARTs in one scenario (the driver doesn't yet handle them). */#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)static struct i2c_gpio_platform_data pdata = {	.sda_pin		= AT91_PIN_PA23,	.sda_is_open_drain	= 1,	.scl_pin		= AT91_PIN_PA24,	.scl_is_open_drain	= 1,	.udelay			= 2,		/* ~100 kHz */};static struct platform_device at91sam9260_twi_device = {	.name			= "i2c-gpio",	.id			= 0,	.dev.platform_data	= &pdata,};void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices){	at91_set_GPIO_periph(AT91_PIN_PA23, 1);		/* TWD (SDA) */	at91_set_multi_drive(AT91_PIN_PA23, 1);	at91_set_GPIO_periph(AT91_PIN_PA24, 1);		/* TWCK (SCL) */	at91_set_multi_drive(AT91_PIN_PA24, 1);	i2c_register_board_info(0, devices, nr_devices);	platform_device_register(&at91sam9260_twi_device);}#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)static struct resource twi_resources[] = {	[0] = {		.start	= AT91SAM9260_BASE_TWI,		.end	= AT91SAM9260_BASE_TWI + SZ_16K - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,		.flags	= IORESOURCE_IRQ,	},};static struct platform_device at91sam9260_twi_device = {	.id		= 0,	.resource	= twi_resources,	.num_resources	= ARRAY_SIZE(twi_resources),};void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices){	/* IP version is not the same on 9260 and g20 */	if (cpu_is_at91sam9g20()) {		at91sam9260_twi_device.name = "i2c-at91sam9g20";	} else {		at91sam9260_twi_device.name = "i2c-at91sam9260";	}	/* pins used for TWI interface */	at91_set_A_periph(AT91_PIN_PA23, 0);		/* TWD */	at91_set_multi_drive(AT91_PIN_PA23, 1);	at91_set_A_periph(AT91_PIN_PA24, 0);		/* TWCK */	at91_set_multi_drive(AT91_PIN_PA24, 1);	i2c_register_board_info(0, devices, nr_devices);	platform_device_register(&at91sam9260_twi_device);}#elsevoid __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}#endif/* -------------------------------------------------------------------- *  SPI * -------------------------------------------------------------------- */#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)static u64 spi_dmamask = DMA_BIT_MASK(32);static struct resource spi0_resources[] = {	[0] = {		.start	= AT91SAM9260_BASE_SPI0,		.end	= AT91SAM9260_BASE_SPI0 + SZ_16K - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,		.flags	= IORESOURCE_IRQ,	},};static struct platform_device at91sam9260_spi0_device = {	.name		= "atmel_spi",	.id		= 0,	.dev		= {				.dma_mask		= &spi_dmamask,				.coherent_dma_mask	= DMA_BIT_MASK(32),	},	.resource	= spi0_resources,	.num_resources	= ARRAY_SIZE(spi0_resources),};static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };static struct resource spi1_resources[] = {	[0] = {		.start	= AT91SAM9260_BASE_SPI1,		.end	= AT91SAM9260_BASE_SPI1 + SZ_16K - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,		.flags	= IORESOURCE_IRQ,	},};static struct platform_device at91sam9260_spi1_device = {	.name		= "atmel_spi",	.id		= 1,	.dev		= {				.dma_mask		= &spi_dmamask,				.coherent_dma_mask	= DMA_BIT_MASK(32),	},	.resource	= spi1_resources,	.num_resources	= ARRAY_SIZE(spi1_resources),};static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices){	int i;	unsigned long cs_pin;	short enable_spi0 = 0;	short enable_spi1 = 0;	/* Choose SPI chip-selects */	for (i = 0; i < nr_devices; i++) {		if (devices[i].controller_data)			cs_pin = (unsigned long) devices[i].controller_data;		else if (devices[i].bus_num == 0)			cs_pin = spi0_standard_cs[devices[i].chip_select];		else			cs_pin = spi1_standard_cs[devices[i].chip_select];		if (!gpio_is_valid(cs_pin))			continue;		if (devices[i].bus_num == 0)			enable_spi0 = 1;		else			enable_spi1 = 1;		/* enable chip-select pin */		at91_set_gpio_output(cs_pin, 1);		/* pass chip-select pin to driver */		devices[i].controller_data = (void *) cs_pin;	}	spi_register_board_info(devices, nr_devices);	/* Configure SPI bus(es) */	if (enable_spi0) {		at91_set_A_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */		at91_set_A_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */		at91_set_A_periph(AT91_PIN_PA2, 0);	/* SPI1_SPCK */		platform_device_register(&at91sam9260_spi0_device);	}	if (enable_spi1) {		at91_set_A_periph(AT91_PIN_PB0, 0);	/* SPI1_MISO */		at91_set_A_periph(AT91_PIN_PB1, 0);	/* SPI1_MOSI */		at91_set_A_periph(AT91_PIN_PB2, 0);	/* SPI1_SPCK */		platform_device_register(&at91sam9260_spi1_device);	}}#elsevoid __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}#endif/* -------------------------------------------------------------------- *  Timer/Counter blocks * -------------------------------------------------------------------- */#ifdef CONFIG_ATMEL_TCLIBstatic struct resource tcb0_resources[] = {	[0] = {		.start	= AT91SAM9260_BASE_TCB0,		.end	= AT91SAM9260_BASE_TCB0 + SZ_256 - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,		.flags	= IORESOURCE_IRQ,	},	[2] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,		.flags	= IORESOURCE_IRQ,	},	[3] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,		.flags	= IORESOURCE_IRQ,	},};static struct platform_device at91sam9260_tcb0_device = {	.name		= "atmel_tcb",	.id		= 0,	.resource	= tcb0_resources,	.num_resources	= ARRAY_SIZE(tcb0_resources),};static struct resource tcb1_resources[] = {	[0] = {		.start	= AT91SAM9260_BASE_TCB1,		.end	= AT91SAM9260_BASE_TCB1 + SZ_256 - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,		.flags	= IORESOURCE_IRQ,	},	[2] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,		.flags	= IORESOURCE_IRQ,	},	[3] = {		.start	= NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,		.end	= NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,		.flags	= IORESOURCE_IRQ,	},};static struct platform_device at91sam9260_tcb1_device = {	.name		= "atmel_tcb",	.id		= 1,	.resource	= tcb1_resources,	.num_resources	= ARRAY_SIZE(tcb1_resources),};static void __init at91_add_device_tc(void){	platform_device_register(&at91sam9260_tcb0_device);	platform_device_register(&at91sam9260_tcb1_device);}#elsestatic void __init at91_add_device_tc(void) { }#endif/* -------------------------------------------------------------------- *  RTT * -------------------------------------------------------------------- */static struct resource rtt_resources[] = {	{		.start	= AT91SAM9260_BASE_RTT,		.end	= AT91SAM9260_BASE_RTT + SZ_16 - 1,		.flags	= IORESOURCE_MEM,	}, {		.flags	= IORESOURCE_MEM,	}, {		.flags  = IORESOURCE_IRQ,	},};static struct platform_device at91sam9260_rtt_device = {	.name		= "at91_rtt",	.id		= 0,	.resource	= rtt_resources,
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