| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185 | /* *  arch/arm/include/asm/tlbflush.h * *  Copyright (C) 1999-2003 Russell King * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */#ifndef _ASMARM_TLBFLUSH_H#define _ASMARM_TLBFLUSH_H#ifdef CONFIG_MMU#include <asm/glue.h>#define TLB_V3_PAGE	(1 << 0)#define TLB_V4_U_PAGE	(1 << 1)#define TLB_V4_D_PAGE	(1 << 2)#define TLB_V4_I_PAGE	(1 << 3)#define TLB_V6_U_PAGE	(1 << 4)#define TLB_V6_D_PAGE	(1 << 5)#define TLB_V6_I_PAGE	(1 << 6)#define TLB_V3_FULL	(1 << 8)#define TLB_V4_U_FULL	(1 << 9)#define TLB_V4_D_FULL	(1 << 10)#define TLB_V4_I_FULL	(1 << 11)#define TLB_V6_U_FULL	(1 << 12)#define TLB_V6_D_FULL	(1 << 13)#define TLB_V6_I_FULL	(1 << 14)#define TLB_V6_U_ASID	(1 << 16)#define TLB_V6_D_ASID	(1 << 17)#define TLB_V6_I_ASID	(1 << 18)/* Unified Inner Shareable TLB operations (ARMv7 MP extensions) */#define TLB_V7_UIS_PAGE	(1 << 19)#define TLB_V7_UIS_FULL (1 << 20)#define TLB_V7_UIS_ASID (1 << 21)#define TLB_BARRIER	(1 << 28)#define TLB_L2CLEAN_FR	(1 << 29)		/* Feroceon */#define TLB_DCLEAN	(1 << 30)#define TLB_WB		(1 << 31)/* *	MMU TLB Model *	============= * *	We have the following to choose from: *	  v3    - ARMv3 *	  v4    - ARMv4 without write buffer *	  v4wb  - ARMv4 with write buffer without I TLB flush entry instruction *	  v4wbi - ARMv4 with write buffer with I TLB flush entry instruction *	  fr    - Feroceon (v4wbi with non-outer-cacheable page table walks) *	  fa    - Faraday (v4 with write buffer with UTLB) *	  v6wbi - ARMv6 with write buffer with I TLB flush entry instruction *	  v7wbi - identical to v6wbi */#undef _TLB#undef MULTI_TLB#ifdef CONFIG_SMP_ON_UP#define MULTI_TLB 1#endif#define v4_tlb_flags	(TLB_V4_U_FULL | TLB_V4_U_PAGE)#ifdef CONFIG_CPU_TLB_V4WT# define v4_possible_flags	v4_tlb_flags# define v4_always_flags	v4_tlb_flags# ifdef _TLB#  define MULTI_TLB 1# else#  define _TLB v4# endif#else# define v4_possible_flags	0# define v4_always_flags	(-1UL)#endif#define fa_tlb_flags	(TLB_WB | TLB_DCLEAN | TLB_BARRIER | \			 TLB_V4_U_FULL | TLB_V4_U_PAGE)#ifdef CONFIG_CPU_TLB_FA# define fa_possible_flags	fa_tlb_flags# define fa_always_flags	fa_tlb_flags# ifdef _TLB#  define MULTI_TLB 1# else#  define _TLB fa# endif#else# define fa_possible_flags	0# define fa_always_flags	(-1UL)#endif#define v4wbi_tlb_flags	(TLB_WB | TLB_DCLEAN | \			 TLB_V4_I_FULL | TLB_V4_D_FULL | \			 TLB_V4_I_PAGE | TLB_V4_D_PAGE)#ifdef CONFIG_CPU_TLB_V4WBI# define v4wbi_possible_flags	v4wbi_tlb_flags# define v4wbi_always_flags	v4wbi_tlb_flags# ifdef _TLB#  define MULTI_TLB 1# else#  define _TLB v4wbi# endif#else# define v4wbi_possible_flags	0# define v4wbi_always_flags	(-1UL)#endif#define fr_tlb_flags	(TLB_WB | TLB_DCLEAN | TLB_L2CLEAN_FR | \			 TLB_V4_I_FULL | TLB_V4_D_FULL | \			 TLB_V4_I_PAGE | TLB_V4_D_PAGE)#ifdef CONFIG_CPU_TLB_FEROCEON# define fr_possible_flags	fr_tlb_flags# define fr_always_flags	fr_tlb_flags# ifdef _TLB#  define MULTI_TLB 1# else#  define _TLB v4wbi# endif#else# define fr_possible_flags	0# define fr_always_flags	(-1UL)#endif#define v4wb_tlb_flags	(TLB_WB | TLB_DCLEAN | \			 TLB_V4_I_FULL | TLB_V4_D_FULL | \			 TLB_V4_D_PAGE)#ifdef CONFIG_CPU_TLB_V4WB# define v4wb_possible_flags	v4wb_tlb_flags# define v4wb_always_flags	v4wb_tlb_flags# ifdef _TLB#  define MULTI_TLB 1# else#  define _TLB v4wb# endif#else# define v4wb_possible_flags	0# define v4wb_always_flags	(-1UL)#endif#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \			 TLB_V6_I_FULL | TLB_V6_D_FULL | \			 TLB_V6_I_PAGE | TLB_V6_D_PAGE | \			 TLB_V6_I_ASID | TLB_V6_D_ASID)#ifdef CONFIG_CPU_TLB_V6# define v6wbi_possible_flags	v6wbi_tlb_flags# define v6wbi_always_flags	v6wbi_tlb_flags# ifdef _TLB#  define MULTI_TLB 1# else#  define _TLB v6wbi# endif#else# define v6wbi_possible_flags	0# define v6wbi_always_flags	(-1UL)#endif#define v7wbi_tlb_flags_smp	(TLB_WB | TLB_DCLEAN | TLB_BARRIER | \			 TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID)#define v7wbi_tlb_flags_up	(TLB_WB | TLB_DCLEAN | TLB_BARRIER | \			 TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID)#ifdef CONFIG_CPU_TLB_V7# ifdef CONFIG_SMP_ON_UP#  define v7wbi_possible_flags	(v7wbi_tlb_flags_smp | v7wbi_tlb_flags_up)#  define v7wbi_always_flags	(v7wbi_tlb_flags_smp & v7wbi_tlb_flags_up)# elif defined(CONFIG_SMP)#  define v7wbi_possible_flags	v7wbi_tlb_flags_smp#  define v7wbi_always_flags	v7wbi_tlb_flags_smp# else#  define v7wbi_possible_flags	v7wbi_tlb_flags_up#  define v7wbi_always_flags	v7wbi_tlb_flags_up# endif# ifdef _TLB
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