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aiot
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waterDataStatisticsCrossAssociation
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databaseOperation
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waterTankDataOperation.h

waterTankDataOperation.h 2.0 KB
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  1. /*
    2. 

  2.  * DO NOT EDIT THIS FILE
    3. 

  3.  * This file is under version control at
    4. 

  4.  *   svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
    5. 

  5.  * and can be replaced with that version at any time
    6. 

  6.  * DO NOT EDIT THIS FILE
    7. 

  7.  *
    8. 

  8.  * Copyright 2004-2011 Analog Devices Inc.
    9. 

  9.  * Licensed under the Clear BSD license.
    10. 

  10.  */
    11. 

  11. 

  12. /* This file should be up to date with:
    13. 

  13.  *  - Revision F, 05/23/2011; ADSP-BF526 Blackfin Processor Anomaly List
    14. 

  14.  *  - Revision I, 05/23/2011; ADSP-BF527 Blackfin Processor Anomaly List
    15. 

  15.  */
    16. 

  16. 

  17. #ifndef _MACH_ANOMALY_H_
    18. 

  18. #define _MACH_ANOMALY_H_
    19. 

  19. 

  20. /* We do not support old silicon - sorry */
    21. 

  21. #if __SILICON_REVISION__ < 0
    22. 

  22. # error will not work on BF526/BF527 silicon version
    23. 

  23. #endif
    24. 

  24. 

  25. #if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__)
    26. 

  26. # define ANOMALY_BF526 1
    27. 

  27. #else
    28. 

  28. # define ANOMALY_BF526 0
    29. 

  29. #endif
    30. 

  30. #if defined(__ADSPBF523__) || defined(__ADSPBF525__) || defined(__ADSPBF527__)
    31. 

  31. # define ANOMALY_BF527 1
    32. 

  32. #else
    33. 

  33. # define ANOMALY_BF527 0
    34. 

  34. #endif
    35. 

  35. 

  36. #define _ANOMALY_BF526(rev526) (ANOMALY_BF526 && __SILICON_REVISION__ rev526)
    37. 

  37. #define _ANOMALY_BF527(rev527) (ANOMALY_BF527 && __SILICON_REVISION__ rev527)
    38. 

  38. #define _ANOMALY_BF526_BF527(rev526, rev527) (_ANOMALY_BF526(rev526) || _ANOMALY_BF527(rev527))
    39. 

  39. 

  40. /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
    41. 

  41. #define ANOMALY_05000074 (1)
    42. 

  42. /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
    43. 

  43. #define ANOMALY_05000119 (1)
    44. 

  44. /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
    45. 

  45. #define ANOMALY_05000122 (1)
    46. 

  46. /* False Hardware Error from an Access in the Shadow of a Conditional Branch */
    47. 

  47. #define ANOMALY_05000245 (1)
    48. 

  48. /* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */
    49. 

  49. #define ANOMALY_05000254 (1)
    50. 

  50. /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
    51. 

  51. #define ANOMALY_05000265 (1)
    52. 

  52. /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
    53. 

  53. #define ANOMALY_05000310 (1)
    54. 

  54. /* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */
    55.