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aiot
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efDataDiscreteRateMining
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monitoringDataProcessing
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preliminaryDataProcessing.c

preliminaryDataProcessing.c 2.1 KB
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  1. /*
    2. 

  2.  *  linux/arch/arm/mm/alignment.c
    3. 

  3.  *
    4. 

  4.  *  Copyright (C) 1995  Linus Torvalds
    5. 

  5.  *  Modifications for ARM processor (c) 1995-2001 Russell King
    6. 

  6.  *  Thumb alignment fault fixups (c) 2004 MontaVista Software, Inc.
    7. 

  7.  *  - Adapted from gdb/sim/arm/thumbemu.c -- Thumb instruction emulation.
    8. 

  8.  *    Copyright (C) 1996, Cygnus Software Technologies Ltd.
    9. 

  9.  *
    10. 

  10.  * This program is free software; you can redistribute it and/or modify
    11. 

  11.  * it under the terms of the GNU General Public License version 2 as
    12. 

  12.  * published by the Free Software Foundation.
    13. 

  13.  */
    14. 

  14. #include <linux/moduleparam.h>
    15. 

  15. #include <linux/compiler.h>
    16. 

  16. #include <linux/kernel.h>
    17. 

  17. #include <linux/errno.h>
    18. 

  18. #include <linux/string.h>
    19. 

  19. #include <linux/proc_fs.h>
    20. 

  20. #include <linux/seq_file.h>
    21. 

  21. #include <linux/init.h>
    22. 

  22. #include <linux/sched.h>
    23. 

  23. #include <linux/uaccess.h>
    24. 

  24. 

  25. #include <asm/cp15.h>
    26. 

  26. #include <asm/system_info.h>
    27. 

  27. #include <asm/unaligned.h>
    28. 

  28. 

  29. #include "fault.h"
    30. 

  30. 

  31. /*
    32. 

  32.  * 32-bit misaligned trap handler (c) 1998 San Mehat (CCC) -July 1998
    33. 

  33.  * /proc/sys/debug/alignment, modified and integrated into
    34. 

  34.  * Linux 2.1 by Russell King
    35. 

  35.  *
    36. 

  36.  * Speed optimisations and better fault handling by Russell King.
    37. 

  37.  *
    38. 

  38.  * *** NOTE ***
    39. 

  39.  * This code is not portable to processors with late data abort handling.
    40. 

  40.  */
    41. 

  41. #define CODING_BITS(i)	(i & 0x0e000000)
    42. 

  42. 

  43. #define LDST_I_BIT(i)	(i & (1 << 26))		/* Immediate constant	*/
    44. 

  44. #define LDST_P_BIT(i)	(i & (1 << 24))		/* Preindex		*/
    45. 

  45. #define LDST_U_BIT(i)	(i & (1 << 23))		/* Add offset		*/
    46. 

  46. #define LDST_W_BIT(i)	(i & (1 << 21))		/* Writeback		*/
    47. 

  47. #define LDST_L_BIT(i)	(i & (1 << 20))		/* Load			*/
    48. 

  48. 

  49. #define LDST_P_EQ_U(i)	((((i) ^ ((i) >> 1)) & (1 << 23)) == 0)
    50. 

  50. 

  51. #define LDSTHD_I_BIT(i)	(i & (1 << 22))		/* double/half-word immed */
    52. 

  52. #define LDM_S_BIT(i)	(i & (1 << 22))		/* write CPSR from SPSR	*/
    53. 

  53. 

  54. #define RN_BITS(i)	((i >> 16) & 15)	/* Rn			*/
    55. 

  55. #define RD_BITS(i)	((i >> 12) & 15)	/* Rd			*/
    56. 

  56. #define RM_BITS(i)	(i & 15)		/* Rm			*/
    57. 

  57. 

  58. #define REGMASK_BITS(i)	(i & 0xffff)
    59. 

  59. #define OFFSET_BITS(i)	(i & 0x0fff)
    60. 

  60. 

  61. #define IS_SHIFT(i)	(i & 0x0ff0)
    62. 

  62. #define SHIFT_BITS(i)	((i >> 7) & 0x1f)
    63. 

  63. #define SHIFT_TYPE(i)	(i & 0x60)
    64. 

  64. #define SHIFT_LSL	0x00
    65. 

  65. #define SHIFT_LSR	0x20
    66.