main.c 4.9 KB

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  1. /*
  2. * linux/arch/arm/mach-at91/board-sam9261ek.c
  3. *
  4. * Copyright (C) 2005 SAN People
  5. * Copyright (C) 2006 Atmel
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/types.h>
  22. #include <linux/gpio.h>
  23. #include <linux/init.h>
  24. #include <linux/mm.h>
  25. #include <linux/module.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/spi/spi.h>
  28. #include <linux/spi/ads7846.h>
  29. #include <linux/spi/at73c213.h>
  30. #include <linux/clk.h>
  31. #include <linux/dm9000.h>
  32. #include <linux/fb.h>
  33. #include <linux/gpio_keys.h>
  34. #include <linux/input.h>
  35. #include <video/atmel_lcdc.h>
  36. #include <asm/setup.h>
  37. #include <asm/mach-types.h>
  38. #include <asm/irq.h>
  39. #include <asm/mach/arch.h>
  40. #include <asm/mach/map.h>
  41. #include <asm/mach/irq.h>
  42. #include <mach/hardware.h>
  43. #include <mach/at91sam9_smc.h>
  44. #include <mach/system_rev.h>
  45. #include "at91_aic.h"
  46. #include "at91_shdwc.h"
  47. #include "board.h"
  48. #include "sam9_smc.h"
  49. #include "generic.h"
  50. static void __init ek_init_early(void)
  51. {
  52. /* Initialize processor: 18.432 MHz crystal */
  53. at91_initialize(18432000);
  54. }
  55. /*
  56. * DM9000 ethernet device
  57. */
  58. #if defined(CONFIG_DM9000)
  59. static struct resource dm9000_resource[] = {
  60. [0] = {
  61. .start = AT91_CHIPSELECT_2,
  62. .end = AT91_CHIPSELECT_2 + 3,
  63. .flags = IORESOURCE_MEM
  64. },
  65. [1] = {
  66. .start = AT91_CHIPSELECT_2 + 0x44,
  67. .end = AT91_CHIPSELECT_2 + 0xFF,
  68. .flags = IORESOURCE_MEM
  69. },
  70. [2] = {
  71. .flags = IORESOURCE_IRQ
  72. | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE,
  73. }
  74. };
  75. static struct dm9000_plat_data dm9000_platdata = {
  76. .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM,
  77. };
  78. static struct platform_device dm9000_device = {
  79. .name = "dm9000",
  80. .id = 0,
  81. .num_resources = ARRAY_SIZE(dm9000_resource),
  82. .resource = dm9000_resource,
  83. .dev = {
  84. .platform_data = &dm9000_platdata,
  85. }
  86. };
  87. /*
  88. * SMC timings for the DM9000.
  89. * Note: These timings were calculated for MASTER_CLOCK = 100000000 according to the DM9000 timings.
  90. */
  91. static struct sam9_smc_config __initdata dm9000_smc_config = {
  92. .ncs_read_setup = 0,
  93. .nrd_setup = 2,
  94. .ncs_write_setup = 0,
  95. .nwe_setup = 2,
  96. .ncs_read_pulse = 8,
  97. .nrd_pulse = 4,
  98. .ncs_write_pulse = 8,
  99. .nwe_pulse = 4,
  100. .read_cycle = 16,
  101. .write_cycle = 16,
  102. .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
  103. .tdf_cycles = 1,
  104. };
  105. static void __init ek_add_device_dm9000(void)
  106. {
  107. struct resource *r = &dm9000_resource[2];
  108. /* Configure chip-select 2 (DM9000) */
  109. sam9_smc_configure(0, 2, &dm9000_smc_config);
  110. /* Configure Reset signal as output */
  111. at91_set_gpio_output(AT91_PIN_PC10, 0);
  112. /* Configure Interrupt pin as input, no pull-up */
  113. at91_set_gpio_input(AT91_PIN_PC11, 0);
  114. r->start = r->end = gpio_to_irq(AT91_PIN_PC11);
  115. platform_device_register(&dm9000_device);
  116. }
  117. #else
  118. static void __init ek_add_device_dm9000(void) {}
  119. #endif /* CONFIG_DM9000 */
  120. /*
  121. * USB Host Port
  122. */
  123. static struct at91_usbh_data __initdata ek_usbh_data = {
  124. .ports = 2,
  125. .vbus_pin = {-EINVAL, -EINVAL},
  126. .overcurrent_pin= {-EINVAL, -EINVAL},
  127. };
  128. /*
  129. * USB Device Port
  130. */
  131. static struct at91_udc_data __initdata ek_udc_data = {
  132. .vbus_pin = AT91_PIN_PB29,
  133. .pullup_pin = -EINVAL, /* pull-up driven by UDC */
  134. };
  135. /*
  136. * NAND flash
  137. */
  138. static struct mtd_partition __initdata ek_nand_partition[] = {
  139. {
  140. .name = "Partition 1",
  141. .offset = 0,
  142. .size = SZ_256K,
  143. },
  144. {
  145. .name = "Partition 2",
  146. .offset = MTDPART_OFS_NXTBLK,
  147. .size = MTDPART_SIZ_FULL,
  148. },
  149. };
  150. static struct atmel_nand_data __initdata ek_nand_data = {
  151. .ale = 22,
  152. .cle = 21,
  153. .det_pin = -EINVAL,
  154. .rdy_pin = AT91_PIN_PC15,
  155. .enable_pin = AT91_PIN_PC14,
  156. .ecc_mode = NAND_ECC_SOFT,
  157. .on_flash_bbt = 1,
  158. .parts = ek_nand_partition,
  159. .num_parts = ARRAY_SIZE(ek_nand_partition),
  160. };
  161. static struct sam9_smc_config __initdata ek_nand_smc_config = {
  162. .ncs_read_setup = 0,
  163. .nrd_setup = 1,
  164. .ncs_write_setup = 0,
  165. .nwe_setup = 1,
  166. .ncs_read_pulse = 3,
  167. .nrd_pulse = 3,
  168. .ncs_write_pulse = 3,
  169. .nwe_pulse = 3,
  170. .read_cycle = 5,
  171. .write_cycle = 5,
  172. .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
  173. .tdf_cycles = 2,
  174. };
  175. static void __init ek_add_device_nand(void)
  176. {
  177. ek_nand_data.bus_width_16 = board_have_nand_16bit();
  178. /* setup bus-width (8 or 16) */
  179. if (ek_nand_data.bus_width_16)
  180. ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
  181. else
  182. ek_nand_smc_config.mode |= AT91_SMC_DBW_8;