heterogeneousDataSynchronization.c 4.6 KB

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  1. /*
  2. * This is the configuration for SSV Dil/NetPC DNP/5370 board.
  3. *
  4. * DIL module: http://www.dilnetpc.com/dnp0086.htm
  5. * SK28 (starter kit): http://www.dilnetpc.com/dnp0088.htm
  6. *
  7. * Copyright 2010 3ality Digital Systems
  8. * Copyright 2005 National ICT Australia (NICTA)
  9. * Copyright 2004-2006 Analog Devices Inc.
  10. *
  11. * Licensed under the GPL-2 or later.
  12. */
  13. #include <linux/device.h>
  14. #include <linux/export.h>
  15. #include <linux/kernel.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/io.h>
  18. #include <linux/mtd/mtd.h>
  19. #include <linux/mtd/nand.h>
  20. #include <linux/mtd/partitions.h>
  21. #include <linux/mtd/plat-ram.h>
  22. #include <linux/mtd/physmap.h>
  23. #include <linux/spi/spi.h>
  24. #include <linux/spi/flash.h>
  25. #include <linux/irq.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/i2c.h>
  28. #include <linux/spi/mmc_spi.h>
  29. #include <linux/phy.h>
  30. #include <asm/dma.h>
  31. #include <asm/bfin5xx_spi.h>
  32. #include <asm/reboot.h>
  33. #include <asm/portmux.h>
  34. #include <asm/dpmc.h>
  35. /*
  36. * Name the Board for the /proc/cpuinfo
  37. */
  38. const char bfin_board_name[] = "DNP/5370";
  39. #define FLASH_MAC 0x202f0000
  40. #define CONFIG_MTD_PHYSMAP_LEN 0x300000
  41. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  42. static struct platform_device rtc_device = {
  43. .name = "rtc-bfin",
  44. .id = -1,
  45. };
  46. #endif
  47. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  48. #include <linux/bfin_mac.h>
  49. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  50. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  51. {
  52. .addr = 1,
  53. .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
  54. },
  55. };
  56. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  57. .phydev_number = 1,
  58. .phydev_data = bfin_phydev_data,
  59. .phy_mode = PHY_INTERFACE_MODE_RMII,
  60. .mac_peripherals = bfin_mac_peripherals,
  61. };
  62. static struct platform_device bfin_mii_bus = {
  63. .name = "bfin_mii_bus",
  64. .dev = {
  65. .platform_data = &bfin_mii_bus_data,
  66. }
  67. };
  68. static struct platform_device bfin_mac_device = {
  69. .name = "bfin_mac",
  70. .dev = {
  71. .platform_data = &bfin_mii_bus,
  72. }
  73. };
  74. #endif
  75. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  76. static struct mtd_partition asmb_flash_partitions[] = {
  77. {
  78. .name = "bootloader(nor)",
  79. .size = 0x30000,
  80. .offset = 0,
  81. }, {
  82. .name = "linux kernel and rootfs(nor)",
  83. .size = 0x300000 - 0x30000 - 0x10000,
  84. .offset = MTDPART_OFS_APPEND,
  85. }, {
  86. .name = "MAC address(nor)",
  87. .size = 0x10000,
  88. .offset = MTDPART_OFS_APPEND,
  89. .mask_flags = MTD_WRITEABLE,
  90. }
  91. };
  92. static struct physmap_flash_data asmb_flash_data = {
  93. .width = 1,
  94. .parts = asmb_flash_partitions,
  95. .nr_parts = ARRAY_SIZE(asmb_flash_partitions),
  96. };
  97. static struct resource asmb_flash_resource = {
  98. .start = 0x20000000,
  99. .end = 0x202fffff,
  100. .flags = IORESOURCE_MEM,
  101. };
  102. /* 4 MB NOR flash attached to async memory banks 0-2,
  103. * therefore only 3 MB visible.
  104. */
  105. static struct platform_device asmb_flash_device = {
  106. .name = "physmap-flash",
  107. .id = 0,
  108. .dev = {
  109. .platform_data = &asmb_flash_data,
  110. },
  111. .num_resources = 1,
  112. .resource = &asmb_flash_resource,
  113. };
  114. #endif
  115. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  116. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  117. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  118. .enable_dma = 0, /* use no dma transfer with this chip*/
  119. };
  120. #endif
  121. #if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE)
  122. /* This mapping is for at45db642 it has 1056 page size,
  123. * partition size and offset should be page aligned
  124. */
  125. static struct mtd_partition bfin_spi_dataflash_partitions[] = {
  126. {
  127. .name = "JFFS2 dataflash(nor)",
  128. #ifdef CONFIG_MTD_PAGESIZE_1024
  129. .offset = 0x40000,
  130. .size = 0x7C0000,
  131. #else
  132. .offset = 0x0,
  133. .size = 0x840000,
  134. #endif
  135. }
  136. };
  137. static struct flash_platform_data bfin_spi_dataflash_data = {
  138. .name = "mtd_dataflash",
  139. .parts = bfin_spi_dataflash_partitions,
  140. .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
  141. .type = "mtd_dataflash",
  142. };
  143. static struct bfin5xx_spi_chip spi_dataflash_chip_info = {
  144. .enable_dma = 0, /* use no dma transfer with this chip*/
  145. };
  146. #endif
  147. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  148. /* SD/MMC card reader at SPI bus */
  149. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  150. {
  151. .modalias = "mmc_spi",
  152. .max_speed_hz = 20000000,
  153. .bus_num = 0,
  154. .chip_select = 1,
  155. .controller_data = &mmc_spi_chip_info,
  156. .mode = SPI_MODE_3,
  157. },
  158. #endif
  159. /* 8 Megabyte Atmel NOR flash chip at SPI bus */
  160. #if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE)
  161. {
  162. .modalias = "mtd_dataflash",
  163. .max_speed_hz = 16700000,
  164. .bus_num = 0,
  165. .chip_select = 2,