| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279 | /* * Common header file for Blackfin family of processors * * Copyright 2007-2008 Analog Devices Inc. * * Licensed under the GPL-2 or later. */#ifndef _PORTMUX_H_#define _PORTMUX_H_#define P_IDENT(x)	((x) & 0x1FF)#define P_FUNCT(x)	(((x) & 0x3) << 9)#define P_FUNCT2MUX(x)	(((x) >> 9) & 0x3)#define P_DEFINED	0x8000#define P_UNDEF		0x4000#define P_MAYSHARE	0x2000#define P_DONTCARE	0x1000int peripheral_request(unsigned short per, const char *label);void peripheral_free(unsigned short per);int peripheral_request_list(const unsigned short per[], const char *label);void peripheral_free_list(const unsigned short per[]);#include <asm/gpio.h>#include <mach/portmux.h>#ifndef P_SPORT2_TFS#define P_SPORT2_TFS P_UNDEF#endif#ifndef P_SPORT2_DTSEC#define P_SPORT2_DTSEC P_UNDEF#endif#ifndef P_SPORT2_DTPRI#define P_SPORT2_DTPRI P_UNDEF#endif#ifndef P_SPORT2_TSCLK#define P_SPORT2_TSCLK P_UNDEF#endif#ifndef P_SPORT2_RFS#define P_SPORT2_RFS P_UNDEF#endif#ifndef P_SPORT2_DRSEC#define P_SPORT2_DRSEC P_UNDEF#endif#ifndef P_SPORT2_DRPRI#define P_SPORT2_DRPRI P_UNDEF#endif#ifndef P_SPORT2_RSCLK#define P_SPORT2_RSCLK P_UNDEF#endif#ifndef P_SPORT3_TFS#define P_SPORT3_TFS P_UNDEF#endif#ifndef P_SPORT3_DTSEC#define P_SPORT3_DTSEC P_UNDEF#endif#ifndef P_SPORT3_DTPRI#define P_SPORT3_DTPRI P_UNDEF#endif#ifndef P_SPORT3_TSCLK#define P_SPORT3_TSCLK P_UNDEF#endif#ifndef P_SPORT3_RFS#define P_SPORT3_RFS P_UNDEF#endif#ifndef P_SPORT3_DRSEC#define P_SPORT3_DRSEC P_UNDEF#endif#ifndef P_SPORT3_DRPRI#define P_SPORT3_DRPRI P_UNDEF#endif#ifndef P_SPORT3_RSCLK#define P_SPORT3_RSCLK P_UNDEF#endif#ifndef P_TMR4#define P_TMR4 P_UNDEF#endif#ifndef P_TMR5#define P_TMR5 P_UNDEF#endif#ifndef P_TMR6#define P_TMR6 P_UNDEF#endif#ifndef P_TMR7#define P_TMR7 P_UNDEF#endif#ifndef P_TWI1_SCL#define P_TWI1_SCL P_UNDEF#endif#ifndef P_TWI1_SDA#define P_TWI1_SDA P_UNDEF#endif#ifndef P_UART3_RTS#define P_UART3_RTS P_UNDEF#endif#ifndef P_UART3_CTS#define P_UART3_CTS P_UNDEF#endif#ifndef P_UART2_TX#define P_UART2_TX P_UNDEF#endif#ifndef P_UART2_RX#define P_UART2_RX P_UNDEF#endif#ifndef P_UART3_TX#define P_UART3_TX P_UNDEF#endif#ifndef P_UART3_RX#define P_UART3_RX P_UNDEF#endif#ifndef P_SPI2_SS#define P_SPI2_SS P_UNDEF#endif#ifndef P_SPI2_SSEL1#define P_SPI2_SSEL1 P_UNDEF#endif#ifndef P_SPI2_SSEL2#define P_SPI2_SSEL2 P_UNDEF#endif#ifndef P_SPI2_SSEL3#define P_SPI2_SSEL3 P_UNDEF#endif#ifndef P_SPI2_SSEL4#define P_SPI2_SSEL4 P_UNDEF#endif#ifndef P_SPI2_SSEL5#define P_SPI2_SSEL5 P_UNDEF#endif#ifndef P_SPI2_SSEL6#define P_SPI2_SSEL6 P_UNDEF#endif#ifndef P_SPI2_SSEL7#define P_SPI2_SSEL7 P_UNDEF#endif#ifndef P_SPI2_SCK#define P_SPI2_SCK P_UNDEF#endif#ifndef P_SPI2_MOSI#define P_SPI2_MOSI P_UNDEF#endif#ifndef P_SPI2_MISO#define P_SPI2_MISO P_UNDEF#endif#ifndef P_TMR0#define P_TMR0 P_UNDEF#endif#ifndef P_TMR1#define P_TMR1 P_UNDEF#endif#ifndef P_TMR2#define P_TMR2 P_UNDEF#endif#ifndef P_TMR3#define P_TMR3 P_UNDEF#endif#ifndef P_SPORT0_TFS#define P_SPORT0_TFS P_UNDEF#endif#ifndef P_SPORT0_DTSEC#define P_SPORT0_DTSEC P_UNDEF#endif#ifndef P_SPORT0_DTPRI#define P_SPORT0_DTPRI P_UNDEF#endif#ifndef P_SPORT0_TSCLK#define P_SPORT0_TSCLK P_UNDEF#endif#ifndef P_SPORT0_RFS#define P_SPORT0_RFS P_UNDEF#endif#ifndef P_SPORT0_DRSEC#define P_SPORT0_DRSEC P_UNDEF#endif#ifndef P_SPORT0_DRPRI#define P_SPORT0_DRPRI P_UNDEF#endif#ifndef P_SPORT0_RSCLK#define P_SPORT0_RSCLK P_UNDEF#endif#ifndef P_SD_D0#define P_SD_D0 P_UNDEF#endif#ifndef P_SD_D1#define P_SD_D1 P_UNDEF#endif#ifndef P_SD_D2#define P_SD_D2 P_UNDEF#endif#ifndef P_SD_D3#define P_SD_D3 P_UNDEF#endif#ifndef P_SD_CLK#define P_SD_CLK P_UNDEF#endif#ifndef P_SD_CMD#define P_SD_CMD P_UNDEF#endif#ifndef P_MMCLK#define P_MMCLK P_UNDEF#endif#ifndef P_MBCLK#define P_MBCLK P_UNDEF#endif#ifndef P_PPI1_D0#define P_PPI1_D0 P_UNDEF#endif#ifndef P_PPI1_D1#define P_PPI1_D1 P_UNDEF#endif#ifndef P_PPI1_D2#define P_PPI1_D2 P_UNDEF#endif#ifndef P_PPI1_D3#define P_PPI1_D3 P_UNDEF#endif
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