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							- /*
 
-  * Copyright 2007-2010 Analog Devices Inc.
 
-  *
 
-  * Licensed under the GPL-2 or later.
 
-  */
 
- #ifndef _CDEF_BF549_H
 
- #define _CDEF_BF549_H
 
- /* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */
 
- #include "cdefBF54x_base.h"
 
- /* The BF549 is like the BF544, but has MXVR */
 
- #include "cdefBF547.h"
 
- /* MXVR Registers */
 
- #define bfin_read_MXVR_CONFIG()			bfin_read16(MXVR_CONFIG)
 
- #define bfin_write_MXVR_CONFIG(val)		bfin_write16(MXVR_CONFIG, val)
 
- #define bfin_read_MXVR_STATE_0()		bfin_read32(MXVR_STATE_0)
 
- #define bfin_write_MXVR_STATE_0(val)		bfin_write32(MXVR_STATE_0, val)
 
- #define bfin_read_MXVR_STATE_1()		bfin_read32(MXVR_STATE_1)
 
- #define bfin_write_MXVR_STATE_1(val)		bfin_write32(MXVR_STATE_1, val)
 
- #define bfin_read_MXVR_INT_STAT_0()		bfin_read32(MXVR_INT_STAT_0)
 
- #define bfin_write_MXVR_INT_STAT_0(val)		bfin_write32(MXVR_INT_STAT_0, val)
 
- #define bfin_read_MXVR_INT_STAT_1()		bfin_read32(MXVR_INT_STAT_1)
 
- #define bfin_write_MXVR_INT_STAT_1(val)		bfin_write32(MXVR_INT_STAT_1, val)
 
- #define bfin_read_MXVR_INT_EN_0()		bfin_read32(MXVR_INT_EN_0)
 
- #define bfin_write_MXVR_INT_EN_0(val)		bfin_write32(MXVR_INT_EN_0, val)
 
- #define bfin_read_MXVR_INT_EN_1()		bfin_read32(MXVR_INT_EN_1)
 
- #define bfin_write_MXVR_INT_EN_1(val)		bfin_write32(MXVR_INT_EN_1, val)
 
- #define bfin_read_MXVR_POSITION()		bfin_read16(MXVR_POSITION)
 
- #define bfin_write_MXVR_POSITION(val)		bfin_write16(MXVR_POSITION, val)
 
- #define bfin_read_MXVR_MAX_POSITION()		bfin_read16(MXVR_MAX_POSITION)
 
- #define bfin_write_MXVR_MAX_POSITION(val)	bfin_write16(MXVR_MAX_POSITION, val)
 
- #define bfin_read_MXVR_DELAY()			bfin_read16(MXVR_DELAY)
 
- #define bfin_write_MXVR_DELAY(val)		bfin_write16(MXVR_DELAY, val)
 
- #define bfin_read_MXVR_MAX_DELAY()		bfin_read16(MXVR_MAX_DELAY)
 
- #define bfin_write_MXVR_MAX_DELAY(val)		bfin_write16(MXVR_MAX_DELAY, val)
 
- #define bfin_read_MXVR_LADDR()			bfin_read32(MXVR_LADDR)
 
- #define bfin_write_MXVR_LADDR(val)		bfin_write32(MXVR_LADDR, val)
 
- #define bfin_read_MXVR_GADDR()			bfin_read16(MXVR_GADDR)
 
- #define bfin_write_MXVR_GADDR(val)		bfin_write16(MXVR_GADDR, val)
 
- #define bfin_read_MXVR_AADDR()			bfin_read32(MXVR_AADDR)
 
- #define bfin_write_MXVR_AADDR(val)		bfin_write32(MXVR_AADDR, val)
 
- /* MXVR Allocation Table Registers */
 
- #define bfin_read_MXVR_ALLOC_0()		bfin_read32(MXVR_ALLOC_0)
 
- #define bfin_write_MXVR_ALLOC_0(val)		bfin_write32(MXVR_ALLOC_0, val)
 
- #define bfin_read_MXVR_ALLOC_1()		bfin_read32(MXVR_ALLOC_1)
 
- #define bfin_write_MXVR_ALLOC_1(val)		bfin_write32(MXVR_ALLOC_1, val)
 
- #define bfin_read_MXVR_ALLOC_2()		bfin_read32(MXVR_ALLOC_2)
 
- #define bfin_write_MXVR_ALLOC_2(val)		bfin_write32(MXVR_ALLOC_2, val)
 
- #define bfin_read_MXVR_ALLOC_3()		bfin_read32(MXVR_ALLOC_3)
 
- #define bfin_write_MXVR_ALLOC_3(val)		bfin_write32(MXVR_ALLOC_3, val)
 
- #define bfin_read_MXVR_ALLOC_4()		bfin_read32(MXVR_ALLOC_4)
 
- #define bfin_write_MXVR_ALLOC_4(val)		bfin_write32(MXVR_ALLOC_4, val)
 
- #define bfin_read_MXVR_ALLOC_5()		bfin_read32(MXVR_ALLOC_5)
 
- #define bfin_write_MXVR_ALLOC_5(val)		bfin_write32(MXVR_ALLOC_5, val)
 
- #define bfin_read_MXVR_ALLOC_6()		bfin_read32(MXVR_ALLOC_6)
 
- #define bfin_write_MXVR_ALLOC_6(val)		bfin_write32(MXVR_ALLOC_6, val)
 
- #define bfin_read_MXVR_ALLOC_7()		bfin_read32(MXVR_ALLOC_7)
 
- #define bfin_write_MXVR_ALLOC_7(val)		bfin_write32(MXVR_ALLOC_7, val)
 
- #define bfin_read_MXVR_ALLOC_8()		bfin_read32(MXVR_ALLOC_8)
 
- #define bfin_write_MXVR_ALLOC_8(val)		bfin_write32(MXVR_ALLOC_8, val)
 
- #define bfin_read_MXVR_ALLOC_9()		bfin_read32(MXVR_ALLOC_9)
 
- #define bfin_write_MXVR_ALLOC_9(val)		bfin_write32(MXVR_ALLOC_9, val)
 
- #define bfin_read_MXVR_ALLOC_10()		bfin_read32(MXVR_ALLOC_10)
 
- #define bfin_write_MXVR_ALLOC_10(val)		bfin_write32(MXVR_ALLOC_10, val)
 
- #define bfin_read_MXVR_ALLOC_11()		bfin_read32(MXVR_ALLOC_11)
 
- #define bfin_write_MXVR_ALLOC_11(val)		bfin_write32(MXVR_ALLOC_11, val)
 
- #define bfin_read_MXVR_ALLOC_12()		bfin_read32(MXVR_ALLOC_12)
 
- #define bfin_write_MXVR_ALLOC_12(val)		bfin_write32(MXVR_ALLOC_12, val)
 
- #define bfin_read_MXVR_ALLOC_13()		bfin_read32(MXVR_ALLOC_13)
 
- #define bfin_write_MXVR_ALLOC_13(val)		bfin_write32(MXVR_ALLOC_13, val)
 
- #define bfin_read_MXVR_ALLOC_14()		bfin_read32(MXVR_ALLOC_14)
 
- #define bfin_write_MXVR_ALLOC_14(val)		bfin_write32(MXVR_ALLOC_14, val)
 
- /* MXVR Channel Assign Registers */
 
- #define bfin_read_MXVR_SYNC_LCHAN_0()		bfin_read32(MXVR_SYNC_LCHAN_0)
 
- #define bfin_write_MXVR_SYNC_LCHAN_0(val)	bfin_write32(MXVR_SYNC_LCHAN_0, val)
 
- #define bfin_read_MXVR_SYNC_LCHAN_1()		bfin_read32(MXVR_SYNC_LCHAN_1)
 
- #define bfin_write_MXVR_SYNC_LCHAN_1(val)	bfin_write32(MXVR_SYNC_LCHAN_1, val)
 
- #define bfin_read_MXVR_SYNC_LCHAN_2()		bfin_read32(MXVR_SYNC_LCHAN_2)
 
- #define bfin_write_MXVR_SYNC_LCHAN_2(val)	bfin_write32(MXVR_SYNC_LCHAN_2, val)
 
- #define bfin_read_MXVR_SYNC_LCHAN_3()		bfin_read32(MXVR_SYNC_LCHAN_3)
 
- #define bfin_write_MXVR_SYNC_LCHAN_3(val)	bfin_write32(MXVR_SYNC_LCHAN_3, val)
 
- #define bfin_read_MXVR_SYNC_LCHAN_4()		bfin_read32(MXVR_SYNC_LCHAN_4)
 
- #define bfin_write_MXVR_SYNC_LCHAN_4(val)	bfin_write32(MXVR_SYNC_LCHAN_4, val)
 
- #define bfin_read_MXVR_SYNC_LCHAN_5()		bfin_read32(MXVR_SYNC_LCHAN_5)
 
- #define bfin_write_MXVR_SYNC_LCHAN_5(val)	bfin_write32(MXVR_SYNC_LCHAN_5, val)
 
- #define bfin_read_MXVR_SYNC_LCHAN_6()		bfin_read32(MXVR_SYNC_LCHAN_6)
 
- #define bfin_write_MXVR_SYNC_LCHAN_6(val)	bfin_write32(MXVR_SYNC_LCHAN_6, val)
 
- #define bfin_read_MXVR_SYNC_LCHAN_7()		bfin_read32(MXVR_SYNC_LCHAN_7)
 
- #define bfin_write_MXVR_SYNC_LCHAN_7(val)	bfin_write32(MXVR_SYNC_LCHAN_7, val)
 
- /* MXVR DMA0 Registers */
 
- #define bfin_read_MXVR_DMA0_CONFIG()		bfin_read32(MXVR_DMA0_CONFIG)
 
- #define bfin_write_MXVR_DMA0_CONFIG(val)	bfin_write32(MXVR_DMA0_CONFIG, val)
 
- #define bfin_read_MXVR_DMA0_START_ADDR()	bfin_read32(MXVR_DMA0_START_ADDR)
 
- #define bfin_write_MXVR_DMA0_START_ADDR(val)	bfin_write32(MXVR_DMA0_START_ADDR)
 
- #define bfin_read_MXVR_DMA0_COUNT()		bfin_read16(MXVR_DMA0_COUNT)
 
- #define bfin_write_MXVR_DMA0_COUNT(val)		bfin_write16(MXVR_DMA0_COUNT, val)
 
- #define bfin_read_MXVR_DMA0_CURR_ADDR()		bfin_read32(MXVR_DMA0_CURR_ADDR)
 
- #define bfin_write_MXVR_DMA0_CURR_ADDR(val)	bfin_write32(MXVR_DMA0_CURR_ADDR)
 
- #define bfin_read_MXVR_DMA0_CURR_COUNT()	bfin_read16(MXVR_DMA0_CURR_COUNT)
 
- #define bfin_write_MXVR_DMA0_CURR_COUNT(val)	bfin_write16(MXVR_DMA0_CURR_COUNT, val)
 
- /* MXVR DMA1 Registers */
 
- #define bfin_read_MXVR_DMA1_CONFIG()		bfin_read32(MXVR_DMA1_CONFIG)
 
- #define bfin_write_MXVR_DMA1_CONFIG(val)	bfin_write32(MXVR_DMA1_CONFIG, val)
 
- #define bfin_read_MXVR_DMA1_START_ADDR()	bfin_read32(MXVR_DMA1_START_ADDR)
 
- #define bfin_write_MXVR_DMA1_START_ADDR(val)	bfin_write32(MXVR_DMA1_START_ADDR)
 
- #define bfin_read_MXVR_DMA1_COUNT()		bfin_read16(MXVR_DMA1_COUNT)
 
- #define bfin_write_MXVR_DMA1_COUNT(val)		bfin_write16(MXVR_DMA1_COUNT, val)
 
- #define bfin_read_MXVR_DMA1_CURR_ADDR()		bfin_read32(MXVR_DMA1_CURR_ADDR)
 
- #define bfin_write_MXVR_DMA1_CURR_ADDR(val)	bfin_write32(MXVR_DMA1_CURR_ADDR)
 
- #define bfin_read_MXVR_DMA1_CURR_COUNT()	bfin_read16(MXVR_DMA1_CURR_COUNT)
 
- #define bfin_write_MXVR_DMA1_CURR_COUNT(val)	bfin_write16(MXVR_DMA1_CURR_COUNT, val)
 
- /* MXVR DMA2 Registers */
 
- #define bfin_read_MXVR_DMA2_CONFIG()		bfin_read32(MXVR_DMA2_CONFIG)
 
- #define bfin_write_MXVR_DMA2_CONFIG(val)	bfin_write32(MXVR_DMA2_CONFIG, val)
 
- #define bfin_read_MXVR_DMA2_START_ADDR() 	bfin_read32(MXVR_DMA2_START_ADDR)
 
- #define bfin_write_MXVR_DMA2_START_ADDR(val) 	bfin_write32(MXVR_DMA2_START_ADDR)
 
- #define bfin_read_MXVR_DMA2_COUNT()		bfin_read16(MXVR_DMA2_COUNT)
 
- #define bfin_write_MXVR_DMA2_COUNT(val)		bfin_write16(MXVR_DMA2_COUNT, val)
 
- #define bfin_read_MXVR_DMA2_CURR_ADDR() 	bfin_read32(MXVR_DMA2_CURR_ADDR)
 
- #define bfin_write_MXVR_DMA2_CURR_ADDR(val) 	bfin_write32(MXVR_DMA2_CURR_ADDR)
 
- #define bfin_read_MXVR_DMA2_CURR_COUNT()	bfin_read16(MXVR_DMA2_CURR_COUNT)
 
- #define bfin_write_MXVR_DMA2_CURR_COUNT(val)	bfin_write16(MXVR_DMA2_CURR_COUNT, val)
 
- /* MXVR DMA3 Registers */
 
- #define bfin_read_MXVR_DMA3_CONFIG()		bfin_read32(MXVR_DMA3_CONFIG)
 
- #define bfin_write_MXVR_DMA3_CONFIG(val)	bfin_write32(MXVR_DMA3_CONFIG, val)
 
- #define bfin_read_MXVR_DMA3_START_ADDR() 	bfin_read32(MXVR_DMA3_START_ADDR)
 
- #define bfin_write_MXVR_DMA3_START_ADDR(val) 	bfin_write32(MXVR_DMA3_START_ADDR)
 
- #define bfin_read_MXVR_DMA3_COUNT()		bfin_read16(MXVR_DMA3_COUNT)
 
- #define bfin_write_MXVR_DMA3_COUNT(val)		bfin_write16(MXVR_DMA3_COUNT, val)
 
- #define bfin_read_MXVR_DMA3_CURR_ADDR() 	bfin_read32(MXVR_DMA3_CURR_ADDR)
 
- #define bfin_write_MXVR_DMA3_CURR_ADDR(val) 	bfin_write32(MXVR_DMA3_CURR_ADDR)
 
- #define bfin_read_MXVR_DMA3_CURR_COUNT()	bfin_read16(MXVR_DMA3_CURR_COUNT)
 
- #define bfin_write_MXVR_DMA3_CURR_COUNT(val)	bfin_write16(MXVR_DMA3_CURR_COUNT, val)
 
- /* MXVR DMA4 Registers */
 
- #define bfin_read_MXVR_DMA4_CONFIG()		bfin_read32(MXVR_DMA4_CONFIG)
 
- #define bfin_write_MXVR_DMA4_CONFIG(val)	bfin_write32(MXVR_DMA4_CONFIG, val)
 
- #define bfin_read_MXVR_DMA4_START_ADDR() 	bfin_read32(MXVR_DMA4_START_ADDR)
 
- #define bfin_write_MXVR_DMA4_START_ADDR(val) 	bfin_write32(MXVR_DMA4_START_ADDR)
 
- #define bfin_read_MXVR_DMA4_COUNT()		bfin_read16(MXVR_DMA4_COUNT)
 
- #define bfin_write_MXVR_DMA4_COUNT(val)		bfin_write16(MXVR_DMA4_COUNT, val)
 
- #define bfin_read_MXVR_DMA4_CURR_ADDR() 	bfin_read32(MXVR_DMA4_CURR_ADDR)
 
- #define bfin_write_MXVR_DMA4_CURR_ADDR(val) 	bfin_write32(MXVR_DMA4_CURR_ADDR)
 
- #define bfin_read_MXVR_DMA4_CURR_COUNT()	bfin_read16(MXVR_DMA4_CURR_COUNT)
 
- #define bfin_write_MXVR_DMA4_CURR_COUNT(val)	bfin_write16(MXVR_DMA4_CURR_COUNT, val)
 
- /* MXVR DMA5 Registers */
 
- #define bfin_read_MXVR_DMA5_CONFIG()		bfin_read32(MXVR_DMA5_CONFIG)
 
- #define bfin_write_MXVR_DMA5_CONFIG(val)	bfin_write32(MXVR_DMA5_CONFIG, val)
 
- #define bfin_read_MXVR_DMA5_START_ADDR() 	bfin_read32(MXVR_DMA5_START_ADDR)
 
- #define bfin_write_MXVR_DMA5_START_ADDR(val) 	bfin_write32(MXVR_DMA5_START_ADDR)
 
- #define bfin_read_MXVR_DMA5_COUNT()		bfin_read16(MXVR_DMA5_COUNT)
 
- #define bfin_write_MXVR_DMA5_COUNT(val)		bfin_write16(MXVR_DMA5_COUNT, val)
 
- #define bfin_read_MXVR_DMA5_CURR_ADDR() 	bfin_read32(MXVR_DMA5_CURR_ADDR)
 
- #define bfin_write_MXVR_DMA5_CURR_ADDR(val) 	bfin_write32(MXVR_DMA5_CURR_ADDR)
 
- #define bfin_read_MXVR_DMA5_CURR_COUNT()	bfin_read16(MXVR_DMA5_CURR_COUNT)
 
- #define bfin_write_MXVR_DMA5_CURR_COUNT(val)	bfin_write16(MXVR_DMA5_CURR_COUNT, val)
 
- /* MXVR DMA6 Registers */
 
- #define bfin_read_MXVR_DMA6_CONFIG()		bfin_read32(MXVR_DMA6_CONFIG)
 
 
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