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- #ifndef _OPSPUT_OPSPUT_PLD_H
- #define _OPSPUT_OPSPUT_PLD_H
- /*
- * include/asm-m32r/opsput/opsput_pld.h
- *
- * Definitions for Programmable Logic Device(PLD) on OPSPUT board.
- *
- * Copyright (c) 2002 Takeo Takahashi
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of
- * this archive for more details.
- */
- #define PLD_PLAT_BASE 0x1cc00000
- #ifndef __ASSEMBLY__
- /*
- * C functions use non-cache address.
- */
- #define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
- #define __reg8 (volatile unsigned char *)
- #define __reg16 (volatile unsigned short *)
- #define __reg32 (volatile unsigned int *)
- #else
- #define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
- #define __reg8
- #define __reg16
- #define __reg32
- #endif /* __ASSEMBLY__ */
- /* CFC */
- #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
- #define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
- #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
- #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
- #define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)
- #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
- #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
- #define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010)
- /* MMC */
- #define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
- #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
- #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
- #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
- #define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
- #define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
- #define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
- #define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
- #define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
- #define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
- #define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
- #define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
- /* ICU
- * ICUISTS: status register
- * ICUIREQ0: request register
- * ICUIREQ1: request register
- * ICUCR3: control register for CFIREQ# interrupt
- * ICUCR4: control register for CFC Card insert interrupt
- * ICUCR5: control register for CFC Card eject interrupt
- * ICUCR6: control register for external interrupt
- * ICUCR11: control register for MMC Card insert/eject interrupt
- * ICUCR13: control register for SC error interrupt
- * ICUCR14: control register for SC receive interrupt
- * ICUCR15: control register for SC send interrupt
- * ICUCR16: control register for SIO0 receive interrupt
- * ICUCR17: control register for SIO0 send interrupt
- */
- #if !defined(CONFIG_PLAT_USRV)
- #define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */
- #define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */
- #define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */
- #define PLD_IRQ_CFIREQ (OPSPUT_PLD_IRQ_BASE + 3) /* CF IREQ */
- #define PLD_IRQ_CFC_INSERT (OPSPUT_PLD_IRQ_BASE + 4) /* CF Insert */
- #define PLD_IRQ_CFC_EJECT (OPSPUT_PLD_IRQ_BASE + 5) /* CF Eject */
- #define PLD_IRQ_EXINT (OPSPUT_PLD_IRQ_BASE + 6) /* EXINT */
- #define PLD_IRQ_INT7 (OPSPUT_PLD_IRQ_BASE + 7) /* reserved */
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