memoryOperation.c 21 KB

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  1. /*
  2. * GPIO Abstraction Layer
  3. *
  4. * Copyright 2006-2010 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later
  7. */
  8. #include <linux/delay.h>
  9. #include <linux/module.h>
  10. #include <linux/err.h>
  11. #include <linux/proc_fs.h>
  12. #include <linux/seq_file.h>
  13. #include <asm/blackfin.h>
  14. #include <asm/gpio.h>
  15. #include <asm/portmux.h>
  16. #include <linux/irq.h>
  17. #include <asm/irq_handler.h>
  18. #if ANOMALY_05000311 || ANOMALY_05000323
  19. enum {
  20. AWA_data = SYSCR,
  21. AWA_data_clear = SYSCR,
  22. AWA_data_set = SYSCR,
  23. AWA_toggle = SYSCR,
  24. AWA_maska = BFIN_UART_SCR,
  25. AWA_maska_clear = BFIN_UART_SCR,
  26. AWA_maska_set = BFIN_UART_SCR,
  27. AWA_maska_toggle = BFIN_UART_SCR,
  28. AWA_maskb = BFIN_UART_GCTL,
  29. AWA_maskb_clear = BFIN_UART_GCTL,
  30. AWA_maskb_set = BFIN_UART_GCTL,
  31. AWA_maskb_toggle = BFIN_UART_GCTL,
  32. AWA_dir = SPORT1_STAT,
  33. AWA_polar = SPORT1_STAT,
  34. AWA_edge = SPORT1_STAT,
  35. AWA_both = SPORT1_STAT,
  36. #if ANOMALY_05000311
  37. AWA_inen = TIMER_ENABLE,
  38. #elif ANOMALY_05000323
  39. AWA_inen = DMA1_1_CONFIG,
  40. #endif
  41. };
  42. /* Anomaly Workaround */
  43. #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
  44. #else
  45. #define AWA_DUMMY_READ(...) do { } while (0)
  46. #endif
  47. static struct gpio_port_t * const gpio_array[] = {
  48. #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
  49. (struct gpio_port_t *) FIO_FLAG_D,
  50. #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  51. (struct gpio_port_t *) PORTFIO,
  52. (struct gpio_port_t *) PORTGIO,
  53. (struct gpio_port_t *) PORTHIO,
  54. #elif defined(BF561_FAMILY)
  55. (struct gpio_port_t *) FIO0_FLAG_D,
  56. (struct gpio_port_t *) FIO1_FLAG_D,
  57. (struct gpio_port_t *) FIO2_FLAG_D,
  58. #elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
  59. (struct gpio_port_t *)PORTA_FER,
  60. (struct gpio_port_t *)PORTB_FER,
  61. (struct gpio_port_t *)PORTC_FER,
  62. (struct gpio_port_t *)PORTD_FER,
  63. (struct gpio_port_t *)PORTE_FER,
  64. (struct gpio_port_t *)PORTF_FER,
  65. (struct gpio_port_t *)PORTG_FER,
  66. # if defined(CONFIG_BF54x)
  67. (struct gpio_port_t *)PORTH_FER,
  68. (struct gpio_port_t *)PORTI_FER,
  69. (struct gpio_port_t *)PORTJ_FER,
  70. # endif
  71. #else
  72. # error no gpio arrays defined
  73. #endif
  74. };
  75. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  76. static unsigned short * const port_fer[] = {
  77. (unsigned short *) PORTF_FER,
  78. (unsigned short *) PORTG_FER,
  79. (unsigned short *) PORTH_FER,
  80. };
  81. # if !defined(BF537_FAMILY)
  82. static unsigned short * const port_mux[] = {
  83. (unsigned short *) PORTF_MUX,
  84. (unsigned short *) PORTG_MUX,
  85. (unsigned short *) PORTH_MUX,
  86. };
  87. static const
  88. u8 pmux_offset[][16] = {
  89. # if defined(CONFIG_BF52x)
  90. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
  91. { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
  92. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
  93. # elif defined(CONFIG_BF51x)
  94. { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
  95. { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
  96. { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
  97. # endif
  98. };
  99. # endif
  100. #elif defined(BF538_FAMILY)
  101. static unsigned short * const port_fer[] = {
  102. (unsigned short *) PORTCIO_FER,
  103. (unsigned short *) PORTDIO_FER,
  104. (unsigned short *) PORTEIO_FER,
  105. };
  106. #endif
  107. #define RESOURCE_LABEL_SIZE 16
  108. static struct str_ident {
  109. char name[RESOURCE_LABEL_SIZE];
  110. } str_ident[MAX_RESOURCES];
  111. #if defined(CONFIG_PM)
  112. static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
  113. # ifdef BF538_FAMILY
  114. static unsigned short port_fer_saved[3];
  115. # endif
  116. #endif
  117. static void gpio_error(unsigned gpio)
  118. {
  119. printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
  120. }
  121. static void set_label(unsigned short ident, const char *label)
  122. {
  123. if (label) {
  124. strncpy(str_ident[ident].name, label,
  125. RESOURCE_LABEL_SIZE);
  126. str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
  127. }
  128. }
  129. static char *get_label(unsigned short ident)
  130. {
  131. return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
  132. }
  133. static int cmp_label(unsigned short ident, const char *label)
  134. {
  135. if (label == NULL) {
  136. dump_stack();
  137. printk(KERN_ERR "Please provide none-null label\n");
  138. }
  139. if (label)
  140. return strcmp(str_ident[ident].name, label);
  141. else
  142. return -EINVAL;
  143. }
  144. #define map_entry(m, i) reserved_##m##_map[gpio_bank(i)]
  145. #define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i))
  146. #define reserve(m, i) (map_entry(m, i) |= gpio_bit(i))
  147. #define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i))
  148. #define DECLARE_RESERVED_MAP(m, c) static unsigned short reserved_##m##_map[c]
  149. DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM);
  150. DECLARE_RESERVED_MAP(peri, DIV_ROUND_UP(MAX_RESOURCES, GPIO_BANKSIZE));
  151. DECLARE_RESERVED_MAP(gpio_irq, GPIO_BANK_NUM);
  152. inline int check_gpio(unsigned gpio)
  153. {
  154. #if defined(CONFIG_BF54x)
  155. if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
  156. || gpio == GPIO_PH14 || gpio == GPIO_PH15
  157. || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
  158. return -EINVAL;
  159. #endif
  160. if (gpio >= MAX_BLACKFIN_GPIOS)
  161. return -EINVAL;
  162. return 0;
  163. }
  164. static void port_setup(unsigned gpio, unsigned short usage)
  165. {
  166. #if defined(BF538_FAMILY)
  167. /*
  168. * BF538/9 Port C,D and E are special.
  169. * Inverted PORT_FER polarity on CDE and no PORF_FER on F
  170. * Regular PORT F GPIOs are handled here, CDE are exclusively
  171. * managed by GPIOLIB
  172. */
  173. if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
  174. return;
  175. gpio -= MAX_BLACKFIN_GPIOS;
  176. if (usage == GPIO_USAGE)
  177. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  178. else
  179. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  180. SSYNC();
  181. return;
  182. #endif
  183. if (check_gpio(gpio))
  184. return;
  185. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  186. if (usage == GPIO_USAGE)
  187. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  188. else
  189. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  190. SSYNC();
  191. #elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
  192. if (usage == GPIO_USAGE)
  193. gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
  194. else
  195. gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
  196. SSYNC();
  197. #endif
  198. }
  199. #ifdef BF537_FAMILY
  200. static const s8 port_mux[] = {
  201. [GPIO_PF0] = 3,
  202. [GPIO_PF1] = 3,
  203. [GPIO_PF2] = 4,
  204. [GPIO_PF3] = 4,
  205. [GPIO_PF4] = 5,
  206. [GPIO_PF5] = 6,
  207. [GPIO_PF6] = 7,
  208. [GPIO_PF7] = 8,
  209. [GPIO_PF8 ... GPIO_PF15] = -1,
  210. [GPIO_PG0 ... GPIO_PG7] = -1,
  211. [GPIO_PG8] = 9,
  212. [GPIO_PG9] = 9,
  213. [GPIO_PG10] = 10,
  214. [GPIO_PG11] = 10,
  215. [GPIO_PG12] = 10,
  216. [GPIO_PG13] = 11,
  217. [GPIO_PG14] = 11,
  218. [GPIO_PG15] = 11,
  219. [GPIO_PH0 ... GPIO_PH15] = -1,
  220. [PORT_PJ0 ... PORT_PJ3] = -1,
  221. [PORT_PJ4] = 1,
  222. [PORT_PJ5] = 1,
  223. [PORT_PJ6 ... PORT_PJ9] = -1,
  224. [PORT_PJ10] = 0,
  225. [PORT_PJ11] = 0,
  226. };
  227. static int portmux_group_check(unsigned short per)
  228. {
  229. u16 ident = P_IDENT(per);
  230. u16 function = P_FUNCT2MUX(per);
  231. s8 offset = port_mux[ident];
  232. u16 m, pmux, pfunc;
  233. if (offset < 0)
  234. return 0;
  235. pmux = bfin_read_PORT_MUX();
  236. for (m = 0; m < ARRAY_SIZE(port_mux); ++m) {
  237. if (m == ident)
  238. continue;
  239. if (port_mux[m] != offset)
  240. continue;
  241. if (!is_reserved(peri, m, 1))
  242. continue;
  243. if (offset == 1)
  244. pfunc = (pmux >> offset) & 3;
  245. else
  246. pfunc = (pmux >> offset) & 1;
  247. if (pfunc != function) {
  248. pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n",
  249. ident, function, m, pfunc);
  250. return -EINVAL;
  251. }
  252. }
  253. return 0;
  254. }
  255. static void portmux_setup(unsigned short per)
  256. {
  257. u16 ident = P_IDENT(per);
  258. u16 function = P_FUNCT2MUX(per);
  259. s8 offset = port_mux[ident];
  260. u16 pmux;
  261. if (offset == -1)
  262. return;
  263. pmux = bfin_read_PORT_MUX();
  264. if (offset != 1)
  265. pmux &= ~(1 << offset);
  266. else
  267. pmux &= ~(3 << 1);
  268. pmux |= (function << offset);
  269. bfin_write_PORT_MUX(pmux);
  270. }
  271. #elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
  272. inline void portmux_setup(unsigned short per)
  273. {
  274. u16 ident = P_IDENT(per);
  275. u16 function = P_FUNCT2MUX(per);
  276. u32 pmux;
  277. pmux = gpio_array[gpio_bank(ident)]->port_mux;
  278. pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
  279. pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
  280. gpio_array[gpio_bank(ident)]->port_mux = pmux;
  281. }
  282. inline u16 get_portmux(unsigned short per)
  283. {
  284. u16 ident = P_IDENT(per);
  285. u32 pmux = gpio_array[gpio_bank(ident)]->port_mux;
  286. return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
  287. }
  288. static int portmux_group_check(unsigned short per)
  289. {
  290. return 0;
  291. }
  292. #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  293. static int portmux_group_check(unsigned short per)
  294. {
  295. u16 ident = P_IDENT(per);
  296. u16 function = P_FUNCT2MUX(per);
  297. u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
  298. u16 pin, gpiopin, pfunc;
  299. for (pin = 0; pin < GPIO_BANKSIZE; ++pin) {
  300. if (offset != pmux_offset[gpio_bank(ident)][pin])
  301. continue;
  302. gpiopin = gpio_bank(ident) * GPIO_BANKSIZE + pin;
  303. if (gpiopin == ident)
  304. continue;
  305. if (!is_reserved(peri, gpiopin, 1))
  306. continue;
  307. pfunc = *port_mux[gpio_bank(ident)];
  308. pfunc = (pfunc >> offset) & 3;
  309. if (pfunc != function) {
  310. pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n",
  311. ident, function, gpiopin, pfunc);
  312. return -EINVAL;
  313. }
  314. }
  315. return 0;
  316. }
  317. inline void portmux_setup(unsigned short per)
  318. {
  319. u16 ident = P_IDENT(per);
  320. u16 function = P_FUNCT2MUX(per);
  321. u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
  322. u16 pmux;
  323. pmux = *port_mux[gpio_bank(ident)];
  324. if (((pmux >> offset) & 3) == function)
  325. return;
  326. pmux &= ~(3 << offset);
  327. pmux |= (function & 3) << offset;
  328. *port_mux[gpio_bank(ident)] = pmux;
  329. SSYNC();
  330. }
  331. #else
  332. # define portmux_setup(...) do { } while (0)
  333. static int portmux_group_check(unsigned short per)
  334. {
  335. return 0;
  336. }
  337. #endif
  338. #if !(defined(CONFIG_BF54x) || defined(CONFIG_BF60x))
  339. /***********************************************************
  340. *
  341. * FUNCTIONS: Blackfin General Purpose Ports Access Functions
  342. *
  343. * INPUTS/OUTPUTS:
  344. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  345. *
  346. *
  347. * DESCRIPTION: These functions abstract direct register access
  348. * to Blackfin processor General Purpose
  349. * Ports Regsiters
  350. *
  351. * CAUTION: These functions do not belong to the GPIO Driver API
  352. *************************************************************
  353. * MODIFICATION HISTORY :
  354. **************************************************************/
  355. /* Set a specific bit */
  356. #define SET_GPIO(name) \
  357. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  358. { \
  359. unsigned long flags; \
  360. flags = hard_local_irq_save(); \
  361. if (arg) \
  362. gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
  363. else \
  364. gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
  365. AWA_DUMMY_READ(name); \
  366. hard_local_irq_restore(flags); \
  367. } \
  368. EXPORT_SYMBOL(set_gpio_ ## name);
  369. SET_GPIO(dir) /* set_gpio_dir() */
  370. SET_GPIO(inen) /* set_gpio_inen() */
  371. SET_GPIO(polar) /* set_gpio_polar() */
  372. SET_GPIO(edge) /* set_gpio_edge() */
  373. SET_GPIO(both) /* set_gpio_both() */
  374. #define SET_GPIO_SC(name) \
  375. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  376. { \
  377. unsigned long flags; \
  378. if (ANOMALY_05000311 || ANOMALY_05000323) \
  379. flags = hard_local_irq_save(); \
  380. if (arg) \
  381. gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  382. else \
  383. gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  384. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  385. AWA_DUMMY_READ(name); \
  386. hard_local_irq_restore(flags); \
  387. } \
  388. } \
  389. EXPORT_SYMBOL(set_gpio_ ## name);
  390. SET_GPIO_SC(maska)
  391. SET_GPIO_SC(maskb)
  392. SET_GPIO_SC(data)
  393. void set_gpio_toggle(unsigned gpio)
  394. {
  395. unsigned long flags;
  396. if (ANOMALY_05000311 || ANOMALY_05000323)
  397. flags = hard_local_irq_save();
  398. gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  399. if (ANOMALY_05000311 || ANOMALY_05000323) {
  400. AWA_DUMMY_READ(toggle);
  401. hard_local_irq_restore(flags);
  402. }
  403. }
  404. EXPORT_SYMBOL(set_gpio_toggle);
  405. /*Set current PORT date (16-bit word)*/
  406. #define SET_GPIO_P(name) \
  407. void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
  408. { \
  409. unsigned long flags; \
  410. if (ANOMALY_05000311 || ANOMALY_05000323) \
  411. flags = hard_local_irq_save(); \
  412. gpio_array[gpio_bank(gpio)]->name = arg; \
  413. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  414. AWA_DUMMY_READ(name); \
  415. hard_local_irq_restore(flags); \
  416. } \
  417. } \
  418. EXPORT_SYMBOL(set_gpiop_ ## name);
  419. SET_GPIO_P(data)
  420. SET_GPIO_P(dir)
  421. SET_GPIO_P(inen)
  422. SET_GPIO_P(polar)
  423. SET_GPIO_P(edge)
  424. SET_GPIO_P(both)
  425. SET_GPIO_P(maska)
  426. SET_GPIO_P(maskb)
  427. /* Get a specific bit */
  428. #define GET_GPIO(name) \
  429. unsigned short get_gpio_ ## name(unsigned gpio) \
  430. { \
  431. unsigned long flags; \
  432. unsigned short ret; \
  433. if (ANOMALY_05000311 || ANOMALY_05000323) \
  434. flags = hard_local_irq_save(); \
  435. ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
  436. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  437. AWA_DUMMY_READ(name); \
  438. hard_local_irq_restore(flags); \
  439. } \
  440. return ret; \
  441. } \
  442. EXPORT_SYMBOL(get_gpio_ ## name);
  443. GET_GPIO(data)
  444. GET_GPIO(dir)
  445. GET_GPIO(inen)
  446. GET_GPIO(polar)
  447. GET_GPIO(edge)
  448. GET_GPIO(both)
  449. GET_GPIO(maska)
  450. GET_GPIO(maskb)
  451. /*Get current PORT date (16-bit word)*/
  452. #define GET_GPIO_P(name) \
  453. unsigned short get_gpiop_ ## name(unsigned gpio) \
  454. { \
  455. unsigned long flags; \
  456. unsigned short ret; \
  457. if (ANOMALY_05000311 || ANOMALY_05000323) \
  458. flags = hard_local_irq_save(); \
  459. ret = (gpio_array[gpio_bank(gpio)]->name); \
  460. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  461. AWA_DUMMY_READ(name); \
  462. hard_local_irq_restore(flags); \
  463. } \
  464. return ret; \
  465. } \
  466. EXPORT_SYMBOL(get_gpiop_ ## name);
  467. GET_GPIO_P(data)
  468. GET_GPIO_P(dir)
  469. GET_GPIO_P(inen)
  470. GET_GPIO_P(polar)
  471. GET_GPIO_P(edge)
  472. GET_GPIO_P(both)
  473. GET_GPIO_P(maska)
  474. GET_GPIO_P(maskb)
  475. #ifdef CONFIG_PM
  476. DECLARE_RESERVED_MAP(wakeup, GPIO_BANK_NUM);
  477. static const unsigned int sic_iwr_irqs[] = {
  478. #if defined(BF533_FAMILY)
  479. IRQ_PROG_INTB
  480. #elif defined(BF537_FAMILY)
  481. IRQ_PF_INTB_WATCH, IRQ_PORTG_INTB, IRQ_PH_INTB_MAC_TX
  482. #elif defined(BF538_FAMILY)
  483. IRQ_PORTF_INTB
  484. #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  485. IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
  486. #elif defined(BF561_FAMILY)
  487. IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
  488. #else
  489. # error no SIC_IWR defined
  490. #endif
  491. };
  492. /***********************************************************
  493. *
  494. * FUNCTIONS: Blackfin PM Setup API
  495. *
  496. * INPUTS/OUTPUTS:
  497. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  498. * type -
  499. * PM_WAKE_RISING
  500. * PM_WAKE_FALLING
  501. * PM_WAKE_HIGH
  502. * PM_WAKE_LOW
  503. * PM_WAKE_BOTH_EDGES
  504. *
  505. * DESCRIPTION: Blackfin PM Driver API
  506. *
  507. * CAUTION:
  508. *************************************************************
  509. * MODIFICATION HISTORY :
  510. **************************************************************/
  511. int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
  512. {
  513. unsigned long flags;
  514. if (check_gpio(gpio) < 0)
  515. return -EINVAL;
  516. flags = hard_local_irq_save();
  517. if (ctrl)
  518. reserve(wakeup, gpio);
  519. else
  520. unreserve(wakeup, gpio);
  521. set_gpio_maskb(gpio, ctrl);
  522. hard_local_irq_restore(flags);
  523. return 0;
  524. }
  525. int bfin_pm_standby_ctrl(unsigned ctrl)
  526. {
  527. u16 bank, mask, i;
  528. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  529. mask = map_entry(wakeup, i);
  530. bank = gpio_bank(i);
  531. if (mask)
  532. bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl);
  533. }
  534. return 0;
  535. }
  536. void bfin_gpio_pm_hibernate_suspend(void)
  537. {
  538. int i, bank;
  539. #ifdef BF538_FAMILY
  540. for (i = 0; i < ARRAY_SIZE(port_fer_saved); ++i)
  541. port_fer_saved[i] = *port_fer[i];
  542. #endif
  543. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  544. bank = gpio_bank(i);
  545. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  546. gpio_bank_saved[bank].fer = *port_fer[bank];
  547. #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  548. gpio_bank_saved[bank].mux = *port_mux[bank];
  549. #else
  550. if (bank == 0)
  551. gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
  552. #endif
  553. #endif
  554. gpio_bank_saved[bank].data = gpio_array[bank]->data;
  555. gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
  556. gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
  557. gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
  558. gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
  559. gpio_bank_saved[bank].both = gpio_array[bank]->both;
  560. gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
  561. }
  562. #ifdef BFIN_SPECIAL_GPIO_BANKS
  563. bfin_special_gpio_pm_hibernate_suspend();
  564. #endif
  565. AWA_DUMMY_READ(maska);
  566. }
  567. void bfin_gpio_pm_hibernate_restore(void)
  568. {
  569. int i, bank;
  570. #ifdef BF538_FAMILY
  571. for (i = 0; i < ARRAY_SIZE(port_fer_saved); ++i)
  572. *port_fer[i] = port_fer_saved[i];
  573. #endif
  574. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  575. bank = gpio_bank(i);
  576. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  577. #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  578. *port_mux[bank] = gpio_bank_saved[bank].mux;
  579. #else
  580. if (bank == 0)
  581. bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
  582. #endif
  583. *port_fer[bank] = gpio_bank_saved[bank].fer;
  584. #endif
  585. gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
  586. gpio_array[bank]->data_set = gpio_bank_saved[bank].data
  587. & gpio_bank_saved[bank].dir;
  588. gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
  589. gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
  590. gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
  591. gpio_array[bank]->both = gpio_bank_saved[bank].both;
  592. gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
  593. }
  594. #ifdef BFIN_SPECIAL_GPIO_BANKS
  595. bfin_special_gpio_pm_hibernate_restore();
  596. #endif
  597. AWA_DUMMY_READ(maska);
  598. }
  599. #endif
  600. #else /* CONFIG_BF54x || CONFIG_BF60x */
  601. #ifdef CONFIG_PM
  602. int bfin_pm_standby_ctrl(unsigned ctrl)
  603. {
  604. return 0;
  605. }
  606. void bfin_gpio_pm_hibernate_suspend(void)
  607. {
  608. int i, bank;
  609. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  610. bank = gpio_bank(i);
  611. gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
  612. gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
  613. gpio_bank_saved[bank].data = gpio_array[bank]->data;
  614. gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
  615. gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
  616. }
  617. }
  618. void bfin_gpio_pm_hibernate_restore(void)
  619. {
  620. int i, bank;
  621. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  622. bank = gpio_bank(i);
  623. gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
  624. gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
  625. gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
  626. gpio_array[bank]->data_set = gpio_bank_saved[bank].data
  627. & gpio_bank_saved[bank].dir;
  628. gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
  629. }
  630. }
  631. #endif
  632. unsigned short get_gpio_dir(unsigned gpio)
  633. {
  634. return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
  635. }
  636. EXPORT_SYMBOL(get_gpio_dir);
  637. #endif /* CONFIG_BF54x || CONFIG_BF60x */
  638. /***********************************************************
  639. *
  640. * FUNCTIONS: Blackfin Peripheral Resource Allocation
  641. * and PortMux Setup
  642. *
  643. * INPUTS/OUTPUTS:
  644. * per Peripheral Identifier
  645. * label String
  646. *
  647. * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
  648. *
  649. * CAUTION:
  650. *************************************************************
  651. * MODIFICATION HISTORY :
  652. **************************************************************/
  653. int peripheral_request(unsigned short per, const char *label)
  654. {
  655. unsigned long flags;
  656. unsigned short ident = P_IDENT(per);
  657. /*
  658. * Don't cares are pins with only one dedicated function
  659. */
  660. if (per & P_DONTCARE)
  661. return 0;
  662. if (!(per & P_DEFINED))
  663. return -ENODEV;
  664. BUG_ON(ident >= MAX_RESOURCES);
  665. flags = hard_local_irq_save();
  666. /* If a pin can be muxed as either GPIO or peripheral, make
  667. * sure it is not already a GPIO pin when we request it.
  668. */
  669. if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) {
  670. if (system_state == SYSTEM_BOOTING)
  671. dump_stack();
  672. printk(KERN_ERR
  673. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  674. __func__, ident, get_label(ident));
  675. hard_local_irq_restore(flags);
  676. return -EBUSY;
  677. }
  678. if (unlikely(is_reserved(peri, ident, 1))) {
  679. /*
  680. * Pin functions like AMC address strobes my
  681. * be requested and used by several drivers
  682. */
  683. #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
  684. if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
  685. #else
  686. if (!(per & P_MAYSHARE)) {
  687. #endif
  688. /*
  689. * Allow that the identical pin function can
  690. * be requested from the same driver twice
  691. */
  692. if (cmp_label(ident, label) == 0)
  693. goto anyway;
  694. if (system_state == SYSTEM_BOOTING)
  695. dump_stack();
  696. printk(KERN_ERR
  697. "%s: Peripheral %d function %d is already reserved by %s !\n",
  698. __func__, ident, P_FUNCT2MUX(per), get_label(ident));
  699. hard_local_irq_restore(flags);
  700. return -EBUSY;
  701. }
  702. }
  703. if (unlikely(portmux_group_check(per))) {
  704. hard_local_irq_restore(flags);
  705. return -EBUSY;
  706. }
  707. anyway:
  708. reserve(peri, ident);
  709. portmux_setup(per);
  710. port_setup(ident, PERIPHERAL_USAGE);
  711. hard_local_irq_restore(flags);
  712. set_label(ident, label);
  713. return 0;
  714. }
  715. EXPORT_SYMBOL(peripheral_request);
  716. int peripheral_request_list(const unsigned short per[], const char *label)
  717. {
  718. u16 cnt;
  719. int ret;
  720. for (cnt = 0; per[cnt] != 0; cnt++) {
  721. ret = peripheral_request(per[cnt], label);
  722. if (ret < 0) {
  723. for ( ; cnt > 0; cnt--)
  724. peripheral_free(per[cnt - 1]);
  725. return ret;
  726. }
  727. }
  728. return 0;
  729. }
  730. EXPORT_SYMBOL(peripheral_request_list);
  731. void peripheral_free(unsigned short per)
  732. {
  733. unsigned long flags;
  734. unsigned short ident = P_IDENT(per);
  735. if (per & P_DONTCARE)
  736. return;
  737. if (!(per & P_DEFINED))
  738. return;
  739. flags = hard_local_irq_save();
  740. if (unlikely(!is_reserved(peri, ident, 0))) {
  741. hard_local_irq_restore(flags);
  742. return;
  743. }
  744. if (!(per & P_MAYSHARE))
  745. port_setup(ident, GPIO_USAGE);
  746. unreserve(peri, ident);
  747. set_label(ident, "free");
  748. hard_local_irq_restore(flags);
  749. }
  750. EXPORT_SYMBOL(peripheral_free);
  751. void peripheral_free_list(const unsigned short per[])
  752. {
  753. u16 cnt;
  754. for (cnt = 0; per[cnt] != 0; cnt++)
  755. peripheral_free(per[cnt]);
  756. }
  757. EXPORT_SYMBOL(peripheral_free_list);
  758. /***********************************************************
  759. *
  760. * FUNCTIONS: Blackfin GPIO Driver
  761. *
  762. * INPUTS/OUTPUTS:
  763. * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
  764. * label String
  765. *