synchronousMemoryDatabase.h 5.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160
  1. /*
  2. * include/asm-m68k/dma.h
  3. *
  4. * Copyright 1995 (C) David S. Miller (davem@caip.rutgers.edu)
  5. *
  6. * Hacked to fit Sun3x needs by Thomas Bogendoerfer
  7. */
  8. #ifndef __M68K_DVMA_H
  9. #define __M68K_DVMA_H
  10. #define DVMA_PAGE_SHIFT 13
  11. #define DVMA_PAGE_SIZE (1UL << DVMA_PAGE_SHIFT)
  12. #define DVMA_PAGE_MASK (~(DVMA_PAGE_SIZE-1))
  13. #define DVMA_PAGE_ALIGN(addr) ALIGN(addr, DVMA_PAGE_SIZE)
  14. extern void dvma_init(void);
  15. extern int dvma_map_iommu(unsigned long kaddr, unsigned long baddr,
  16. int len);
  17. #define dvma_malloc(x) dvma_malloc_align(x, 0)
  18. #define dvma_map(x, y) dvma_map_align(x, y, 0)
  19. #define dvma_map_vme(x, y) (dvma_map(x, y) & 0xfffff)
  20. #define dvma_map_align_vme(x, y, z) (dvma_map_align (x, y, z) & 0xfffff)
  21. extern unsigned long dvma_map_align(unsigned long kaddr, int len,
  22. int align);
  23. extern void *dvma_malloc_align(unsigned long len, unsigned long align);
  24. extern void dvma_unmap(void *baddr);
  25. extern void dvma_free(void *vaddr);
  26. #ifdef CONFIG_SUN3
  27. /* sun3 dvma page support */
  28. /* memory and pmegs potentially reserved for dvma */
  29. #define DVMA_PMEG_START 10
  30. #define DVMA_PMEG_END 16
  31. #define DVMA_START 0xf00000
  32. #define DVMA_END 0xfe0000
  33. #define DVMA_SIZE (DVMA_END-DVMA_START)
  34. #define IOMMU_TOTAL_ENTRIES 128
  35. #define IOMMU_ENTRIES 120
  36. /* empirical kludge -- dvma regions only seem to work right on 0x10000
  37. byte boundaries */
  38. #define DVMA_REGION_SIZE 0x10000
  39. #define DVMA_ALIGN(addr) (((addr)+DVMA_REGION_SIZE-1) & \
  40. ~(DVMA_REGION_SIZE-1))
  41. /* virt <-> phys conversions */
  42. #define dvma_vtop(x) ((unsigned long)(x) & 0xffffff)
  43. #define dvma_ptov(x) ((unsigned long)(x) | 0xf000000)
  44. #define dvma_vtovme(x) ((unsigned long)(x) & 0x00fffff)
  45. #define dvma_vmetov(x) ((unsigned long)(x) | 0xff00000)
  46. #define dvma_vtob(x) dvma_vtop(x)
  47. #define dvma_btov(x) dvma_ptov(x)
  48. static inline int dvma_map_cpu(unsigned long kaddr, unsigned long vaddr,
  49. int len)
  50. {
  51. return 0;
  52. }
  53. #else /* Sun3x */
  54. /* sun3x dvma page support */
  55. #define DVMA_START 0x0
  56. #define DVMA_END 0xf00000
  57. #define DVMA_SIZE (DVMA_END-DVMA_START)
  58. #define IOMMU_TOTAL_ENTRIES 2048
  59. /* the prom takes the top meg */
  60. #define IOMMU_ENTRIES (IOMMU_TOTAL_ENTRIES - 0x80)
  61. #define dvma_vtob(x) ((unsigned long)(x) & 0x00ffffff)
  62. #define dvma_btov(x) ((unsigned long)(x) | 0xff000000)
  63. extern int dvma_map_cpu(unsigned long kaddr, unsigned long vaddr, int len);
  64. /* everything below this line is specific to dma used for the onboard
  65. ESP scsi on sun3x */
  66. /* Structure to describe the current status of DMA registers on the Sparc */
  67. struct sparc_dma_registers {
  68. __volatile__ unsigned long cond_reg; /* DMA condition register */
  69. __volatile__ unsigned long st_addr; /* Start address of this transfer */
  70. __volatile__ unsigned long cnt; /* How many bytes to transfer */
  71. __volatile__ unsigned long dma_test; /* DMA test register */
  72. };
  73. /* DVMA chip revisions */
  74. enum dvma_rev {
  75. dvmarev0,
  76. dvmaesc1,
  77. dvmarev1,
  78. dvmarev2,
  79. dvmarev3,
  80. dvmarevplus,
  81. dvmahme
  82. };
  83. #define DMA_HASCOUNT(rev) ((rev)==dvmaesc1)
  84. /* Linux DMA information structure, filled during probe. */
  85. struct Linux_SBus_DMA {
  86. struct Linux_SBus_DMA *next;
  87. struct linux_sbus_device *SBus_dev;
  88. struct sparc_dma_registers *regs;
  89. /* Status, misc info */
  90. int node; /* Prom node for this DMA device */
  91. int running; /* Are we doing DMA now? */
  92. int allocated; /* Are we "owned" by anyone yet? */
  93. /* Transfer information. */
  94. unsigned long addr; /* Start address of current transfer */
  95. int nbytes; /* Size of current transfer */
  96. int realbytes; /* For splitting up large transfers, etc. */
  97. /* DMA revision */
  98. enum dvma_rev revision;
  99. };
  100. extern struct Linux_SBus_DMA *dma_chain;
  101. /* Broken hardware... */
  102. #define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1)
  103. #define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1)
  104. /* Fields in the cond_reg register */
  105. /* First, the version identification bits */
  106. #define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */
  107. #define DMA_VERS0 0x00000000 /* Sunray DMA version */
  108. #define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */
  109. #define DMA_VERS1 0x80000000 /* DMA rev 1 */
  110. #define DMA_VERS2 0xa0000000 /* DMA rev 2 */
  111. #define DMA_VERHME 0xb0000000 /* DMA hme gate array */
  112. #define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */
  113. #define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */
  114. #define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */
  115. #define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */
  116. #define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */
  117. #define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */
  118. #define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */
  119. #define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */
  120. #define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */
  121. #define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */
  122. #define DMA_ST_WRITE 0x00000100 /* write from device to memory */
  123. #define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */
  124. #define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */
  125. #define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */
  126. #define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */
  127. #define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */
  128. #define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */
  129. #define DMA_TERM_CNTR 0x00004000 /* Terminal counter */