synchronousMemoryDatabase.c 8.6 KB

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  1. /*
  2. * TI DA830/OMAP L137 EVM board
  3. *
  4. * Author: Mark A. Greer <mgreer@mvista.com>
  5. * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
  6. *
  7. * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
  8. * the terms of the GNU General Public License version 2. This program
  9. * is licensed "as is" without any warranty of any kind, whether express
  10. * or implied.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/console.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/i2c.h>
  19. #include <linux/i2c/pcf857x.h>
  20. #include <linux/i2c/at24.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/partitions.h>
  23. #include <linux/spi/spi.h>
  24. #include <linux/spi/flash.h>
  25. #include <asm/mach-types.h>
  26. #include <asm/mach/arch.h>
  27. #include <mach/cp_intc.h>
  28. #include <mach/mux.h>
  29. #include <linux/platform_data/mtd-davinci.h>
  30. #include <mach/da8xx.h>
  31. #include <linux/platform_data/usb-davinci.h>
  32. #include <linux/platform_data/mtd-davinci-aemif.h>
  33. #include <linux/platform_data/spi-davinci.h>
  34. #define DA830_EVM_PHY_ID ""
  35. /*
  36. * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
  37. */
  38. #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
  39. #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
  40. static const short da830_evm_usb11_pins[] = {
  41. DA830_GPIO1_15, DA830_GPIO2_4,
  42. -1
  43. };
  44. static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
  45. static int da830_evm_usb_set_power(unsigned port, int on)
  46. {
  47. gpio_set_value(ON_BD_USB_DRV, on);
  48. return 0;
  49. }
  50. static int da830_evm_usb_get_power(unsigned port)
  51. {
  52. return gpio_get_value(ON_BD_USB_DRV);
  53. }
  54. static int da830_evm_usb_get_oci(unsigned port)
  55. {
  56. return !gpio_get_value(ON_BD_USB_OVC);
  57. }
  58. static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
  59. static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
  60. {
  61. int irq = gpio_to_irq(ON_BD_USB_OVC);
  62. int error = 0;
  63. if (handler != NULL) {
  64. da830_evm_usb_ocic_handler = handler;
  65. error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
  66. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  67. "OHCI over-current indicator", NULL);
  68. if (error)
  69. printk(KERN_ERR "%s: could not request IRQ to watch "
  70. "over-current indicator changes\n", __func__);
  71. } else
  72. free_irq(irq, NULL);
  73. return error;
  74. }
  75. static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
  76. .set_power = da830_evm_usb_set_power,
  77. .get_power = da830_evm_usb_get_power,
  78. .get_oci = da830_evm_usb_get_oci,
  79. .ocic_notify = da830_evm_usb_ocic_notify,
  80. /* TPS2065 switch @ 5V */
  81. .potpgt = (3 + 1) / 2, /* 3 ms max */
  82. };
  83. static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
  84. {
  85. da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
  86. return IRQ_HANDLED;
  87. }
  88. static __init void da830_evm_usb_init(void)
  89. {
  90. u32 cfgchip2;
  91. int ret;
  92. /*
  93. * Set up USB clock/mode in the CFGCHIP2 register.
  94. * FYI: CFGCHIP2 is 0x0000ef00 initially.
  95. */
  96. cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
  97. /* USB2.0 PHY reference clock is 24 MHz */
  98. cfgchip2 &= ~CFGCHIP2_REFFREQ;
  99. cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
  100. /*
  101. * Select internal reference clock for USB 2.0 PHY
  102. * and use it as a clock source for USB 1.1 PHY
  103. * (this is the default setting anyway).
  104. */
  105. cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
  106. cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
  107. /*
  108. * We have to override VBUS/ID signals when MUSB is configured into the
  109. * host-only mode -- ID pin will float if no cable is connected, so the
  110. * controller won't be able to drive VBUS thinking that it's a B-device.
  111. * Otherwise, we want to use the OTG mode and enable VBUS comparators.
  112. */
  113. cfgchip2 &= ~CFGCHIP2_OTGMODE;
  114. #ifdef CONFIG_USB_MUSB_HOST
  115. cfgchip2 |= CFGCHIP2_FORCE_HOST;
  116. #else
  117. cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
  118. #endif
  119. __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
  120. /* USB_REFCLKIN is not used. */
  121. ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
  122. if (ret)
  123. pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
  124. __func__, ret);
  125. else {
  126. /*
  127. * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
  128. * with the power on to power good time of 3 ms.
  129. */
  130. ret = da8xx_register_usb20(1000, 3);
  131. if (ret)
  132. pr_warning("%s: USB 2.0 registration failed: %d\n",
  133. __func__, ret);
  134. }
  135. ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
  136. if (ret) {
  137. pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
  138. __func__, ret);
  139. return;
  140. }
  141. ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
  142. if (ret) {
  143. printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
  144. "power control: %d\n", __func__, ret);
  145. return;
  146. }
  147. gpio_direction_output(ON_BD_USB_DRV, 0);
  148. ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
  149. if (ret) {
  150. printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
  151. "over-current indicator: %d\n", __func__, ret);
  152. return;
  153. }
  154. gpio_direction_input(ON_BD_USB_OVC);
  155. ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
  156. if (ret)
  157. pr_warning("%s: USB 1.1 registration failed: %d\n",
  158. __func__, ret);
  159. }
  160. static struct davinci_uart_config da830_evm_uart_config __initdata = {
  161. .enabled_uarts = 0x7,
  162. };
  163. static const short da830_evm_mcasp1_pins[] = {
  164. DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
  165. DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
  166. DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
  167. DA830_AXR1_11,
  168. -1
  169. };
  170. static u8 da830_iis_serializer_direction[] = {
  171. RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  172. INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
  173. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  174. };
  175. static struct snd_platform_data da830_evm_snd_data = {
  176. .tx_dma_offset = 0x2000,
  177. .rx_dma_offset = 0x2000,
  178. .op_mode = DAVINCI_MCASP_IIS_MODE,
  179. .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
  180. .tdm_slots = 2,
  181. .serial_dir = da830_iis_serializer_direction,
  182. .asp_chan_q = EVENTQ_0,
  183. .version = MCASP_VERSION_2,
  184. .txnumevt = 1,
  185. .rxnumevt = 1,
  186. };
  187. /*
  188. * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
  189. */
  190. static const short da830_evm_mmc_sd_pins[] = {
  191. DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
  192. DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
  193. DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
  194. DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
  195. -1
  196. };
  197. #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
  198. #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
  199. static int da830_evm_mmc_get_ro(int index)
  200. {
  201. return gpio_get_value(DA830_MMCSD_WP_PIN);
  202. }
  203. static int da830_evm_mmc_get_cd(int index)
  204. {
  205. return !gpio_get_value(DA830_MMCSD_CD_PIN);
  206. }
  207. static struct davinci_mmc_config da830_evm_mmc_config = {
  208. .get_ro = da830_evm_mmc_get_ro,
  209. .get_cd = da830_evm_mmc_get_cd,
  210. .wires = 8,
  211. .max_freq = 50000000,
  212. .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  213. .version = MMC_CTLR_VERSION_2,
  214. };
  215. static inline void da830_evm_init_mmc(void)
  216. {
  217. int ret;
  218. ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
  219. if (ret) {
  220. pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
  221. ret);
  222. return;
  223. }
  224. ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
  225. if (ret) {
  226. pr_warning("da830_evm_init: can not open GPIO %d\n",
  227. DA830_MMCSD_WP_PIN);
  228. return;
  229. }
  230. gpio_direction_input(DA830_MMCSD_WP_PIN);
  231. ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
  232. if (ret) {
  233. pr_warning("da830_evm_init: can not open GPIO %d\n",
  234. DA830_MMCSD_CD_PIN);
  235. return;
  236. }
  237. gpio_direction_input(DA830_MMCSD_CD_PIN);
  238. ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
  239. if (ret) {
  240. pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
  241. ret);
  242. gpio_free(DA830_MMCSD_WP_PIN);
  243. }
  244. }
  245. /*
  246. * UI board NAND/NOR flashes only use 8-bit data bus.
  247. */
  248. static const short da830_evm_emif25_pins[] = {
  249. DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
  250. DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
  251. DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
  252. DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
  253. DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
  254. DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
  255. DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
  256. -1
  257. };
  258. #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
  259. #define HAS_MMC 1
  260. #else
  261. #define HAS_MMC 0
  262. #endif
  263. #ifdef CONFIG_DA830_UI_NAND
  264. static struct mtd_partition da830_evm_nand_partitions[] = {
  265. /* bootloader (U-Boot, etc) in first sector */
  266. [0] = {
  267. .name = "bootloader",
  268. .offset = 0,
  269. .size = SZ_128K,
  270. .mask_flags = MTD_WRITEABLE, /* force read-only */
  271. },
  272. /* bootloader params in the next sector */
  273. [1] = {
  274. .name = "params",
  275. .offset = MTDPART_OFS_APPEND,
  276. .size = SZ_128K,