| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339 | /* * Copyright 2008-2010 Analog Devices Inc. * * Licensed under the GPL-2 or later. */#ifndef _CDEF_BF547_H#define _CDEF_BF547_H/* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */#include "cdefBF54x_base.h"/* The following are the #defines needed by ADSP-BF547 that are not in the common header *//* Timer Registers */#define bfin_read_TIMER8_CONFIG()	bfin_read16(TIMER8_CONFIG)#define bfin_write_TIMER8_CONFIG(val)	bfin_write16(TIMER8_CONFIG, val)#define bfin_read_TIMER8_COUNTER()	bfin_read32(TIMER8_COUNTER)#define bfin_write_TIMER8_COUNTER(val)	bfin_write32(TIMER8_COUNTER, val)#define bfin_read_TIMER8_PERIOD()	bfin_read32(TIMER8_PERIOD)#define bfin_write_TIMER8_PERIOD(val)	bfin_write32(TIMER8_PERIOD, val)#define bfin_read_TIMER8_WIDTH()	bfin_read32(TIMER8_WIDTH)#define bfin_write_TIMER8_WIDTH(val)	bfin_write32(TIMER8_WIDTH, val)#define bfin_read_TIMER9_CONFIG()	bfin_read16(TIMER9_CONFIG)#define bfin_write_TIMER9_CONFIG(val)	bfin_write16(TIMER9_CONFIG, val)#define bfin_read_TIMER9_COUNTER()	bfin_read32(TIMER9_COUNTER)#define bfin_write_TIMER9_COUNTER(val)	bfin_write32(TIMER9_COUNTER, val)#define bfin_read_TIMER9_PERIOD()	bfin_read32(TIMER9_PERIOD)#define bfin_write_TIMER9_PERIOD(val)	bfin_write32(TIMER9_PERIOD, val)#define bfin_read_TIMER9_WIDTH()	bfin_read32(TIMER9_WIDTH)#define bfin_write_TIMER9_WIDTH(val)	bfin_write32(TIMER9_WIDTH, val)#define bfin_read_TIMER10_CONFIG()	bfin_read16(TIMER10_CONFIG)#define bfin_write_TIMER10_CONFIG(val)	bfin_write16(TIMER10_CONFIG, val)#define bfin_read_TIMER10_COUNTER()	bfin_read32(TIMER10_COUNTER)#define bfin_write_TIMER10_COUNTER(val)	bfin_write32(TIMER10_COUNTER, val)#define bfin_read_TIMER10_PERIOD()	bfin_read32(TIMER10_PERIOD)#define bfin_write_TIMER10_PERIOD(val)	bfin_write32(TIMER10_PERIOD, val)#define bfin_read_TIMER10_WIDTH()	bfin_read32(TIMER10_WIDTH)#define bfin_write_TIMER10_WIDTH(val)	bfin_write32(TIMER10_WIDTH, val)/* Timer Groubfin_read_() of 3 */#define bfin_read_TIMER_ENABLE1()	bfin_read16(TIMER_ENABLE1)#define bfin_write_TIMER_ENABLE1(val)	bfin_write16(TIMER_ENABLE1, val)#define bfin_read_TIMER_DISABLE1()	bfin_read16(TIMER_DISABLE1)#define bfin_write_TIMER_DISABLE1(val)	bfin_write16(TIMER_DISABLE1, val)#define bfin_read_TIMER_STATUS1()	bfin_read32(TIMER_STATUS1)#define bfin_write_TIMER_STATUS1(val)	bfin_write32(TIMER_STATUS1, val)/* SPORT0 Registers */#define bfin_read_SPORT0_TCR1()		bfin_read16(SPORT0_TCR1)#define bfin_write_SPORT0_TCR1(val)	bfin_write16(SPORT0_TCR1, val)#define bfin_read_SPORT0_TCR2()		bfin_read16(SPORT0_TCR2)#define bfin_write_SPORT0_TCR2(val)	bfin_write16(SPORT0_TCR2, val)#define bfin_read_SPORT0_TCLKDIV()	bfin_read16(SPORT0_TCLKDIV)#define bfin_write_SPORT0_TCLKDIV(val)	bfin_write16(SPORT0_TCLKDIV, val)#define bfin_read_SPORT0_TFSDIV()	bfin_read16(SPORT0_TFSDIV)#define bfin_write_SPORT0_TFSDIV(val)	bfin_write16(SPORT0_TFSDIV, val)#define bfin_read_SPORT0_TX()		bfin_read32(SPORT0_TX)#define bfin_write_SPORT0_TX(val)	bfin_write32(SPORT0_TX, val)#define bfin_read_SPORT0_RX()		bfin_read32(SPORT0_RX)#define bfin_write_SPORT0_RX(val)	bfin_write32(SPORT0_RX, val)#define bfin_read_SPORT0_RCR1()		bfin_read16(SPORT0_RCR1)#define bfin_write_SPORT0_RCR1(val)	bfin_write16(SPORT0_RCR1, val)#define bfin_read_SPORT0_RCR2()		bfin_read16(SPORT0_RCR2)#define bfin_write_SPORT0_RCR2(val)	bfin_write16(SPORT0_RCR2, val)#define bfin_read_SPORT0_RCLKDIV()	bfin_read16(SPORT0_RCLKDIV)#define bfin_write_SPORT0_RCLKDIV(val)	bfin_write16(SPORT0_RCLKDIV, val)#define bfin_read_SPORT0_RFSDIV()	bfin_read16(SPORT0_RFSDIV)#define bfin_write_SPORT0_RFSDIV(val)	bfin_write16(SPORT0_RFSDIV, val)#define bfin_read_SPORT0_STAT()		bfin_read16(SPORT0_STAT)#define bfin_write_SPORT0_STAT(val)	bfin_write16(SPORT0_STAT, val)#define bfin_read_SPORT0_CHNL()		bfin_read16(SPORT0_CHNL)#define bfin_write_SPORT0_CHNL(val)	bfin_write16(SPORT0_CHNL, val)#define bfin_read_SPORT0_MCMC1()	bfin_read16(SPORT0_MCMC1)#define bfin_write_SPORT0_MCMC1(val)	bfin_write16(SPORT0_MCMC1, val)#define bfin_read_SPORT0_MCMC2()	bfin_read16(SPORT0_MCMC2)#define bfin_write_SPORT0_MCMC2(val)	bfin_write16(SPORT0_MCMC2, val)#define bfin_read_SPORT0_MTCS0()	bfin_read32(SPORT0_MTCS0)#define bfin_write_SPORT0_MTCS0(val)	bfin_write32(SPORT0_MTCS0, val)#define bfin_read_SPORT0_MTCS1()	bfin_read32(SPORT0_MTCS1)#define bfin_write_SPORT0_MTCS1(val)	bfin_write32(SPORT0_MTCS1, val)#define bfin_read_SPORT0_MTCS2()	bfin_read32(SPORT0_MTCS2)#define bfin_write_SPORT0_MTCS2(val)	bfin_write32(SPORT0_MTCS2, val)#define bfin_read_SPORT0_MTCS3()	bfin_read32(SPORT0_MTCS3)#define bfin_write_SPORT0_MTCS3(val)	bfin_write32(SPORT0_MTCS3, val)#define bfin_read_SPORT0_MRCS0()	bfin_read32(SPORT0_MRCS0)#define bfin_write_SPORT0_MRCS0(val)	bfin_write32(SPORT0_MRCS0, val)#define bfin_read_SPORT0_MRCS1()	bfin_read32(SPORT0_MRCS1)#define bfin_write_SPORT0_MRCS1(val)	bfin_write32(SPORT0_MRCS1, val)#define bfin_read_SPORT0_MRCS2()	bfin_read32(SPORT0_MRCS2)#define bfin_write_SPORT0_MRCS2(val)	bfin_write32(SPORT0_MRCS2, val)#define bfin_read_SPORT0_MRCS3()	bfin_read32(SPORT0_MRCS3)#define bfin_write_SPORT0_MRCS3(val)	bfin_write32(SPORT0_MRCS3, val)/* EPPI0 Registers */#define bfin_read_EPPI0_STATUS()	bfin_read16(EPPI0_STATUS)#define bfin_write_EPPI0_STATUS(val)	bfin_write16(EPPI0_STATUS, val)#define bfin_read_EPPI0_HCOUNT()	bfin_read16(EPPI0_HCOUNT)#define bfin_write_EPPI0_HCOUNT(val)	bfin_write16(EPPI0_HCOUNT, val)#define bfin_read_EPPI0_HDELAY()	bfin_read16(EPPI0_HDELAY)#define bfin_write_EPPI0_HDELAY(val)	bfin_write16(EPPI0_HDELAY, val)#define bfin_read_EPPI0_VCOUNT()	bfin_read16(EPPI0_VCOUNT)#define bfin_write_EPPI0_VCOUNT(val)	bfin_write16(EPPI0_VCOUNT, val)#define bfin_read_EPPI0_VDELAY()	bfin_read16(EPPI0_VDELAY)#define bfin_write_EPPI0_VDELAY(val)	bfin_write16(EPPI0_VDELAY, val)#define bfin_read_EPPI0_FRAME()		bfin_read16(EPPI0_FRAME)#define bfin_write_EPPI0_FRAME(val)	bfin_write16(EPPI0_FRAME, val)#define bfin_read_EPPI0_LINE()		bfin_read16(EPPI0_LINE)#define bfin_write_EPPI0_LINE(val)	bfin_write16(EPPI0_LINE, val)#define bfin_read_EPPI0_CLKDIV()	bfin_read16(EPPI0_CLKDIV)#define bfin_write_EPPI0_CLKDIV(val)	bfin_write16(EPPI0_CLKDIV, val)#define bfin_read_EPPI0_CONTROL()	bfin_read32(EPPI0_CONTROL)#define bfin_write_EPPI0_CONTROL(val)	bfin_write32(EPPI0_CONTROL, val)#define bfin_read_EPPI0_FS1W_HBL()	bfin_read32(EPPI0_FS1W_HBL)#define bfin_write_EPPI0_FS1W_HBL(val)	bfin_write32(EPPI0_FS1W_HBL, val)#define bfin_read_EPPI0_FS1P_AVPL()	bfin_read32(EPPI0_FS1P_AVPL)#define bfin_write_EPPI0_FS1P_AVPL(val)	bfin_write32(EPPI0_FS1P_AVPL, val)#define bfin_read_EPPI0_FS2W_LVB()	bfin_read32(EPPI0_FS2W_LVB)#define bfin_write_EPPI0_FS2W_LVB(val)	bfin_write32(EPPI0_FS2W_LVB, val)#define bfin_read_EPPI0_FS2P_LAVF()	bfin_read32(EPPI0_FS2P_LAVF)#define bfin_write_EPPI0_FS2P_LAVF(val)	bfin_write32(EPPI0_FS2P_LAVF, val)#define bfin_read_EPPI0_CLIP()		bfin_read32(EPPI0_CLIP)#define bfin_write_EPPI0_CLIP(val)	bfin_write32(EPPI0_CLIP, val)/* UART2 Registers */#define bfin_read_UART2_DLL()		bfin_read16(UART2_DLL)#define bfin_write_UART2_DLL(val)	bfin_write16(UART2_DLL, val)#define bfin_read_UART2_DLH()		bfin_read16(UART2_DLH)#define bfin_write_UART2_DLH(val)	bfin_write16(UART2_DLH, val)#define bfin_read_UART2_GCTL()		bfin_read16(UART2_GCTL)#define bfin_write_UART2_GCTL(val)	bfin_write16(UART2_GCTL, val)#define bfin_read_UART2_LCR()		bfin_read16(UART2_LCR)#define bfin_write_UART2_LCR(val)	bfin_write16(UART2_LCR, val)#define bfin_read_UART2_MCR()		bfin_read16(UART2_MCR)#define bfin_write_UART2_MCR(val)	bfin_write16(UART2_MCR, val)#define bfin_read_UART2_LSR()		bfin_read16(UART2_LSR)#define bfin_write_UART2_LSR(val)	bfin_write16(UART2_LSR, val)#define bfin_read_UART2_MSR()		bfin_read16(UART2_MSR)#define bfin_write_UART2_MSR(val)	bfin_write16(UART2_MSR, val)#define bfin_read_UART2_SCR()		bfin_read16(UART2_SCR)#define bfin_write_UART2_SCR(val)	bfin_write16(UART2_SCR, val)#define bfin_read_UART2_IER_SET()	bfin_read16(UART2_IER_SET)#define bfin_write_UART2_IER_SET(val)	bfin_write16(UART2_IER_SET, val)#define bfin_read_UART2_IER_CLEAR()	bfin_read16(UART2_IER_CLEAR)#define bfin_write_UART2_IER_CLEAR(val)	bfin_write16(UART2_IER_CLEAR, val)#define bfin_read_UART2_RBR()		bfin_read16(UART2_RBR)#define bfin_write_UART2_RBR(val)	bfin_write16(UART2_RBR, val)/* Two Wire Interface Registers (TWI1) *//* SPI2  Registers */#define bfin_read_SPI2_CTL()		bfin_read16(SPI2_CTL)#define bfin_write_SPI2_CTL(val)	bfin_write16(SPI2_CTL, val)#define bfin_read_SPI2_FLG()		bfin_read16(SPI2_FLG)#define bfin_write_SPI2_FLG(val)	bfin_write16(SPI2_FLG, val)#define bfin_read_SPI2_STAT()		bfin_read16(SPI2_STAT)#define bfin_write_SPI2_STAT(val)	bfin_write16(SPI2_STAT, val)#define bfin_read_SPI2_TDBR()		bfin_read16(SPI2_TDBR)#define bfin_write_SPI2_TDBR(val)	bfin_write16(SPI2_TDBR, val)#define bfin_read_SPI2_RDBR()		bfin_read16(SPI2_RDBR)#define bfin_write_SPI2_RDBR(val)	bfin_write16(SPI2_RDBR, val)#define bfin_read_SPI2_BAUD()		bfin_read16(SPI2_BAUD)#define bfin_write_SPI2_BAUD(val)	bfin_write16(SPI2_BAUD, val)#define bfin_read_SPI2_SHADOW()		bfin_read16(SPI2_SHADOW)#define bfin_write_SPI2_SHADOW(val)	bfin_write16(SPI2_SHADOW, val)/* ATAPI Registers */#define bfin_read_ATAPI_CONTROL()		bfin_read16(ATAPI_CONTROL)#define bfin_write_ATAPI_CONTROL(val)		bfin_write16(ATAPI_CONTROL, val)#define bfin_read_ATAPI_STATUS()		bfin_read16(ATAPI_STATUS)#define bfin_write_ATAPI_STATUS(val)		bfin_write16(ATAPI_STATUS, val)#define bfin_read_ATAPI_DEV_ADDR()		bfin_read16(ATAPI_DEV_ADDR)#define bfin_write_ATAPI_DEV_ADDR(val)		bfin_write16(ATAPI_DEV_ADDR, val)#define bfin_read_ATAPI_DEV_TXBUF()		bfin_read16(ATAPI_DEV_TXBUF)#define bfin_write_ATAPI_DEV_TXBUF(val)		bfin_write16(ATAPI_DEV_TXBUF, val)#define bfin_read_ATAPI_DEV_RXBUF()		bfin_read16(ATAPI_DEV_RXBUF)#define bfin_write_ATAPI_DEV_RXBUF(val)		bfin_write16(ATAPI_DEV_RXBUF, val)#define bfin_read_ATAPI_INT_MASK()		bfin_read16(ATAPI_INT_MASK)#define bfin_write_ATAPI_INT_MASK(val)		bfin_write16(ATAPI_INT_MASK, val)#define bfin_read_ATAPI_INT_STATUS()		bfin_read16(ATAPI_INT_STATUS)#define bfin_write_ATAPI_INT_STATUS(val)	bfin_write16(ATAPI_INT_STATUS, val)#define bfin_read_ATAPI_XFER_LEN()		bfin_read16(ATAPI_XFER_LEN)#define bfin_write_ATAPI_XFER_LEN(val)		bfin_write16(ATAPI_XFER_LEN, val)#define bfin_read_ATAPI_LINE_STATUS()		bfin_read16(ATAPI_LINE_STATUS)#define bfin_write_ATAPI_LINE_STATUS(val)	bfin_write16(ATAPI_LINE_STATUS, val)#define bfin_read_ATAPI_SM_STATE()		bfin_read16(ATAPI_SM_STATE)#define bfin_write_ATAPI_SM_STATE(val)		bfin_write16(ATAPI_SM_STATE, val)#define bfin_read_ATAPI_TERMINATE()		bfin_read16(ATAPI_TERMINATE)#define bfin_write_ATAPI_TERMINATE(val)		bfin_write16(ATAPI_TERMINATE, val)#define bfin_read_ATAPI_PIO_TFRCNT()		bfin_read16(ATAPI_PIO_TFRCNT)#define bfin_write_ATAPI_PIO_TFRCNT(val)	bfin_write16(ATAPI_PIO_TFRCNT, val)#define bfin_read_ATAPI_DMA_TFRCNT()		bfin_read16(ATAPI_DMA_TFRCNT)#define bfin_write_ATAPI_DMA_TFRCNT(val)	bfin_write16(ATAPI_DMA_TFRCNT, val)#define bfin_read_ATAPI_UMAIN_TFRCNT()		bfin_read16(ATAPI_UMAIN_TFRCNT)#define bfin_write_ATAPI_UMAIN_TFRCNT(val)	bfin_write16(ATAPI_UMAIN_TFRCNT, val)#define bfin_read_ATAPI_UDMAOUT_TFRCNT()	bfin_read16(ATAPI_UDMAOUT_TFRCNT)#define bfin_write_ATAPI_UDMAOUT_TFRCNT(val)	bfin_write16(ATAPI_UDMAOUT_TFRCNT, val)#define bfin_read_ATAPI_REG_TIM_0()		bfin_read16(ATAPI_REG_TIM_0)#define bfin_write_ATAPI_REG_TIM_0(val)		bfin_write16(ATAPI_REG_TIM_0, val)#define bfin_read_ATAPI_PIO_TIM_0()		bfin_read16(ATAPI_PIO_TIM_0)#define bfin_write_ATAPI_PIO_TIM_0(val)		bfin_write16(ATAPI_PIO_TIM_0, val)#define bfin_read_ATAPI_PIO_TIM_1()		bfin_read16(ATAPI_PIO_TIM_1)#define bfin_write_ATAPI_PIO_TIM_1(val)		bfin_write16(ATAPI_PIO_TIM_1, val)#define bfin_read_ATAPI_MULTI_TIM_0()		bfin_read16(ATAPI_MULTI_TIM_0)#define bfin_write_ATAPI_MULTI_TIM_0(val)	bfin_write16(ATAPI_MULTI_TIM_0, val)#define bfin_read_ATAPI_MULTI_TIM_1()		bfin_read16(ATAPI_MULTI_TIM_1)#define bfin_write_ATAPI_MULTI_TIM_1(val)	bfin_write16(ATAPI_MULTI_TIM_1, val)#define bfin_read_ATAPI_MULTI_TIM_2()		bfin_read16(ATAPI_MULTI_TIM_2)#define bfin_write_ATAPI_MULTI_TIM_2(val)	bfin_write16(ATAPI_MULTI_TIM_2, val)#define bfin_read_ATAPI_ULTRA_TIM_0()		bfin_read16(ATAPI_ULTRA_TIM_0)#define bfin_write_ATAPI_ULTRA_TIM_0(val)	bfin_write16(ATAPI_ULTRA_TIM_0, val)#define bfin_read_ATAPI_ULTRA_TIM_1()		bfin_read16(ATAPI_ULTRA_TIM_1)#define bfin_write_ATAPI_ULTRA_TIM_1(val)	bfin_write16(ATAPI_ULTRA_TIM_1, val)#define bfin_read_ATAPI_ULTRA_TIM_2()		bfin_read16(ATAPI_ULTRA_TIM_2)#define bfin_write_ATAPI_ULTRA_TIM_2(val)	bfin_write16(ATAPI_ULTRA_TIM_2, val)#define bfin_read_ATAPI_ULTRA_TIM_3()		bfin_read16(ATAPI_ULTRA_TIM_3)#define bfin_write_ATAPI_ULTRA_TIM_3(val)	bfin_write16(ATAPI_ULTRA_TIM_3, val)/* SDH Registers */#define bfin_read_SDH_PWR_CTL()		bfin_read16(SDH_PWR_CTL)#define bfin_write_SDH_PWR_CTL(val)	bfin_write16(SDH_PWR_CTL, val)#define bfin_read_SDH_CLK_CTL()		bfin_read16(SDH_CLK_CTL)#define bfin_write_SDH_CLK_CTL(val)	bfin_write16(SDH_CLK_CTL, val)#define bfin_read_SDH_ARGUMENT()	bfin_read32(SDH_ARGUMENT)#define bfin_write_SDH_ARGUMENT(val)	bfin_write32(SDH_ARGUMENT, val)#define bfin_read_SDH_COMMAND()		bfin_read16(SDH_COMMAND)#define bfin_write_SDH_COMMAND(val)	bfin_write16(SDH_COMMAND, val)#define bfin_read_SDH_RESP_CMD()	bfin_read16(SDH_RESP_CMD)#define bfin_write_SDH_RESP_CMD(val)	bfin_write16(SDH_RESP_CMD, val)#define bfin_read_SDH_RESPONSE0()	bfin_read32(SDH_RESPONSE0)#define bfin_write_SDH_RESPONSE0(val)	bfin_write32(SDH_RESPONSE0, val)#define bfin_read_SDH_RESPONSE1()	bfin_read32(SDH_RESPONSE1)#define bfin_write_SDH_RESPONSE1(val)	bfin_write32(SDH_RESPONSE1, val)#define bfin_read_SDH_RESPONSE2()	bfin_read32(SDH_RESPONSE2)#define bfin_write_SDH_RESPONSE2(val)	bfin_write32(SDH_RESPONSE2, val)#define bfin_read_SDH_RESPONSE3()	bfin_read32(SDH_RESPONSE3)#define bfin_write_SDH_RESPONSE3(val)	bfin_write32(SDH_RESPONSE3, val)#define bfin_read_SDH_DATA_TIMER()	bfin_read32(SDH_DATA_TIMER)#define bfin_write_SDH_DATA_TIMER(val)	bfin_write32(SDH_DATA_TIMER, val)#define bfin_read_SDH_DATA_LGTH()	bfin_read16(SDH_DATA_LGTH)#define bfin_write_SDH_DATA_LGTH(val)	bfin_write16(SDH_DATA_LGTH, val)#define bfin_read_SDH_DATA_CTL()	bfin_read16(SDH_DATA_CTL)#define bfin_write_SDH_DATA_CTL(val)	bfin_write16(SDH_DATA_CTL, val)#define bfin_read_SDH_DATA_CNT()	bfin_read16(SDH_DATA_CNT)#define bfin_write_SDH_DATA_CNT(val)	bfin_write16(SDH_DATA_CNT, val)#define bfin_read_SDH_STATUS()		bfin_read32(SDH_STATUS)#define bfin_write_SDH_STATUS(val)	bfin_write32(SDH_STATUS, val)#define bfin_read_SDH_STATUS_CLR()	bfin_read16(SDH_STATUS_CLR)#define bfin_write_SDH_STATUS_CLR(val)	bfin_write16(SDH_STATUS_CLR, val)#define bfin_read_SDH_MASK0()		bfin_read32(SDH_MASK0)#define bfin_write_SDH_MASK0(val)	bfin_write32(SDH_MASK0, val)#define bfin_read_SDH_MASK1()		bfin_read32(SDH_MASK1)#define bfin_write_SDH_MASK1(val)	bfin_write32(SDH_MASK1, val)#define bfin_read_SDH_FIFO_CNT()	bfin_read16(SDH_FIFO_CNT)#define bfin_write_SDH_FIFO_CNT(val)	bfin_write16(SDH_FIFO_CNT, val)#define bfin_read_SDH_FIFO()		bfin_read32(SDH_FIFO)#define bfin_write_SDH_FIFO(val)	bfin_write32(SDH_FIFO, val)#define bfin_read_SDH_E_STATUS()	bfin_read16(SDH_E_STATUS)#define bfin_write_SDH_E_STATUS(val)	bfin_write16(SDH_E_STATUS, val)#define bfin_read_SDH_E_MASK()		bfin_read16(SDH_E_MASK)#define bfin_write_SDH_E_MASK(val)	bfin_write16(SDH_E_MASK, val)#define bfin_read_SDH_CFG()		bfin_read16(SDH_CFG)#define bfin_write_SDH_CFG(val)		bfin_write16(SDH_CFG, val)#define bfin_read_SDH_RD_WAIT_EN()	bfin_read16(SDH_RD_WAIT_EN)#define bfin_write_SDH_RD_WAIT_EN(val)	bfin_write16(SDH_RD_WAIT_EN, val)#define bfin_read_SDH_PID0()		bfin_read16(SDH_PID0)#define bfin_write_SDH_PID0(val)	bfin_write16(SDH_PID0, val)#define bfin_read_SDH_PID1()		bfin_read16(SDH_PID1)#define bfin_write_SDH_PID1(val)	bfin_write16(SDH_PID1, val)#define bfin_read_SDH_PID2()		bfin_read16(SDH_PID2)#define bfin_write_SDH_PID2(val)	bfin_write16(SDH_PID2, val)#define bfin_read_SDH_PID3()		bfin_read16(SDH_PID3)#define bfin_write_SDH_PID3(val)	bfin_write16(SDH_PID3, val)#define bfin_read_SDH_PID4()		bfin_read16(SDH_PID4)#define bfin_write_SDH_PID4(val)	bfin_write16(SDH_PID4, val)#define bfin_read_SDH_PID5()		bfin_read16(SDH_PID5)#define bfin_write_SDH_PID5(val)	bfin_write16(SDH_PID5, val)#define bfin_read_SDH_PID6()		bfin_read16(SDH_PID6)#define bfin_write_SDH_PID6(val)	bfin_write16(SDH_PID6, val)#define bfin_read_SDH_PID7()		bfin_read16(SDH_PID7)#define bfin_write_SDH_PID7(val)	bfin_write16(SDH_PID7, val)/* HOST Port Registers */#define bfin_read_HOST_CONTROL()	bfin_read16(HOST_CONTROL)#define bfin_write_HOST_CONTROL(val)	bfin_write16(HOST_CONTROL, val)#define bfin_read_HOST_STATUS()		bfin_read16(HOST_STATUS)#define bfin_write_HOST_STATUS(val)	bfin_write16(HOST_STATUS, val)#define bfin_read_HOST_TIMEOUT()	bfin_read16(HOST_TIMEOUT)#define bfin_write_HOST_TIMEOUT(val)	bfin_write16(HOST_TIMEOUT, val)/* USB Control Registers */#define bfin_read_USB_FADDR()		bfin_read16(USB_FADDR)#define bfin_write_USB_FADDR(val)	bfin_write16(USB_FADDR, val)#define bfin_read_USB_POWER()		bfin_read16(USB_POWER)#define bfin_write_USB_POWER(val)	bfin_write16(USB_POWER, val)#define bfin_read_USB_INTRTX()		bfin_read16(USB_INTRTX)#define bfin_write_USB_INTRTX(val)	bfin_write16(USB_INTRTX, val)#define bfin_read_USB_INTRRX()		bfin_read16(USB_INTRRX)#define bfin_write_USB_INTRRX(val)	bfin_write16(USB_INTRRX, val)#define bfin_read_USB_INTRTXE()		bfin_read16(USB_INTRTXE)#define bfin_write_USB_INTRTXE(val)	bfin_write16(USB_INTRTXE, val)#define bfin_read_USB_INTRRXE()		bfin_read16(USB_INTRRXE)#define bfin_write_USB_INTRRXE(val)	bfin_write16(USB_INTRRXE, val)#define bfin_read_USB_INTRUSB()		bfin_read16(USB_INTRUSB)#define bfin_write_USB_INTRUSB(val)	bfin_write16(USB_INTRUSB, val)#define bfin_read_USB_INTRUSBE()	bfin_read16(USB_INTRUSBE)#define bfin_write_USB_INTRUSBE(val)	bfin_write16(USB_INTRUSBE, val)#define bfin_read_USB_FRAME()		bfin_read16(USB_FRAME)#define bfin_write_USB_FRAME(val)	bfin_write16(USB_FRAME, val)#define bfin_read_USB_INDEX()		bfin_read16(USB_INDEX)#define bfin_write_USB_INDEX(val)	bfin_write16(USB_INDEX, val)#define bfin_read_USB_TESTMODE()	bfin_read16(USB_TESTMODE)#define bfin_write_USB_TESTMODE(val)	bfin_write16(USB_TESTMODE, val)#define bfin_read_USB_GLOBINTR()	bfin_read16(USB_GLOBINTR)#define bfin_write_USB_GLOBINTR(val)	bfin_write16(USB_GLOBINTR, val)#define bfin_read_USB_GLOBAL_CTL()	bfin_read16(USB_GLOBAL_CTL)#define bfin_write_USB_GLOBAL_CTL(val)		bfin_write16(USB_GLOBAL_CTL, val)/* USB Packet Control Registers */#define bfin_read_USB_TX_MAX_PACKET()		bfin_read16(USB_TX_MAX_PACKET)#define bfin_write_USB_TX_MAX_PACKET(val)	bfin_write16(USB_TX_MAX_PACKET, val)#define bfin_read_USB_CSR0()		bfin_read16(USB_CSR0)#define bfin_write_USB_CSR0(val)	bfin_write16(USB_CSR0, val)#define bfin_read_USB_TXCSR()		bfin_read16(USB_TXCSR)#define bfin_write_USB_TXCSR(val)	bfin_write16(USB_TXCSR, val)#define bfin_read_USB_RX_MAX_PACKET()		bfin_read16(USB_RX_MAX_PACKET)#define bfin_write_USB_RX_MAX_PACKET(val)	bfin_write16(USB_RX_MAX_PACKET, val)#define bfin_read_USB_RXCSR()		bfin_read16(USB_RXCSR)
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