| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334 | /* * bfin_can.h - interface to Blackfin CANs * * Copyright 2004-2009 Analog Devices Inc. * * Licensed under the GPL-2 or later. */#ifndef __ASM_BFIN_CAN_H__#define __ASM_BFIN_CAN_H__/* * transmit and receive channels */#define TRANSMIT_CHL            24#define RECEIVE_STD_CHL         0#define RECEIVE_EXT_CHL         4#define RECEIVE_RTR_CHL         8#define RECEIVE_EXT_RTR_CHL     12#define MAX_CHL_NUMBER          32/* * All Blackfin system MMRs are padded to 32bits even if the register * itself is only 16bits.  So use a helper macro to streamline this. */#define __BFP(m) u16 m; u16 __pad_##m/* * bfin can registers layout */struct bfin_can_mask_regs {	__BFP(aml);	__BFP(amh);};struct bfin_can_channel_regs {	/* data[0,2,4,6] -> data{0,1,2,3} while data[1,3,5,7] is padding */	u16 data[8];	__BFP(dlc);	__BFP(tsv);	__BFP(id0);	__BFP(id1);};struct bfin_can_regs {	/*	 * global control and status registers	 */	__BFP(mc1);           /* offset 0x00 */	__BFP(md1);           /* offset 0x04 */	__BFP(trs1);          /* offset 0x08 */	__BFP(trr1);          /* offset 0x0c */	__BFP(ta1);           /* offset 0x10 */	__BFP(aa1);           /* offset 0x14 */	__BFP(rmp1);          /* offset 0x18 */	__BFP(rml1);          /* offset 0x1c */	__BFP(mbtif1);        /* offset 0x20 */	__BFP(mbrif1);        /* offset 0x24 */	__BFP(mbim1);         /* offset 0x28 */	__BFP(rfh1);          /* offset 0x2c */	__BFP(opss1);         /* offset 0x30 */	u32 __pad1[3];	__BFP(mc2);           /* offset 0x40 */	__BFP(md2);           /* offset 0x44 */	__BFP(trs2);          /* offset 0x48 */	__BFP(trr2);          /* offset 0x4c */	__BFP(ta2);           /* offset 0x50 */	__BFP(aa2);           /* offset 0x54 */	__BFP(rmp2);          /* offset 0x58 */	__BFP(rml2);          /* offset 0x5c */	__BFP(mbtif2);        /* offset 0x60 */	__BFP(mbrif2);        /* offset 0x64 */	__BFP(mbim2);         /* offset 0x68 */	__BFP(rfh2);          /* offset 0x6c */	__BFP(opss2);         /* offset 0x70 */	u32 __pad2[3];	__BFP(clock);         /* offset 0x80 */	__BFP(timing);        /* offset 0x84 */	__BFP(debug);         /* offset 0x88 */	__BFP(status);        /* offset 0x8c */	__BFP(cec);           /* offset 0x90 */	__BFP(gis);           /* offset 0x94 */	__BFP(gim);           /* offset 0x98 */	__BFP(gif);           /* offset 0x9c */	__BFP(control);       /* offset 0xa0 */	__BFP(intr);          /* offset 0xa4 */	__BFP(version);       /* offset 0xa8 */	__BFP(mbtd);          /* offset 0xac */	__BFP(ewr);           /* offset 0xb0 */	__BFP(esr);           /* offset 0xb4 */	u32 __pad3[2];	__BFP(ucreg);         /* offset 0xc0 */	__BFP(uccnt);         /* offset 0xc4 */	__BFP(ucrc);          /* offset 0xc8 */	__BFP(uccnf);         /* offset 0xcc */	u32 __pad4[1];	__BFP(version2);      /* offset 0xd4 */	u32 __pad5[10];	/*	 * channel(mailbox) mask and message registers	 */	struct bfin_can_mask_regs msk[MAX_CHL_NUMBER];    /* offset 0x100 */	struct bfin_can_channel_regs chl[MAX_CHL_NUMBER]; /* offset 0x200 */};#undef __BFP/* CAN_CONTROL Masks */#define SRS			0x0001	/* Software Reset */#define DNM			0x0002	/* Device Net Mode */#define ABO			0x0004	/* Auto-Bus On Enable */#define TXPRIO		0x0008	/* TX Priority (Priority/Mailbox*) */#define WBA			0x0010	/* Wake-Up On CAN Bus Activity Enable */#define SMR			0x0020	/* Sleep Mode Request */#define CSR			0x0040	/* CAN Suspend Mode Request */#define CCR			0x0080	/* CAN Configuration Mode Request *//* CAN_STATUS Masks */#define WT			0x0001	/* TX Warning Flag */#define WR			0x0002	/* RX Warning Flag */#define EP			0x0004	/* Error Passive Mode */#define EBO			0x0008	/* Error Bus Off Mode */#define SMA			0x0020	/* Sleep Mode Acknowledge */#define CSA			0x0040	/* Suspend Mode Acknowledge */#define CCA			0x0080	/* Configuration Mode Acknowledge */#define MBPTR		0x1F00	/* Mailbox Pointer */#define TRM			0x4000	/* Transmit Mode */#define REC			0x8000	/* Receive Mode *//* CAN_CLOCK Masks */#define BRP			0x03FF	/* Bit-Rate Pre-Scaler *//* CAN_TIMING Masks */#define TSEG1		0x000F	/* Time Segment 1 */#define TSEG2		0x0070	/* Time Segment 2 */#define SAM			0x0080	/* Sampling */#define SJW			0x0300	/* Synchronization Jump Width *//* CAN_DEBUG Masks */#define DEC			0x0001	/* Disable CAN Error Counters */#define DRI			0x0002	/* Disable CAN RX Input */#define DTO			0x0004	/* Disable CAN TX Output */#define DIL			0x0008	/* Disable CAN Internal Loop */#define MAA			0x0010	/* Mode Auto-Acknowledge Enable */#define MRB			0x0020	/* Mode Read Back Enable */#define CDE			0x8000	/* CAN Debug Enable *//* CAN_CEC Masks */#define RXECNT		0x00FF	/* Receive Error Counter */#define TXECNT		0xFF00	/* Transmit Error Counter *//* CAN_INTR Masks */#define MBRIRQ	0x0001	/* Mailbox Receive Interrupt */#define MBTIRQ	0x0002	/* Mailbox Transmit Interrupt */#define GIRQ		0x0004	/* Global Interrupt */#define SMACK		0x0008	/* Sleep Mode Acknowledge */#define CANTX		0x0040	/* CAN TX Bus Value */#define CANRX		0x0080	/* CAN RX Bus Value *//* CAN_MBxx_ID1 and CAN_MBxx_ID0 Masks */#define DFC			0xFFFF	/* Data Filtering Code (If Enabled) (ID0) */#define EXTID_LO	0xFFFF	/* Lower 16 Bits of Extended Identifier (ID0) */#define EXTID_HI	0x0003	/* Upper 2 Bits of Extended Identifier (ID1) */#define BASEID		0x1FFC	/* Base Identifier */#define IDE			0x2000	/* Identifier Extension */#define RTR			0x4000	/* Remote Frame Transmission Request */#define AME			0x8000	/* Acceptance Mask Enable *//* CAN_MBxx_TIMESTAMP Masks */#define TSV			0xFFFF	/* Timestamp *//* CAN_MBxx_LENGTH Masks */#define DLC			0x000F	/* Data Length Code *//* CAN_AMxxH and CAN_AMxxL Masks */#define DFM			0xFFFF	/* Data Field Mask (If Enabled) (CAN_AMxxL) */#define EXTID_LO	0xFFFF	/* Lower 16 Bits of Extended Identifier (CAN_AMxxL) */#define EXTID_HI	0x0003	/* Upper 2 Bits of Extended Identifier (CAN_AMxxH) */#define BASEID		0x1FFC	/* Base Identifier */#define AMIDE		0x2000	/* Acceptance Mask ID Extension Enable */#define FMD			0x4000	/* Full Mask Data Field Enable */#define FDF			0x8000	/* Filter On Data Field Enable *//* CAN_MC1 Masks */#define MC0			0x0001	/* Enable Mailbox 0 */#define MC1			0x0002	/* Enable Mailbox 1 */#define MC2			0x0004	/* Enable Mailbox 2 */#define MC3			0x0008	/* Enable Mailbox 3 */#define MC4			0x0010	/* Enable Mailbox 4 */#define MC5			0x0020	/* Enable Mailbox 5 */#define MC6			0x0040	/* Enable Mailbox 6 */#define MC7			0x0080	/* Enable Mailbox 7 */#define MC8			0x0100	/* Enable Mailbox 8 */#define MC9			0x0200	/* Enable Mailbox 9 */#define MC10		0x0400	/* Enable Mailbox 10 */#define MC11		0x0800	/* Enable Mailbox 11 */#define MC12		0x1000	/* Enable Mailbox 12 */#define MC13		0x2000	/* Enable Mailbox 13 */#define MC14		0x4000	/* Enable Mailbox 14 */#define MC15		0x8000	/* Enable Mailbox 15 *//* CAN_MC2 Masks */#define MC16		0x0001	/* Enable Mailbox 16 */#define MC17		0x0002	/* Enable Mailbox 17 */#define MC18		0x0004	/* Enable Mailbox 18 */#define MC19		0x0008	/* Enable Mailbox 19 */#define MC20		0x0010	/* Enable Mailbox 20 */#define MC21		0x0020	/* Enable Mailbox 21 */#define MC22		0x0040	/* Enable Mailbox 22 */#define MC23		0x0080	/* Enable Mailbox 23 */#define MC24		0x0100	/* Enable Mailbox 24 */#define MC25		0x0200	/* Enable Mailbox 25 */#define MC26		0x0400	/* Enable Mailbox 26 */#define MC27		0x0800	/* Enable Mailbox 27 */#define MC28		0x1000	/* Enable Mailbox 28 */#define MC29		0x2000	/* Enable Mailbox 29 */#define MC30		0x4000	/* Enable Mailbox 30 */#define MC31		0x8000	/* Enable Mailbox 31 *//* CAN_MD1 Masks */#define MD0			0x0001	/* Enable Mailbox 0 For Receive */#define MD1			0x0002	/* Enable Mailbox 1 For Receive */#define MD2			0x0004	/* Enable Mailbox 2 For Receive */#define MD3			0x0008	/* Enable Mailbox 3 For Receive */#define MD4			0x0010	/* Enable Mailbox 4 For Receive */#define MD5			0x0020	/* Enable Mailbox 5 For Receive */#define MD6			0x0040	/* Enable Mailbox 6 For Receive */#define MD7			0x0080	/* Enable Mailbox 7 For Receive */#define MD8			0x0100	/* Enable Mailbox 8 For Receive */#define MD9			0x0200	/* Enable Mailbox 9 For Receive */#define MD10		0x0400	/* Enable Mailbox 10 For Receive */#define MD11		0x0800	/* Enable Mailbox 11 For Receive */#define MD12		0x1000	/* Enable Mailbox 12 For Receive */#define MD13		0x2000	/* Enable Mailbox 13 For Receive */#define MD14		0x4000	/* Enable Mailbox 14 For Receive */#define MD15		0x8000	/* Enable Mailbox 15 For Receive *//* CAN_MD2 Masks */#define MD16		0x0001	/* Enable Mailbox 16 For Receive */#define MD17		0x0002	/* Enable Mailbox 17 For Receive */#define MD18		0x0004	/* Enable Mailbox 18 For Receive */#define MD19		0x0008	/* Enable Mailbox 19 For Receive */#define MD20		0x0010	/* Enable Mailbox 20 For Receive */#define MD21		0x0020	/* Enable Mailbox 21 For Receive */#define MD22		0x0040	/* Enable Mailbox 22 For Receive */#define MD23		0x0080	/* Enable Mailbox 23 For Receive */#define MD24		0x0100	/* Enable Mailbox 24 For Receive */#define MD25		0x0200	/* Enable Mailbox 25 For Receive */#define MD26		0x0400	/* Enable Mailbox 26 For Receive */#define MD27		0x0800	/* Enable Mailbox 27 For Receive */#define MD28		0x1000	/* Enable Mailbox 28 For Receive */#define MD29		0x2000	/* Enable Mailbox 29 For Receive */#define MD30		0x4000	/* Enable Mailbox 30 For Receive */#define MD31		0x8000	/* Enable Mailbox 31 For Receive *//* CAN_RMP1 Masks */#define RMP0		0x0001	/* RX Message Pending In Mailbox 0 */#define RMP1		0x0002	/* RX Message Pending In Mailbox 1 */#define RMP2		0x0004	/* RX Message Pending In Mailbox 2 */#define RMP3		0x0008	/* RX Message Pending In Mailbox 3 */#define RMP4		0x0010	/* RX Message Pending In Mailbox 4 */#define RMP5		0x0020	/* RX Message Pending In Mailbox 5 */#define RMP6		0x0040	/* RX Message Pending In Mailbox 6 */#define RMP7		0x0080	/* RX Message Pending In Mailbox 7 */#define RMP8		0x0100	/* RX Message Pending In Mailbox 8 */#define RMP9		0x0200	/* RX Message Pending In Mailbox 9 */#define RMP10		0x0400	/* RX Message Pending In Mailbox 10 */#define RMP11		0x0800	/* RX Message Pending In Mailbox 11 */#define RMP12		0x1000	/* RX Message Pending In Mailbox 12 */#define RMP13		0x2000	/* RX Message Pending In Mailbox 13 */#define RMP14		0x4000	/* RX Message Pending In Mailbox 14 */#define RMP15		0x8000	/* RX Message Pending In Mailbox 15 *//* CAN_RMP2 Masks */#define RMP16		0x0001	/* RX Message Pending In Mailbox 16 */#define RMP17		0x0002	/* RX Message Pending In Mailbox 17 */#define RMP18		0x0004	/* RX Message Pending In Mailbox 18 */#define RMP19		0x0008	/* RX Message Pending In Mailbox 19 */#define RMP20		0x0010	/* RX Message Pending In Mailbox 20 */#define RMP21		0x0020	/* RX Message Pending In Mailbox 21 */#define RMP22		0x0040	/* RX Message Pending In Mailbox 22 */#define RMP23		0x0080	/* RX Message Pending In Mailbox 23 */#define RMP24		0x0100	/* RX Message Pending In Mailbox 24 */#define RMP25		0x0200	/* RX Message Pending In Mailbox 25 */#define RMP26		0x0400	/* RX Message Pending In Mailbox 26 */#define RMP27		0x0800	/* RX Message Pending In Mailbox 27 */#define RMP28		0x1000	/* RX Message Pending In Mailbox 28 */#define RMP29		0x2000	/* RX Message Pending In Mailbox 29 */#define RMP30		0x4000	/* RX Message Pending In Mailbox 30 */#define RMP31		0x8000	/* RX Message Pending In Mailbox 31 *//* CAN_RML1 Masks */#define RML0		0x0001	/* RX Message Lost In Mailbox 0 */#define RML1		0x0002	/* RX Message Lost In Mailbox 1 */#define RML2		0x0004	/* RX Message Lost In Mailbox 2 */#define RML3		0x0008	/* RX Message Lost In Mailbox 3 */#define RML4		0x0010	/* RX Message Lost In Mailbox 4 */#define RML5		0x0020	/* RX Message Lost In Mailbox 5 */#define RML6		0x0040	/* RX Message Lost In Mailbox 6 */#define RML7		0x0080	/* RX Message Lost In Mailbox 7 */#define RML8		0x0100	/* RX Message Lost In Mailbox 8 */#define RML9		0x0200	/* RX Message Lost In Mailbox 9 */#define RML10		0x0400	/* RX Message Lost In Mailbox 10 */#define RML11		0x0800	/* RX Message Lost In Mailbox 11 */#define RML12		0x1000	/* RX Message Lost In Mailbox 12 */#define RML13		0x2000	/* RX Message Lost In Mailbox 13 */#define RML14		0x4000	/* RX Message Lost In Mailbox 14 */#define RML15		0x8000	/* RX Message Lost In Mailbox 15 *//* CAN_RML2 Masks */#define RML16		0x0001	/* RX Message Lost In Mailbox 16 */#define RML17		0x0002	/* RX Message Lost In Mailbox 17 */#define RML18		0x0004	/* RX Message Lost In Mailbox 18 */#define RML19		0x0008	/* RX Message Lost In Mailbox 19 */#define RML20		0x0010	/* RX Message Lost In Mailbox 20 */#define RML21		0x0020	/* RX Message Lost In Mailbox 21 */#define RML22		0x0040	/* RX Message Lost In Mailbox 22 */#define RML23		0x0080	/* RX Message Lost In Mailbox 23 */#define RML24		0x0100	/* RX Message Lost In Mailbox 24 */#define RML25		0x0200	/* RX Message Lost In Mailbox 25 */#define RML26		0x0400	/* RX Message Lost In Mailbox 26 */#define RML27		0x0800	/* RX Message Lost In Mailbox 27 */#define RML28		0x1000	/* RX Message Lost In Mailbox 28 */#define RML29		0x2000	/* RX Message Lost In Mailbox 29 */#define RML30		0x4000	/* RX Message Lost In Mailbox 30 */#define RML31		0x8000	/* RX Message Lost In Mailbox 31 *//* CAN_OPSS1 Masks */#define OPSS0		0x0001	/* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 0 */#define OPSS1		0x0002	/* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 1 */#define OPSS2		0x0004	/* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 2 */#define OPSS3		0x0008	/* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 3 */#define OPSS4		0x0010	/* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 4 */
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