analysisDataOperation.c 12 KB

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  1. /*
  2. * linux/arch/arm/mach-versatile/core.c
  3. *
  4. * Copyright (C) 1999 - 2003 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/device.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/irqdomain.h>
  27. #include <linux/of_address.h>
  28. #include <linux/of_platform.h>
  29. #include <linux/amba/bus.h>
  30. #include <linux/amba/clcd.h>
  31. #include <linux/amba/pl061.h>
  32. #include <linux/amba/mmci.h>
  33. #include <linux/amba/pl022.h>
  34. #include <linux/io.h>
  35. #include <linux/irqchip/versatile-fpga.h>
  36. #include <linux/gfp.h>
  37. #include <linux/clkdev.h>
  38. #include <linux/mtd/physmap.h>
  39. #include <linux/bitops.h>
  40. #include <asm/irq.h>
  41. #include <asm/hardware/arm_timer.h>
  42. #include <asm/hardware/icst.h>
  43. #include <asm/hardware/vic.h>
  44. #include <asm/mach-types.h>
  45. #include <asm/mach/arch.h>
  46. #include <asm/mach/irq.h>
  47. #include <asm/mach/time.h>
  48. #include <asm/mach/map.h>
  49. #include <mach/hardware.h>
  50. #include <mach/platform.h>
  51. #include <asm/hardware/timer-sp.h>
  52. #include <plat/clcd.h>
  53. #include <plat/sched_clock.h>
  54. #include "core.h"
  55. /*
  56. * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
  57. * is the (PA >> 12).
  58. *
  59. * Setup a VA for the Versatile Vectored Interrupt Controller.
  60. */
  61. #define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE)
  62. #define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE)
  63. /* These PIC IRQs are valid in each configuration */
  64. #define PIC_VALID_ALL BIT(SIC_INT_KMI0) | BIT(SIC_INT_KMI1) | \
  65. BIT(SIC_INT_SCI3) | BIT(SIC_INT_UART3) | \
  66. BIT(SIC_INT_CLCD) | BIT(SIC_INT_TOUCH) | \
  67. BIT(SIC_INT_KEYPAD) | BIT(SIC_INT_DoC) | \
  68. BIT(SIC_INT_USB) | BIT(SIC_INT_PCI0) | \
  69. BIT(SIC_INT_PCI1) | BIT(SIC_INT_PCI2) | \
  70. BIT(SIC_INT_PCI3)
  71. #if 1
  72. #define IRQ_MMCI0A IRQ_VICSOURCE22
  73. #define IRQ_AACI IRQ_VICSOURCE24
  74. #define IRQ_ETH IRQ_VICSOURCE25
  75. #define PIC_MASK 0xFFD00000
  76. #define PIC_VALID PIC_VALID_ALL
  77. #else
  78. #define IRQ_MMCI0A IRQ_SIC_MMCI0A
  79. #define IRQ_AACI IRQ_SIC_AACI
  80. #define IRQ_ETH IRQ_SIC_ETH
  81. #define PIC_MASK 0
  82. #define PIC_VALID PIC_VALID_ALL | BIT(SIC_INT_MMCI0A) | \
  83. BIT(SIC_INT_MMCI1A) | BIT(SIC_INT_AACI) | \
  84. BIT(SIC_INT_ETH)
  85. #endif
  86. /* Lookup table for finding a DT node that represents the vic instance */
  87. static const struct of_device_id vic_of_match[] __initconst = {
  88. { .compatible = "arm,versatile-vic", },
  89. {}
  90. };
  91. static const struct of_device_id sic_of_match[] __initconst = {
  92. { .compatible = "arm,versatile-sic", },
  93. {}
  94. };
  95. void __init versatile_init_irq(void)
  96. {
  97. struct device_node *np;
  98. np = of_find_matching_node_by_address(NULL, vic_of_match,
  99. VERSATILE_VIC_BASE);
  100. __vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0, np);
  101. writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
  102. np = of_find_matching_node_by_address(NULL, sic_of_match,
  103. VERSATILE_SIC_BASE);
  104. fpga_irq_init(VA_SIC_BASE, "SIC", IRQ_SIC_START,
  105. IRQ_VICSOURCE31, PIC_VALID, np);
  106. /*
  107. * Interrupts on secondary controller from 0 to 8 are routed to
  108. * source 31 on PIC.
  109. * Interrupts from 21 to 31 are routed directly to the VIC on
  110. * the corresponding number on primary controller. This is controlled
  111. * by setting PIC_ENABLEx.
  112. */
  113. writel(PIC_MASK, VA_SIC_BASE + SIC_INT_PIC_ENABLE);
  114. }
  115. static struct map_desc versatile_io_desc[] __initdata = {
  116. {
  117. .virtual = IO_ADDRESS(VERSATILE_SYS_BASE),
  118. .pfn = __phys_to_pfn(VERSATILE_SYS_BASE),
  119. .length = SZ_4K,
  120. .type = MT_DEVICE
  121. }, {
  122. .virtual = IO_ADDRESS(VERSATILE_SIC_BASE),
  123. .pfn = __phys_to_pfn(VERSATILE_SIC_BASE),
  124. .length = SZ_4K,
  125. .type = MT_DEVICE
  126. }, {
  127. .virtual = IO_ADDRESS(VERSATILE_VIC_BASE),
  128. .pfn = __phys_to_pfn(VERSATILE_VIC_BASE),
  129. .length = SZ_4K,
  130. .type = MT_DEVICE
  131. }, {
  132. .virtual = IO_ADDRESS(VERSATILE_SCTL_BASE),
  133. .pfn = __phys_to_pfn(VERSATILE_SCTL_BASE),
  134. .length = SZ_4K * 9,
  135. .type = MT_DEVICE
  136. },
  137. #ifdef CONFIG_MACH_VERSATILE_AB
  138. {
  139. .virtual = IO_ADDRESS(VERSATILE_IB2_BASE),
  140. .pfn = __phys_to_pfn(VERSATILE_IB2_BASE),
  141. .length = SZ_64M,
  142. .type = MT_DEVICE
  143. },
  144. #endif
  145. #ifdef CONFIG_DEBUG_LL
  146. {
  147. .virtual = IO_ADDRESS(VERSATILE_UART0_BASE),
  148. .pfn = __phys_to_pfn(VERSATILE_UART0_BASE),
  149. .length = SZ_4K,
  150. .type = MT_DEVICE
  151. },
  152. #endif
  153. #ifdef CONFIG_PCI
  154. {
  155. .virtual = IO_ADDRESS(VERSATILE_PCI_CORE_BASE),
  156. .pfn = __phys_to_pfn(VERSATILE_PCI_CORE_BASE),
  157. .length = SZ_4K,
  158. .type = MT_DEVICE
  159. }, {
  160. .virtual = (unsigned long)VERSATILE_PCI_VIRT_BASE,
  161. .pfn = __phys_to_pfn(VERSATILE_PCI_BASE),
  162. .length = VERSATILE_PCI_BASE_SIZE,
  163. .type = MT_DEVICE
  164. }, {
  165. .virtual = (unsigned long)VERSATILE_PCI_CFG_VIRT_BASE,
  166. .pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE),
  167. .length = VERSATILE_PCI_CFG_BASE_SIZE,
  168. .type = MT_DEVICE
  169. },
  170. #endif
  171. };
  172. void __init versatile_map_io(void)
  173. {
  174. iotable_init(versatile_io_desc, ARRAY_SIZE(versatile_io_desc));
  175. }
  176. #define VERSATILE_FLASHCTRL (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET)
  177. static void versatile_flash_set_vpp(struct platform_device *pdev, int on)
  178. {
  179. u32 val;
  180. val = __raw_readl(VERSATILE_FLASHCTRL);
  181. if (on)
  182. val |= VERSATILE_FLASHPROG_FLVPPEN;
  183. else
  184. val &= ~VERSATILE_FLASHPROG_FLVPPEN;
  185. __raw_writel(val, VERSATILE_FLASHCTRL);
  186. }
  187. static struct physmap_flash_data versatile_flash_data = {
  188. .width = 4,
  189. .set_vpp = versatile_flash_set_vpp,
  190. };
  191. static struct resource versatile_flash_resource = {
  192. .start = VERSATILE_FLASH_BASE,
  193. .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE - 1,
  194. .flags = IORESOURCE_MEM,
  195. };
  196. static struct platform_device versatile_flash_device = {
  197. .name = "physmap-flash",
  198. .id = 0,
  199. .dev = {
  200. .platform_data = &versatile_flash_data,
  201. },
  202. .num_resources = 1,
  203. .resource = &versatile_flash_resource,
  204. };
  205. static struct resource smc91x_resources[] = {
  206. [0] = {
  207. .start = VERSATILE_ETH_BASE,
  208. .end = VERSATILE_ETH_BASE + SZ_64K - 1,
  209. .flags = IORESOURCE_MEM,
  210. },
  211. [1] = {
  212. .start = IRQ_ETH,
  213. .end = IRQ_ETH,
  214. .flags = IORESOURCE_IRQ,
  215. },
  216. };
  217. static struct platform_device smc91x_device = {
  218. .name = "smc91x",
  219. .id = 0,
  220. .num_resources = ARRAY_SIZE(smc91x_resources),
  221. .resource = smc91x_resources,
  222. };
  223. static struct resource versatile_i2c_resource = {
  224. .start = VERSATILE_I2C_BASE,
  225. .end = VERSATILE_I2C_BASE + SZ_4K - 1,
  226. .flags = IORESOURCE_MEM,
  227. };
  228. static struct platform_device versatile_i2c_device = {
  229. .name = "versatile-i2c",
  230. .id = 0,
  231. .num_resources = 1,
  232. .resource = &versatile_i2c_resource,
  233. };
  234. static struct i2c_board_info versatile_i2c_board_info[] = {
  235. {
  236. I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
  237. },
  238. };
  239. static int __init versatile_i2c_init(void)
  240. {
  241. return i2c_register_board_info(0, versatile_i2c_board_info,
  242. ARRAY_SIZE(versatile_i2c_board_info));
  243. }
  244. arch_initcall(versatile_i2c_init);
  245. #define VERSATILE_SYSMCI (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_MCI_OFFSET)
  246. unsigned int mmc_status(struct device *dev)
  247. {
  248. struct amba_device *adev = container_of(dev, struct amba_device, dev);
  249. u32 mask;
  250. if (adev->res.start == VERSATILE_MMCI0_BASE)
  251. mask = 1;
  252. else
  253. mask = 2;
  254. return readl(VERSATILE_SYSMCI) & mask;
  255. }
  256. static struct mmci_platform_data mmc0_plat_data = {
  257. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  258. .status = mmc_status,
  259. .gpio_wp = -1,
  260. .gpio_cd = -1,
  261. };
  262. static struct resource char_lcd_resources[] = {
  263. {
  264. .start = VERSATILE_CHAR_LCD_BASE,
  265. .end = (VERSATILE_CHAR_LCD_BASE + SZ_4K - 1),
  266. .flags = IORESOURCE_MEM,
  267. },
  268. };
  269. static struct platform_device char_lcd_device = {
  270. .name = "arm-charlcd",
  271. .id = -1,
  272. .num_resources = ARRAY_SIZE(char_lcd_resources),
  273. .resource = char_lcd_resources,
  274. };
  275. /*
  276. * Clock handling
  277. */
  278. static const struct icst_params versatile_oscvco_params = {
  279. .ref = 24000000,
  280. .vco_max = ICST307_VCO_MAX,
  281. .vco_min = ICST307_VCO_MIN,
  282. .vd_min = 4 + 8,
  283. .vd_max = 511 + 8,
  284. .rd_min = 1 + 2,
  285. .rd_max = 127 + 2,
  286. .s2div = icst307_s2div,
  287. .idx2s = icst307_idx2s,
  288. };
  289. static void versatile_oscvco_set(struct clk *clk, struct icst_vco vco)
  290. {
  291. void __iomem *sys_lock = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LOCK_OFFSET;
  292. u32 val;
  293. val = readl(clk->vcoreg) & ~0x7ffff;
  294. val |= vco.v | (vco.r << 9) | (vco.s << 16);
  295. writel(0xa05f, sys_lock);
  296. writel(val, clk->vcoreg);
  297. writel(0, sys_lock);
  298. }
  299. static const struct clk_ops osc4_clk_ops = {
  300. .round = icst_clk_round,
  301. .set = icst_clk_set,
  302. .setvco = versatile_oscvco_set,
  303. };
  304. static struct clk osc4_clk = {
  305. .ops = &osc4_clk_ops,
  306. .params = &versatile_oscvco_params,
  307. };
  308. /*
  309. * These are fixed clocks.
  310. */
  311. static struct clk ref24_clk = {
  312. .rate = 24000000,
  313. };
  314. static struct clk sp804_clk = {
  315. .rate = 1000000,
  316. };
  317. static struct clk dummy_apb_pclk;
  318. static struct clk_lookup lookups[] = {
  319. { /* AMBA bus clock */
  320. .con_id = "apb_pclk",
  321. .clk = &dummy_apb_pclk,
  322. }, { /* UART0 */
  323. .dev_id = "dev:f1",
  324. .clk = &ref24_clk,
  325. }, { /* UART1 */
  326. .dev_id = "dev:f2",
  327. .clk = &ref24_clk,
  328. }, { /* UART2 */
  329. .dev_id = "dev:f3",
  330. .clk = &ref24_clk,
  331. }, { /* UART3 */
  332. .dev_id = "fpga:09",
  333. .clk = &ref24_clk,
  334. }, { /* KMI0 */
  335. .dev_id = "fpga:06",
  336. .clk = &ref24_clk,
  337. }, { /* KMI1 */
  338. .dev_id = "fpga:07",
  339. .clk = &ref24_clk,
  340. }, { /* MMC0 */
  341. .dev_id = "fpga:05",
  342. .clk = &ref24_clk,
  343. }, { /* MMC1 */
  344. .dev_id = "fpga:0b",
  345. .clk = &ref24_clk,
  346. }, { /* SSP */
  347. .dev_id = "dev:f4",
  348. .clk = &ref24_clk,
  349. }, { /* CLCD */
  350. .dev_id = "dev:20",
  351. .clk = &osc4_clk,
  352. }, { /* SP804 timers */
  353. .dev_id = "sp804",
  354. .clk = &sp804_clk,
  355. },
  356. };
  357. /*
  358. * CLCD support.
  359. */
  360. #define SYS_CLCD_MODE_MASK (3 << 0)
  361. #define SYS_CLCD_MODE_888 (0 << 0)
  362. #define SYS_CLCD_MODE_5551 (1 << 0)
  363. #define SYS_CLCD_MODE_565_RLSB (2 << 0)
  364. #define SYS_CLCD_MODE_565_BLSB (3 << 0)
  365. #define SYS_CLCD_NLCDIOON (1 << 2)
  366. #define SYS_CLCD_VDDPOSSWITCH (1 << 3)
  367. #define SYS_CLCD_PWR3V5SWITCH (1 << 4)
  368. #define SYS_CLCD_ID_MASK (0x1f << 8)
  369. #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
  370. #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
  371. #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
  372. #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
  373. #define SYS_CLCD_ID_VGA (0x1f << 8)
  374. static bool is_sanyo_2_5_lcd;
  375. /*
  376. * Disable all display connectors on the interface module.
  377. */
  378. static void versatile_clcd_disable(struct clcd_fb *fb)
  379. {
  380. void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
  381. u32 val;
  382. val = readl(sys_clcd);
  383. val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
  384. writel(val, sys_clcd);
  385. #ifdef CONFIG_MACH_VERSATILE_AB
  386. /*
  387. * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off
  388. */
  389. if (machine_is_versatile_ab() && is_sanyo_2_5_lcd) {
  390. void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL);
  391. unsigned long ctrl;
  392. ctrl = readl(versatile_ib2_ctrl);
  393. ctrl &= ~0x01;
  394. writel(ctrl, versatile_ib2_ctrl);
  395. }
  396. #endif
  397. }
  398. /*
  399. * Enable the relevant connector on the interface module.
  400. */
  401. static void versatile_clcd_enable(struct clcd_fb *fb)
  402. {
  403. struct fb_var_screeninfo *var = &fb->fb.var;
  404. void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
  405. u32 val;
  406. val = readl(sys_clcd);
  407. val &= ~SYS_CLCD_MODE_MASK;
  408. switch (var->green.length) {
  409. case 5:
  410. val |= SYS_CLCD_MODE_5551;
  411. break;
  412. case 6:
  413. if (var->red.offset == 0)
  414. val |= SYS_CLCD_MODE_565_RLSB;
  415. else
  416. val |= SYS_CLCD_MODE_565_BLSB;
  417. break;
  418. case 8:
  419. val |= SYS_CLCD_MODE_888;
  420. break;
  421. }
  422. /*
  423. * Set the MUX
  424. */
  425. writel(val, sys_clcd);
  426. /*
  427. * And now enable the PSUs
  428. */
  429. val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
  430. writel(val, sys_clcd);
  431. #ifdef CONFIG_MACH_VERSATILE_AB
  432. /*
  433. * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on
  434. */
  435. if (machine_is_versatile_ab() && is_sanyo_2_5_lcd) {
  436. void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL);
  437. unsigned long ctrl;
  438. ctrl = readl(versatile_ib2_ctrl);
  439. ctrl |= 0x01;
  440. writel(ctrl, versatile_ib2_ctrl);