| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137 | /* * Table of the DAVINCI register configurations for the PINMUX combinations * * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> * * Based on linux/include/asm-arm/arch-omap/mux.h: * Copyright (C) 2003 - 2005 Nokia Corporation * * Written by Tony Lindgren * * 2007 (c) MontaVista Software, Inc. This file is licensed under * the terms of the GNU General Public License version 2. This program * is licensed "as is" without any warranty of any kind, whether express * or implied. * * Copyright (C) 2008 Texas Instruments. */#ifndef __INC_MACH_MUX_H#define __INC_MACH_MUX_Hstruct mux_config {	const char *name;	const char *mux_reg_name;	const unsigned char mux_reg;	const unsigned char mask_offset;	const unsigned char mask;	const unsigned char mode;	bool debug;};enum davinci_dm644x_index {	/* ATA and HDDIR functions */	DM644X_HDIREN,	DM644X_ATAEN,	DM644X_ATAEN_DISABLE,	/* HPI functions */	DM644X_HPIEN_DISABLE,	/* AEAW functions */	DM644X_AEAW,	DM644X_AEAW0,	DM644X_AEAW1,	DM644X_AEAW2,	DM644X_AEAW3,	DM644X_AEAW4,	/* Memory Stick */	DM644X_MSTK,	/* I2C */	DM644X_I2C,	/* ASP function */	DM644X_MCBSP,	/* UART1 */	DM644X_UART1,	/* UART2 */	DM644X_UART2,	/* PWM0 */	DM644X_PWM0,	/* PWM1 */	DM644X_PWM1,	/* PWM2 */	DM644X_PWM2,	/* VLYNQ function */	DM644X_VLYNQEN,	DM644X_VLSCREN,	DM644X_VLYNQWD,	/* EMAC and MDIO function */	DM644X_EMACEN,	/* GPIO3V[0:16] pins */	DM644X_GPIO3V,	/* GPIO pins */	DM644X_GPIO0,	DM644X_GPIO3,	DM644X_GPIO43_44,	DM644X_GPIO46_47,	/* VPBE */	DM644X_RGB666,	/* LCD */	DM644X_LOEEN,	DM644X_LFLDEN,};enum davinci_dm646x_index {	/* ATA function */	DM646X_ATAEN,	/* AUDIO Clock */	DM646X_AUDCK1,	DM646X_AUDCK0,	/* CRGEN Control */	DM646X_CRGMUX,	/* VPIF Control */	DM646X_STSOMUX_DISABLE,	DM646X_STSIMUX_DISABLE,	DM646X_PTSOMUX_DISABLE,	DM646X_PTSIMUX_DISABLE,	/* TSIF Control */	DM646X_STSOMUX,	DM646X_STSIMUX,	DM646X_PTSOMUX_PARALLEL,	DM646X_PTSIMUX_PARALLEL,	DM646X_PTSOMUX_SERIAL,	DM646X_PTSIMUX_SERIAL,};enum davinci_dm355_index {	/* MMC/SD 0 */	DM355_MMCSD0,	/* MMC/SD 1 */	DM355_SD1_CLK,	DM355_SD1_CMD,	DM355_SD1_DATA3,	DM355_SD1_DATA2,	DM355_SD1_DATA1,	DM355_SD1_DATA0,	/* I2C */	DM355_I2C_SDA,
 |