| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182 | /* * sh7372 processor support * * Copyright (C) 2010  Magnus Damm * Copyright (C) 2008  Yoshihiro Shimoda * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA */#include <linux/kernel.h>#include <linux/init.h>#include <linux/interrupt.h>#include <linux/irq.h>#include <linux/platform_device.h>#include <linux/of_platform.h>#include <linux/uio_driver.h>#include <linux/delay.h>#include <linux/input.h>#include <linux/io.h>#include <linux/serial_sci.h>#include <linux/sh_dma.h>#include <linux/sh_intc.h>#include <linux/sh_timer.h>#include <linux/pm_domain.h>#include <linux/dma-mapping.h>#include <mach/dma-register.h>#include <mach/hardware.h>#include <mach/irqs.h>#include <mach/sh7372.h>#include <mach/common.h>#include <asm/mach/map.h>#include <asm/mach-types.h>#include <asm/mach/arch.h>#include <asm/mach/time.h>static struct map_desc sh7372_io_desc[] __initdata = {	/* create a 1:1 entity map for 0xe6xxxxxx	 * used by CPGA, INTC and PFC.	 */	{		.virtual	= 0xe6000000,		.pfn		= __phys_to_pfn(0xe6000000),		.length		= 256 << 20,		.type		= MT_DEVICE_NONSHARED	},};void __init sh7372_map_io(void){	iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc));}/* SCIFA0 */static struct plat_sci_port scif0_platform_data = {	.mapbase	= 0xe6c40000,	.flags		= UPF_BOOT_AUTOCONF,	.scscr		= SCSCR_RE | SCSCR_TE,	.scbrr_algo_id	= SCBRR_ALGO_4,	.type		= PORT_SCIFA,	.irqs		= { evt2irq(0x0c00), evt2irq(0x0c00),			    evt2irq(0x0c00), evt2irq(0x0c00) },};static struct platform_device scif0_device = {	.name		= "sh-sci",	.id		= 0,	.dev		= {		.platform_data	= &scif0_platform_data,	},};/* SCIFA1 */static struct plat_sci_port scif1_platform_data = {	.mapbase	= 0xe6c50000,	.flags		= UPF_BOOT_AUTOCONF,	.scscr		= SCSCR_RE | SCSCR_TE,	.scbrr_algo_id	= SCBRR_ALGO_4,	.type		= PORT_SCIFA,	.irqs		= { evt2irq(0x0c20), evt2irq(0x0c20),			    evt2irq(0x0c20), evt2irq(0x0c20) },};static struct platform_device scif1_device = {	.name		= "sh-sci",	.id		= 1,	.dev		= {		.platform_data	= &scif1_platform_data,	},};/* SCIFA2 */static struct plat_sci_port scif2_platform_data = {	.mapbase	= 0xe6c60000,	.flags		= UPF_BOOT_AUTOCONF,	.scscr		= SCSCR_RE | SCSCR_TE,	.scbrr_algo_id	= SCBRR_ALGO_4,	.type		= PORT_SCIFA,	.irqs		= { evt2irq(0x0c40), evt2irq(0x0c40),			    evt2irq(0x0c40), evt2irq(0x0c40) },};static struct platform_device scif2_device = {	.name		= "sh-sci",	.id		= 2,	.dev		= {		.platform_data	= &scif2_platform_data,	},};/* SCIFA3 */static struct plat_sci_port scif3_platform_data = {	.mapbase	= 0xe6c70000,	.flags		= UPF_BOOT_AUTOCONF,	.scscr		= SCSCR_RE | SCSCR_TE,	.scbrr_algo_id	= SCBRR_ALGO_4,	.type		= PORT_SCIFA,	.irqs		= { evt2irq(0x0c60), evt2irq(0x0c60),			    evt2irq(0x0c60), evt2irq(0x0c60) },};static struct platform_device scif3_device = {	.name		= "sh-sci",	.id		= 3,	.dev		= {		.platform_data	= &scif3_platform_data,	},};/* SCIFA4 */static struct plat_sci_port scif4_platform_data = {	.mapbase	= 0xe6c80000,	.flags		= UPF_BOOT_AUTOCONF,	.scscr		= SCSCR_RE | SCSCR_TE,	.scbrr_algo_id	= SCBRR_ALGO_4,	.type		= PORT_SCIFA,	.irqs		= { evt2irq(0x0d20), evt2irq(0x0d20),			    evt2irq(0x0d20), evt2irq(0x0d20) },};static struct platform_device scif4_device = {	.name		= "sh-sci",	.id		= 4,	.dev		= {		.platform_data	= &scif4_platform_data,	},};/* SCIFA5 */static struct plat_sci_port scif5_platform_data = {	.mapbase	= 0xe6cb0000,	.flags		= UPF_BOOT_AUTOCONF,	.scscr		= SCSCR_RE | SCSCR_TE,	.scbrr_algo_id	= SCBRR_ALGO_4,	.type		= PORT_SCIFA,	.irqs		= { evt2irq(0x0d40), evt2irq(0x0d40),			    evt2irq(0x0d40), evt2irq(0x0d40) },};static struct platform_device scif5_device = {	.name		= "sh-sci",	.id		= 5,	.dev		= {		.platform_data	= &scif5_platform_data,	},};/* SCIFB */static struct plat_sci_port scif6_platform_data = {	.mapbase	= 0xe6c30000,	.flags		= UPF_BOOT_AUTOCONF,	.scscr		= SCSCR_RE | SCSCR_TE,	.scbrr_algo_id	= SCBRR_ALGO_4,
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