alarmDataOperation.c 39 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359
  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk-provider.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include "clock.h"
  141. #include "omap_hwmod.h"
  142. #include "soc.h"
  143. #include "common.h"
  144. #include "clockdomain.h"
  145. #include "powerdomain.h"
  146. #include "cm2xxx.h"
  147. #include "cm3xxx.h"
  148. #include "cminst44xx.h"
  149. #include "cm33xx.h"
  150. #include "prm.h"
  151. #include "prm3xxx.h"
  152. #include "prm44xx.h"
  153. #include "prm33xx.h"
  154. #include "prminst44xx.h"
  155. #include "mux.h"
  156. #include "pm.h"
  157. /* Name of the OMAP hwmod for the MPU */
  158. #define MPU_INITIATOR_NAME "mpu"
  159. /*
  160. * Number of struct omap_hwmod_link records per struct
  161. * omap_hwmod_ocp_if record (master->slave and slave->master)
  162. */
  163. #define LINKS_PER_OCP_IF 2
  164. /**
  165. * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
  166. * @enable_module: function to enable a module (via MODULEMODE)
  167. * @disable_module: function to disable a module (via MODULEMODE)
  168. *
  169. * XXX Eventually this functionality will be hidden inside the PRM/CM
  170. * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
  171. * conditionals in this code.
  172. */
  173. struct omap_hwmod_soc_ops {
  174. void (*enable_module)(struct omap_hwmod *oh);
  175. int (*disable_module)(struct omap_hwmod *oh);
  176. int (*wait_target_ready)(struct omap_hwmod *oh);
  177. int (*assert_hardreset)(struct omap_hwmod *oh,
  178. struct omap_hwmod_rst_info *ohri);
  179. int (*deassert_hardreset)(struct omap_hwmod *oh,
  180. struct omap_hwmod_rst_info *ohri);
  181. int (*is_hardreset_asserted)(struct omap_hwmod *oh,
  182. struct omap_hwmod_rst_info *ohri);
  183. int (*init_clkdm)(struct omap_hwmod *oh);
  184. void (*update_context_lost)(struct omap_hwmod *oh);
  185. int (*get_context_lost)(struct omap_hwmod *oh);
  186. };
  187. /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
  188. static struct omap_hwmod_soc_ops soc_ops;
  189. /* omap_hwmod_list contains all registered struct omap_hwmods */
  190. static LIST_HEAD(omap_hwmod_list);
  191. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  192. static struct omap_hwmod *mpu_oh;
  193. /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
  194. static DEFINE_SPINLOCK(io_chain_lock);
  195. /*
  196. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  197. * allocated from - used to reduce the number of small memory
  198. * allocations, which has a significant impact on performance
  199. */
  200. static struct omap_hwmod_link *linkspace;
  201. /*
  202. * free_ls, max_ls: array indexes into linkspace; representing the
  203. * next free struct omap_hwmod_link index, and the maximum number of
  204. * struct omap_hwmod_link records allocated (respectively)
  205. */
  206. static unsigned short free_ls, max_ls, ls_supp;
  207. /* inited: set to true once the hwmod code is initialized */
  208. static bool inited;
  209. /* Private functions */
  210. /**
  211. * _fetch_next_ocp_if - return the next OCP interface in a list
  212. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  213. * @i: pointer to the index of the element pointed to by @p in the list
  214. *
  215. * Return a pointer to the struct omap_hwmod_ocp_if record
  216. * containing the struct list_head pointed to by @p, and increment
  217. * @p such that a future call to this routine will return the next
  218. * record.
  219. */
  220. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  221. int *i)
  222. {
  223. struct omap_hwmod_ocp_if *oi;
  224. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  225. *p = (*p)->next;
  226. *i = *i + 1;
  227. return oi;
  228. }
  229. /**
  230. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  231. * @oh: struct omap_hwmod *
  232. *
  233. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  234. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  235. * OCP_SYSCONFIG register or 0 upon success.
  236. */
  237. static int _update_sysc_cache(struct omap_hwmod *oh)
  238. {
  239. if (!oh->class->sysc) {
  240. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  241. return -EINVAL;
  242. }
  243. /* XXX ensure module interface clock is up */
  244. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  245. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  246. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  247. return 0;
  248. }
  249. /**
  250. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  251. * @v: OCP_SYSCONFIG value to write
  252. * @oh: struct omap_hwmod *
  253. *
  254. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  255. * one. No return value.
  256. */
  257. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  258. {
  259. if (!oh->class->sysc) {
  260. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  261. return;
  262. }
  263. /* XXX ensure module interface clock is up */
  264. /* Module might have lost context, always update cache and register */
  265. oh->_sysc_cache = v;
  266. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  267. }
  268. /**
  269. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  270. * @oh: struct omap_hwmod *
  271. * @standbymode: MIDLEMODE field bits
  272. * @v: pointer to register contents to modify
  273. *
  274. * Update the master standby mode bits in @v to be @standbymode for
  275. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  276. * upon error or 0 upon success.
  277. */
  278. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  279. u32 *v)
  280. {
  281. u32 mstandby_mask;
  282. u8 mstandby_shift;
  283. if (!oh->class->sysc ||
  284. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  285. return -EINVAL;
  286. if (!oh->class->sysc->sysc_fields) {
  287. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  288. return -EINVAL;
  289. }
  290. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  291. mstandby_mask = (0x3 << mstandby_shift);
  292. *v &= ~mstandby_mask;
  293. *v |= __ffs(standbymode) << mstandby_shift;
  294. return 0;
  295. }
  296. /**
  297. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  298. * @oh: struct omap_hwmod *
  299. * @idlemode: SIDLEMODE field bits
  300. * @v: pointer to register contents to modify
  301. *
  302. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  303. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  304. * or 0 upon success.
  305. */
  306. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  307. {
  308. u32 sidle_mask;
  309. u8 sidle_shift;
  310. if (!oh->class->sysc ||
  311. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  312. return -EINVAL;
  313. if (!oh->class->sysc->sysc_fields) {
  314. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  315. return -EINVAL;
  316. }
  317. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  318. sidle_mask = (0x3 << sidle_shift);
  319. *v &= ~sidle_mask;
  320. *v |= __ffs(idlemode) << sidle_shift;
  321. return 0;
  322. }
  323. /**
  324. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  325. * @oh: struct omap_hwmod *
  326. * @clockact: CLOCKACTIVITY field bits
  327. * @v: pointer to register contents to modify
  328. *
  329. * Update the clockactivity mode bits in @v to be @clockact for the
  330. * @oh hwmod. Used for additional powersaving on some modules. Does
  331. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  332. * success.
  333. */
  334. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  335. {
  336. u32 clkact_mask;
  337. u8 clkact_shift;
  338. if (!oh->class->sysc ||
  339. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  340. return -EINVAL;
  341. if (!oh->class->sysc->sysc_fields) {
  342. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  343. return -EINVAL;
  344. }
  345. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  346. clkact_mask = (0x3 << clkact_shift);
  347. *v &= ~clkact_mask;
  348. *v |= clockact << clkact_shift;
  349. return 0;
  350. }
  351. /**
  352. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  353. * @oh: struct omap_hwmod *
  354. * @v: pointer to register contents to modify
  355. *
  356. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  357. * error or 0 upon success.
  358. */
  359. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  360. {
  361. u32 softrst_mask;
  362. if (!oh->class->sysc ||
  363. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  364. return -EINVAL;
  365. if (!oh->class->sysc->sysc_fields) {
  366. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  367. return -EINVAL;
  368. }
  369. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  370. *v |= softrst_mask;
  371. return 0;
  372. }
  373. /**
  374. * _wait_softreset_complete - wait for an OCP softreset to complete
  375. * @oh: struct omap_hwmod * to wait on
  376. *
  377. * Wait until the IP block represented by @oh reports that its OCP
  378. * softreset is complete. This can be triggered by software (see
  379. * _ocp_softreset()) or by hardware upon returning from off-mode (one
  380. * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
  381. * microseconds. Returns the number of microseconds waited.
  382. */
  383. static int _wait_softreset_complete(struct omap_hwmod *oh)
  384. {
  385. struct omap_hwmod_class_sysconfig *sysc;
  386. u32 softrst_mask;
  387. int c = 0;
  388. sysc = oh->class->sysc;
  389. if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  390. omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
  391. & SYSS_RESETDONE_MASK),
  392. MAX_MODULE_SOFTRESET_WAIT, c);
  393. else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  394. softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
  395. omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
  396. & softrst_mask),
  397. MAX_MODULE_SOFTRESET_WAIT, c);
  398. }
  399. return c;
  400. }
  401. /**
  402. * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  403. * @oh: struct omap_hwmod *
  404. *
  405. * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
  406. * of some modules. When the DMA must perform read/write accesses, the
  407. * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
  408. * for power management, software must set the DMADISABLE bit back to 1.
  409. *
  410. * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
  411. * error or 0 upon success.
  412. */
  413. static int _set_dmadisable(struct omap_hwmod *oh)
  414. {
  415. u32 v;
  416. u32 dmadisable_mask;
  417. if (!oh->class->sysc ||
  418. !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
  419. return -EINVAL;
  420. if (!oh->class->sysc->sysc_fields) {
  421. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  422. return -EINVAL;
  423. }
  424. /* clocks must be on for this operation */
  425. if (oh->_state != _HWMOD_STATE_ENABLED) {
  426. pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
  427. return -EINVAL;
  428. }
  429. pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
  430. v = oh->_sysc_cache;
  431. dmadisable_mask =
  432. (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
  433. v |= dmadisable_mask;
  434. _write_sysconfig(v, oh);
  435. return 0;
  436. }
  437. /**
  438. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  439. * @oh: struct omap_hwmod *
  440. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  441. * @v: pointer to register contents to modify
  442. *
  443. * Update the module autoidle bit in @v to be @autoidle for the @oh
  444. * hwmod. The autoidle bit controls whether the module can gate
  445. * internal clocks automatically when it isn't doing anything; the
  446. * exact function of this bit varies on a per-module basis. This
  447. * function does not write to the hardware. Returns -EINVAL upon
  448. * error or 0 upon success.
  449. */
  450. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  451. u32 *v)
  452. {
  453. u32 autoidle_mask;
  454. u8 autoidle_shift;
  455. if (!oh->class->sysc ||
  456. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  457. return -EINVAL;
  458. if (!oh->class->sysc->sysc_fields) {
  459. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  460. return -EINVAL;
  461. }
  462. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  463. autoidle_mask = (0x1 << autoidle_shift);
  464. *v &= ~autoidle_mask;
  465. *v |= autoidle << autoidle_shift;
  466. return 0;
  467. }
  468. /**
  469. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  470. * @oh: struct omap_hwmod *
  471. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  472. *
  473. * Set or clear the I/O pad wakeup flag in the mux entries for the
  474. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  475. * in memory. If the hwmod is currently idled, and the new idle
  476. * values don't match the previous ones, this function will also
  477. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  478. * currently idled, this function won't touch the hardware: the new
  479. * mux settings are written to the SCM PADCTRL registers when the
  480. * hwmod is idled. No return value.
  481. */
  482. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  483. {
  484. struct omap_device_pad *pad;
  485. bool change = false;
  486. u16 prev_idle;
  487. int j;
  488. if (!oh->mux || !oh->mux->enabled)
  489. return;
  490. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  491. pad = oh->mux->pads_dynamic[j];
  492. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  493. continue;
  494. prev_idle = pad->idle;
  495. if (set_wake)
  496. pad->idle |= OMAP_WAKEUP_EN;
  497. else
  498. pad->idle &= ~OMAP_WAKEUP_EN;
  499. if (prev_idle != pad->idle)
  500. change = true;
  501. }
  502. if (change && oh->_state == _HWMOD_STATE_IDLE)
  503. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  504. }
  505. /**
  506. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  507. * @oh: struct omap_hwmod *
  508. *
  509. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  510. * upon error or 0 upon success.
  511. */
  512. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  513. {
  514. if (!oh->class->sysc ||
  515. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  516. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  517. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  518. return -EINVAL;
  519. if (!oh->class->sysc->sysc_fields) {
  520. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  521. return -EINVAL;
  522. }
  523. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  524. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  525. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  526. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  527. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  528. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  529. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  530. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  531. return 0;
  532. }
  533. /**
  534. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  535. * @oh: struct omap_hwmod *
  536. *
  537. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  538. * upon error or 0 upon success.
  539. */
  540. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  541. {
  542. if (!oh->class->sysc ||
  543. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  544. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  545. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  546. return -EINVAL;
  547. if (!oh->class->sysc->sysc_fields) {
  548. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  549. return -EINVAL;
  550. }
  551. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  552. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  553. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  554. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  555. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  556. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
  557. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  558. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  559. return 0;
  560. }
  561. static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
  562. {
  563. struct clk_hw_omap *clk;
  564. if (oh->clkdm) {
  565. return oh->clkdm;
  566. } else if (oh->_clk) {
  567. clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
  568. return clk->clkdm;
  569. }
  570. return NULL;
  571. }
  572. /**
  573. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  574. * @oh: struct omap_hwmod *
  575. *
  576. * Prevent the hardware module @oh from entering idle while the
  577. * hardare module initiator @init_oh is active. Useful when a module
  578. * will be accessed by a particular initiator (e.g., if a module will
  579. * be accessed by the IVA, there should be a sleepdep between the IVA
  580. * initiator and the module). Only applies to modules in smart-idle
  581. * mode. If the clockdomain is marked as not needing autodeps, return
  582. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  583. * passes along clkdm_add_sleepdep() value upon success.
  584. */
  585. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  586. {
  587. struct clockdomain *clkdm, *init_clkdm;
  588. clkdm = _get_clkdm(oh);
  589. init_clkdm = _get_clkdm(init_oh);
  590. if (!clkdm || !init_clkdm)
  591. return -EINVAL;
  592. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  593. return 0;
  594. return clkdm_add_sleepdep(clkdm, init_clkdm);
  595. }
  596. /**
  597. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  598. * @oh: struct omap_hwmod *
  599. *
  600. * Allow the hardware module @oh to enter idle while the hardare
  601. * module initiator @init_oh is active. Useful when a module will not
  602. * be accessed by a particular initiator (e.g., if a module will not
  603. * be accessed by the IVA, there should be no sleepdep between the IVA
  604. * initiator and the module). Only applies to modules in smart-idle
  605. * mode. If the clockdomain is marked as not needing autodeps, return
  606. * 0 without doing anything. Returns -EINVAL upon error or passes
  607. * along clkdm_del_sleepdep() value upon success.
  608. */
  609. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  610. {
  611. struct clockdomain *clkdm, *init_clkdm;
  612. clkdm = _get_clkdm(oh);
  613. init_clkdm = _get_clkdm(init_oh);
  614. if (!clkdm || !init_clkdm)
  615. return -EINVAL;
  616. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  617. return 0;
  618. return clkdm_del_sleepdep(clkdm, init_clkdm);
  619. }
  620. /**
  621. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  622. * @oh: struct omap_hwmod *
  623. *
  624. * Called from _init_clocks(). Populates the @oh _clk (main
  625. * functional clock pointer) if a main_clk is present. Returns 0 on
  626. * success or -EINVAL on error.
  627. */
  628. static int _init_main_clk(struct omap_hwmod *oh)
  629. {
  630. int ret = 0;
  631. if (!oh->main_clk)
  632. return 0;
  633. oh->_clk = clk_get(NULL, oh->main_clk);
  634. if (IS_ERR(oh->_clk)) {
  635. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  636. oh->name, oh->main_clk);
  637. return -EINVAL;
  638. }
  639. /*
  640. * HACK: This needs a re-visit once clk_prepare() is implemented
  641. * to do something meaningful. Today its just a no-op.
  642. * If clk_prepare() is used at some point to do things like
  643. * voltage scaling etc, then this would have to be moved to
  644. * some point where subsystems like i2c and pmic become
  645. * available.
  646. */
  647. clk_prepare(oh->_clk);
  648. if (!_get_clkdm(oh))
  649. pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
  650. oh->name, oh->main_clk);
  651. return ret;
  652. }
  653. /**
  654. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  655. * @oh: struct omap_hwmod *
  656. *
  657. * Called from _init_clocks(). Populates the @oh OCP slave interface
  658. * clock pointers. Returns 0 on success or -EINVAL on error.
  659. */
  660. static int _init_interface_clks(struct omap_hwmod *oh)
  661. {
  662. struct omap_hwmod_ocp_if *os;
  663. struct list_head *p;
  664. struct clk *c;
  665. int i = 0;
  666. int ret = 0;
  667. p = oh->slave_ports.next;
  668. while (i < oh->slaves_cnt) {
  669. os = _fetch_next_ocp_if(&p, &i);
  670. if (!os->clk)
  671. continue;
  672. c = clk_get(NULL, os->clk);
  673. if (IS_ERR(c)) {
  674. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  675. oh->name, os->clk);
  676. ret = -EINVAL;
  677. }
  678. os->_clk = c;
  679. /*
  680. * HACK: This needs a re-visit once clk_prepare() is implemented
  681. * to do something meaningful. Today its just a no-op.
  682. * If clk_prepare() is used at some point to do things like
  683. * voltage scaling etc, then this would have to be moved to
  684. * some point where subsystems like i2c and pmic become
  685. * available.
  686. */
  687. clk_prepare(os->_clk);
  688. }
  689. return ret;
  690. }
  691. /**
  692. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  693. * @oh: struct omap_hwmod *
  694. *
  695. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  696. * clock pointers. Returns 0 on success or -EINVAL on error.
  697. */
  698. static int _init_opt_clks(struct omap_hwmod *oh)
  699. {
  700. struct omap_hwmod_opt_clk *oc;
  701. struct clk *c;
  702. int i;
  703. int ret = 0;
  704. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  705. c = clk_get(NULL, oc->clk);
  706. if (IS_ERR(c)) {
  707. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  708. oh->name, oc->clk);
  709. ret = -EINVAL;
  710. }
  711. oc->_clk = c;
  712. /*
  713. * HACK: This needs a re-visit once clk_prepare() is implemented
  714. * to do something meaningful. Today its just a no-op.
  715. * If clk_prepare() is used at some point to do things like
  716. * voltage scaling etc, then this would have to be moved to
  717. * some point where subsystems like i2c and pmic become
  718. * available.
  719. */
  720. clk_prepare(oc->_clk);
  721. }
  722. return ret;
  723. }
  724. /**
  725. * _enable_clocks - enable hwmod main clock and interface clocks
  726. * @oh: struct omap_hwmod *
  727. *
  728. * Enables all clocks necessary for register reads and writes to succeed
  729. * on the hwmod @oh. Returns 0.
  730. */
  731. static int _enable_clocks(struct omap_hwmod *oh)
  732. {
  733. struct omap_hwmod_ocp_if *os;
  734. struct list_head *p;
  735. int i = 0;
  736. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  737. if (oh->_clk)
  738. clk_enable(oh->_clk);
  739. p = oh->slave_ports.next;
  740. while (i < oh->slaves_cnt) {
  741. os = _fetch_next_ocp_if(&p, &i);
  742. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  743. clk_enable(os->_clk);
  744. }
  745. /* The opt clocks are controlled by the device driver. */
  746. return 0;
  747. }
  748. /**
  749. * _disable_clocks - disable hwmod main clock and interface clocks
  750. * @oh: struct omap_hwmod *
  751. *
  752. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  753. */
  754. static int _disable_clocks(struct omap_hwmod *oh)
  755. {
  756. struct omap_hwmod_ocp_if *os;
  757. struct list_head *p;
  758. int i = 0;
  759. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  760. if (oh->_clk)
  761. clk_disable(oh->_clk);
  762. p = oh->slave_ports.next;
  763. while (i < oh->slaves_cnt) {
  764. os = _fetch_next_ocp_if(&p, &i);
  765. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  766. clk_disable(os->_clk);
  767. }
  768. /* The opt clocks are controlled by the device driver. */
  769. return 0;
  770. }
  771. static void _enable_optional_clocks(struct omap_hwmod *oh)
  772. {
  773. struct omap_hwmod_opt_clk *oc;
  774. int i;
  775. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  776. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  777. if (oc->_clk) {
  778. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  779. __clk_get_name(oc->_clk));
  780. clk_enable(oc->_clk);
  781. }
  782. }
  783. static void _disable_optional_clocks(struct omap_hwmod *oh)
  784. {
  785. struct omap_hwmod_opt_clk *oc;
  786. int i;
  787. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  788. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  789. if (oc->_clk) {
  790. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  791. __clk_get_name(oc->_clk));
  792. clk_disable(oc->_clk);
  793. }
  794. }
  795. /**
  796. * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  797. * @oh: struct omap_hwmod *
  798. *
  799. * Enables the PRCM module mode related to the hwmod @oh.
  800. * No return value.
  801. */
  802. static void _omap4_enable_module(struct omap_hwmod *oh)
  803. {
  804. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  805. return;
  806. pr_debug("omap_hwmod: %s: %s: %d\n",
  807. oh->name, __func__, oh->prcm.omap4.modulemode);
  808. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  809. oh->clkdm->prcm_partition,
  810. oh->clkdm->cm_inst,
  811. oh->clkdm->clkdm_offs,
  812. oh->prcm.omap4.clkctrl_offs);
  813. }
  814. /**
  815. * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
  816. * @oh: struct omap_hwmod *
  817. *
  818. * Enables the PRCM module mode related to the hwmod @oh.
  819. * No return value.
  820. */
  821. static void _am33xx_enable_module(struct omap_hwmod *oh)
  822. {
  823. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  824. return;
  825. pr_debug("omap_hwmod: %s: %s: %d\n",
  826. oh->name, __func__, oh->prcm.omap4.modulemode);
  827. am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
  828. oh->clkdm->clkdm_offs,
  829. oh->prcm.omap4.clkctrl_offs);
  830. }
  831. /**
  832. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  833. * @oh: struct omap_hwmod *
  834. *
  835. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  836. * does not have an IDLEST bit or if the module successfully enters
  837. * slave idle; otherwise, pass along the return value of the
  838. * appropriate *_cm*_wait_module_idle() function.
  839. */
  840. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  841. {
  842. if (!oh)
  843. return -EINVAL;
  844. if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
  845. return 0;
  846. if (oh->flags & HWMOD_NO_IDLEST)
  847. return 0;
  848. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  849. oh->clkdm->cm_inst,
  850. oh->clkdm->clkdm_offs,
  851. oh->prcm.omap4.clkctrl_offs);
  852. }
  853. /**
  854. * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
  855. * @oh: struct omap_hwmod *
  856. *
  857. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  858. * does not have an IDLEST bit or if the module successfully enters
  859. * slave idle; otherwise, pass along the return value of the
  860. * appropriate *_cm*_wait_module_idle() function.
  861. */
  862. static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
  863. {
  864. if (!oh)
  865. return -EINVAL;
  866. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  867. return 0;
  868. if (oh->flags & HWMOD_NO_IDLEST)
  869. return 0;
  870. return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
  871. oh->clkdm->clkdm_offs,
  872. oh->prcm.omap4.clkctrl_offs);
  873. }
  874. /**
  875. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  876. * @oh: struct omap_hwmod *oh
  877. *
  878. * Count and return the number of MPU IRQs associated with the hwmod
  879. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  880. * NULL.
  881. */
  882. static int _count_mpu_irqs(struct omap_hwmod *oh)
  883. {
  884. struct omap_hwmod_irq_info *ohii;
  885. int i = 0;
  886. if (!oh || !oh->mpu_irqs)
  887. return 0;
  888. do {
  889. ohii = &oh->mpu_irqs[i++];
  890. } while (ohii->irq != -1);
  891. return i-1;
  892. }
  893. /**
  894. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  895. * @oh: struct omap_hwmod *oh
  896. *
  897. * Count and return the number of SDMA request lines associated with
  898. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  899. * if @oh is NULL.
  900. */
  901. static int _count_sdma_reqs(struct omap_hwmod *oh)
  902. {
  903. struct omap_hwmod_dma_info *ohdi;
  904. int i = 0;
  905. if (!oh || !oh->sdma_reqs)
  906. return 0;
  907. do {
  908. ohdi = &oh->sdma_reqs[i++];
  909. } while (ohdi->dma_req != -1);
  910. return i-1;
  911. }
  912. /**
  913. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  914. * @oh: struct omap_hwmod *oh
  915. *
  916. * Count and return the number of address space ranges associated with
  917. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  918. * if @oh is NULL.
  919. */
  920. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  921. {
  922. struct omap_hwmod_addr_space *mem;
  923. int i = 0;
  924. if (!os || !os->addr)
  925. return 0;
  926. do {
  927. mem = &os->addr[i++];
  928. } while (mem->pa_start != mem->pa_end);
  929. return i-1;
  930. }
  931. /**
  932. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  933. * @oh: struct omap_hwmod * to operate on
  934. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  935. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  936. *
  937. * Retrieve a MPU hardware IRQ line number named by @name associated
  938. * with the IP block pointed to by @oh. The IRQ number will be filled
  939. * into the address pointed to by @dma. When @name is non-null, the
  940. * IRQ line number associated with the named entry will be returned.
  941. * If @name is null, the first matching entry will be returned. Data
  942. * order is not meaningful in hwmod data, so callers are strongly
  943. * encouraged to use a non-null @name whenever possible to avoid
  944. * unpredictable effects if hwmod data is later added that causes data
  945. * ordering to change. Returns 0 upon success or a negative error
  946. * code upon error.
  947. */
  948. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  949. unsigned int *irq)
  950. {
  951. int i;
  952. bool found = false;
  953. if (!oh->mpu_irqs)
  954. return -ENOENT;
  955. i = 0;
  956. while (oh->mpu_irqs[i].irq != -1) {
  957. if (name == oh->mpu_irqs[i].name ||
  958. !strcmp(name, oh->mpu_irqs[i].name)) {
  959. found = true;
  960. break;
  961. }
  962. i++;
  963. }
  964. if (!found)
  965. return -ENOENT;
  966. *irq = oh->mpu_irqs[i].irq;
  967. return 0;
  968. }
  969. /**
  970. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  971. * @oh: struct omap_hwmod * to operate on
  972. * @name: pointer to the name of the SDMA request line to fetch (optional)
  973. * @dma: pointer to an unsigned int to store the request line ID to
  974. *
  975. * Retrieve an SDMA request line ID named by @name on the IP block
  976. * pointed to by @oh. The ID will be filled into the address pointed
  977. * to by @dma. When @name is non-null, the request line ID associated
  978. * with the named entry will be returned. If @name is null, the first
  979. * matching entry will be returned. Data order is not meaningful in
  980. * hwmod data, so callers are strongly encouraged to use a non-null
  981. * @name whenever possible to avoid unpredictable effects if hwmod
  982. * data is later added that causes data ordering to change. Returns 0
  983. * upon success or a negative error code upon error.
  984. */
  985. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  986. unsigned int *dma)
  987. {
  988. int i;
  989. bool found = false;
  990. if (!oh->sdma_reqs)
  991. return -ENOENT;
  992. i = 0;
  993. while (oh->sdma_reqs[i].dma_req != -1) {
  994. if (name == oh->sdma_reqs[i].name ||
  995. !strcmp(name, oh->sdma_reqs[i].name)) {
  996. found = true;
  997. break;
  998. }
  999. i++;
  1000. }
  1001. if (!found)
  1002. return -ENOENT;
  1003. *dma = oh->sdma_reqs[i].dma_req;
  1004. return 0;
  1005. }
  1006. /**
  1007. * _get_addr_space_by_name - fetch address space start & end by name
  1008. * @oh: struct omap_hwmod * to operate on
  1009. * @name: pointer to the name of the address space to fetch (optional)
  1010. * @pa_start: pointer to a u32 to store the starting address to
  1011. * @pa_end: pointer to a u32 to store the ending address to
  1012. *
  1013. * Retrieve address space start and end addresses for the IP block
  1014. * pointed to by @oh. The data will be filled into the addresses
  1015. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  1016. * address space data associated with the named entry will be
  1017. * returned. If @name is null, the first matching entry will be
  1018. * returned. Data order is not meaningful in hwmod data, so callers
  1019. * are strongly encouraged to use a non-null @name whenever possible
  1020. * to avoid unpredictable effects if hwmod data is later added that
  1021. * causes data ordering to change. Returns 0 upon success or a
  1022. * negative error code upon error.
  1023. */
  1024. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  1025. u32 *pa_start, u32 *pa_end)
  1026. {
  1027. int i, j;
  1028. struct omap_hwmod_ocp_if *os;
  1029. struct list_head *p = NULL;
  1030. bool found = false;
  1031. p = oh->slave_ports.next;
  1032. i = 0;
  1033. while (i < oh->slaves_cnt) {
  1034. os = _fetch_next_ocp_if(&p, &i);
  1035. if (!os->addr)
  1036. return -ENOENT;
  1037. j = 0;
  1038. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  1039. if (name == os->addr[j].name ||
  1040. !strcmp(name, os->addr[j].name)) {
  1041. found = true;
  1042. break;
  1043. }
  1044. j++;
  1045. }
  1046. if (found)
  1047. break;
  1048. }
  1049. if (!found)
  1050. return -ENOENT;
  1051. *pa_start = os->addr[j].pa_start;
  1052. *pa_end = os->addr[j].pa_end;
  1053. return 0;
  1054. }
  1055. /**
  1056. * _save_mpu_port_index - find and save the index to @oh's MPU port
  1057. * @oh: struct omap_hwmod *
  1058. *
  1059. * Determines the array index of the OCP slave port that the MPU uses
  1060. * to address the device, and saves it into the struct omap_hwmod.
  1061. * Intended to be called during hwmod registration only. No return
  1062. * value.
  1063. */
  1064. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  1065. {
  1066. struct omap_hwmod_ocp_if *os = NULL;
  1067. struct list_head *p;
  1068. int i = 0;
  1069. if (!oh)
  1070. return;
  1071. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1072. p = oh->slave_ports.next;
  1073. while (i < oh->slaves_cnt) {
  1074. os = _fetch_next_ocp_if(&p, &i);
  1075. if (os->user & OCP_USER_MPU) {
  1076. oh->_mpu_port = os;
  1077. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  1078. break;
  1079. }
  1080. }
  1081. return;
  1082. }
  1083. /**
  1084. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  1085. * @oh: struct omap_hwmod *
  1086. *
  1087. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  1088. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  1089. * communicate with the IP block. This interface need not be directly
  1090. * connected to the MPU (and almost certainly is not), but is directly
  1091. * connected to the IP block represented by @oh. Returns a pointer
  1092. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  1093. * error or if there does not appear to be a path from the MPU to this
  1094. * IP block.
  1095. */
  1096. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  1097. {
  1098. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  1099. return NULL;
  1100. return oh->_mpu_port;
  1101. };
  1102. /**
  1103. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  1104. * @oh: struct omap_hwmod *
  1105. *
  1106. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  1107. * the register target MPU address space; or returns NULL upon error.
  1108. */
  1109. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  1110. {
  1111. struct omap_hwmod_ocp_if *os;
  1112. struct omap_hwmod_addr_space *mem;
  1113. int found = 0, i = 0;
  1114. os = _find_mpu_rt_port(oh);
  1115. if (!os || !os->addr)
  1116. return NULL;
  1117. do {
  1118. mem = &os->addr[i++];
  1119. if (mem->flags & ADDR_TYPE_RT)
  1120. found = 1;
  1121. } while (!found && mem->pa_start != mem->pa_end);
  1122. return (found) ? mem : NULL;
  1123. }
  1124. /**
  1125. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  1126. * @oh: struct omap_hwmod *
  1127. *
  1128. * Ensure that the OCP_SYSCONFIG register for the IP block represented
  1129. * by @oh is set to indicate to the PRCM that the IP block is active.
  1130. * Usually this means placing the module into smart-idle mode and
  1131. * smart-standby, but if there is a bug in the automatic idle handling
  1132. * for the IP block, it may need to be placed into the force-idle or
  1133. * no-idle variants of these modes. No return value.
  1134. */
  1135. static void _enable_sysc(struct omap_hwmod *oh)
  1136. {
  1137. u8 idlemode, sf;
  1138. u32 v;
  1139. bool clkdm_act;
  1140. struct clockdomain *clkdm;
  1141. if (!oh->class->sysc)
  1142. return;
  1143. /*
  1144. * Wait until reset has completed, this is needed as the IP
  1145. * block is reset automatically by hardware in some cases
  1146. * (off-mode for example), and the drivers require the
  1147. * IP to be ready when they access it
  1148. */
  1149. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1150. _enable_optional_clocks(oh);
  1151. _wait_softreset_complete(oh);
  1152. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1153. _disable_optional_clocks(oh);
  1154. v = oh->_sysc_cache;
  1155. sf = oh->class->sysc->sysc_flags;
  1156. clkdm = _get_clkdm(oh);
  1157. if (sf & SYSC_HAS_SIDLEMODE) {
  1158. clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
  1159. if (clkdm_act && !(oh->class->sysc->idlemodes &