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waterDataStatistics
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dataSharedMemory
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memoryCall.h

memoryCall.h 14 KB
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  1. /*
    2. 

  2.  * Copyright 2011 Analog Devices Inc.
    3. 

  3.  *
    4. 

  4.  * Licensed under the GPL-2 or later.
    5. 

  5.  */
    6. 

  6. 

  7. #ifndef _CDEF_BF60X_H
    8. 

  8. #define _CDEF_BF60X_H
    9. 

  9. 

  10. /* ************************************************************** */
    11. 

  11. /* SYSTEM & MMR ADDRESS DEFINITIONS COMMON TO ALL ADSP-BF60x    */
    12. 

  12. /* ************************************************************** */
    13. 

  13. 

  14. /* Debug/MP/Emulation Registers (0xFFC00014 - 0xFFC00014) */
    15. 

  15. 

  16. #define bfin_read_CHIPID()		bfin_read32(CHIPID)
    17. 

  17. #define bfin_write_CHIPID(val)		bfin_write32(CHIPID, val)
    18. 

  18. 

  19. /* System Reset and Interrubfin_read_()t Controller (0xFFC00100 - 0xFFC00104) */
    20. 

  20. 

  21. /* SEC0 Registers */
    22. 

  22. #define bfin_read_SEC0_CCTL()		bfin_read32(SEC0_CCTL)
    23. 

  23. #define bfin_write_SEC0_CCTL(val)	bfin_write32(SEC0_CCTL, val)
    24. 

  24. #define bfin_read_SEC0_CSID()		bfin_read32(SEC0_CSID)
    25. 

  25. #define bfin_write_SEC0_CSID(val)	bfin_write32(SEC0_CSID, val)
    26. 

  26. #define bfin_read_SEC_GCTL()		bfin_read32(SEC_GCTL)
    27. 

  27. #define bfin_write_SEC_GCTL(val)	bfin_write32(SEC_GCTL, val)
    28. 

  28. 

  29. #define bfin_read_SEC_FCTL()		bfin_read32(SEC_FCTL)
    30. 

  30. #define bfin_write_SEC_FCTL(val)	bfin_write32(SEC_FCTL, val)
    31. 

  31. 

  32. #define bfin_read_SEC_SCTL(sid)		bfin_read32((SEC_SCTL0 + (sid) * 8))
    33. 

  33. #define bfin_write_SEC_SCTL(sid, val)	bfin_write32((SEC_SCTL0 + (sid) * 8), val)
    34. 

  34. 

  35. #define bfin_read_SEC_SSTAT(sid)	bfin_read32((SEC_SSTAT0 + (sid) * 8))
    36. 

  36. #define bfin_write_SEC_SSTAT(sid, val)	bfin_write32((SEC_SSTAT0 + (sid) * 8), val)
    37. 

  37. 

  38. /* RCU0 Registers */
    39. 

  39. #define bfin_read_RCU0_CTL()		bfin_read32(RCU0_CTL)
    40. 

  40. #define bfin_write_RCU0_CTL(val)	bfin_write32(RCU0_CTL, val)
    41. 

  41. 

  42. /* Watchdog Timer Registers */
    43. 

  43. #define bfin_read_WDOG_CTL()		bfin_read16(WDOG_CTL)
    44. 

  44. #define bfin_write_WDOG_CTL(val)	bfin_write16(WDOG_CTL, val)
    45. 

  45. #define bfin_read_WDOG_CNT()		bfin_read32(WDOG_CNT)
    46. 

  46. #define bfin_write_WDOG_CNT(val)	bfin_write32(WDOG_CNT, val)
    47. 

  47. #define bfin_read_WDOG_STAT()		bfin_read32(WDOG_STAT)
    48. 

  48. #define bfin_write_WDOG_STAT(val)	bfin_write32(WDOG_STAT, val)
    49. 

  49. 

  50. /* RTC Registers */
    51. 

  51. 

  52. /* UART0 Registers */
    53. 

  53. 

  54. #define bfin_read_UART0_REVID()		bfin_read32(UART0_REVID)
    55. 

  55. #define bfin_write_UART0_REVID(val)	bfin_write32(UART0_REVID, val)
    56. 

  56. #define bfin_read_UART0_GCTL()		bfin_read32(UART0_GCTL)
    57. 

  57. #define bfin_write_UART0_GCTL(val)	bfin_write32(UART0_GCTL, val)
    58. 

  58. #define bfin_read_UART0_STAT()		bfin_read32(UART0_STAT)
    59. 

  59. #define bfin_write_UART0_STAT(val)	bfin_write32(UART0_STAT, val)
    60. 

  60. #define bfin_read_UART0_SCR()		bfin_read32(UART0_SCR)
    61. 

  61. #define bfin_write_UART0_SCR(val)	bfin_write32(UART0_SCR, val)
    62. 

  62. #define bfin_read_UART0_CLK()		bfin_read32(UART0_CLK)
    63. 

  63. #define bfin_write_UART0_CLK(val)	bfin_write32(UART0_CLK, val)
    64. 

  64. #define bfin_read_UART0_IER()		bfin_read32(UART0_IER)
    65. 

  65. #define bfin_write_UART0_IER(val)	bfin_write32(UART0_IER, val)
    66. 

  66. #define bfin_read_UART0_IER_SET()	bfin_read32(UART0_IER_SET)
    67. 

  67. #define bfin_write_UART0_IER_SET(val)	bfin_write32(UART0_IER_SET, val)
    68. 

  68. #define bfin_read_UART0_IER_CLEAR()	bfin_read32(UART0_IER_CLEAR)
    69. 

  69. #define bfin_write_UART0_IER_CLEAR(val)	bfin_write32(UART0_IER_CLEAR, val)
    70. 

  70. #define bfin_read_UART0_RBR()		bfin_read32(UART0_RBR)
    71. 

  71. #define bfin_write_UART0_RBR(val)	bfin_write32(UART0_RBR, val)
    72. 

  72. #define bfin_read_UART0_THR()		bfin_read32(UART0_THR)
    73. 

  73. #define bfin_write_UART0_THR(val)	bfin_write32(UART0_THR, val)
    74. 

  74. #define bfin_read_UART0_TAIP()		bfin_read32(UART0_TAIP)
    75. 

  75. #define bfin_write_UART0_TAIP(val)	bfin_write32(UART0_TAIP, val)
    76. 

  76. #define bfin_read_UART0_TSR()		bfin_read32(UART0_TSR)
    77. 

  77. #define bfin_write_UART0_TSR(val)	bfin_write32(UART0_TSR, val)
    78. 

  78. #define bfin_read_UART0_RSR()		bfin_read32(UART0_RSR)
    79. 

  79. #define bfin_write_UART0_RSR(val)	bfin_write32(UART0_RSR, val)
    80. 

  80. #define bfin_read_UART0_TXCNT()		bfin_read32(UART0_TXCNT)
    81. 

  81. #define bfin_write_UART0_TXCNT(val)	bfin_write32(UART0_TXCNT, val)
    82. 

  82. #define bfin_read_UART0_RXCNT()		bfin_read32(UART0_RXCNT)
    83. 

  83. #define bfin_write_UART0_RXCNT(val)	bfin_write32(UART0_RXCNT, val)
    84. 

  84. 

  85. /* UART1 Registers */
    86. 

  86. 

  87. #define bfin_read_UART1_REVID()		bfin_read32(UART1_REVID)
    88. 

  88. #define bfin_write_UART1_REVID(val)	bfin_write32(UART1_REVID, val)
    89. 

  89. #define bfin_read_UART1_GCTL()		bfin_read32(UART1_GCTL)
    90. 

  90. #define bfin_write_UART1_GCTL(val)	bfin_write32(UART1_GCTL, val)
    91. 

  91. #define bfin_read_UART1_STAT()		bfin_read32(UART1_STAT)
    92. 

  92. #define bfin_write_UART1_STAT(val)	bfin_write32(UART1_STAT, val)
    93. 

  93. #define bfin_read_UART1_SCR()		bfin_read32(UART1_SCR)
    94. 

  94. #define bfin_write_UART1_SCR(val)	bfin_write32(UART1_SCR, val)
    95. 

  95. #define bfin_read_UART1_CLK()		bfin_read32(UART1_CLK)
    96. 

  96. #define bfin_write_UART1_CLK(val)	bfin_write32(UART1_CLK, val)
    97. 

  97. #define bfin_read_UART1_IER()		bfin_read32(UART1_IER)
    98. 

  98. #define bfin_write_UART1_IER(val)	bfin_write32(UART1_IER, val)
    99. 

  99. #define bfin_read_UART1_IER_SET()	bfin_read32(UART1_IER_SET)
    100. 

  100. #define bfin_write_UART1_IER_SET(val)	bfin_write32(UART1_IER_SET, val)
    101. 

  101. #define bfin_read_UART1_IER_CLEAR()	bfin_read32(UART1_IER_CLEAR)
    102. 

  102. #define bfin_write_UART1_IER_CLEAR(val)	bfin_write32(UART1_IER_CLEAR, val)
    103. 

  103. #define bfin_read_UART1_RBR()		bfin_read32(UART1_RBR)
    104. 

  104. #define bfin_write_UART1_RBR(val)	bfin_write32(UART1_RBR, val)
    105. 

  105. #define bfin_read_UART1_THR()		bfin_read32(UART1_THR)
    106. 

  106. #define bfin_write_UART1_THR(val)	bfin_write32(UART1_THR, val)
    107. 

  107. #define bfin_read_UART1_TAIP()		bfin_read32(UART1_TAIP)
    108. 

  108. #define bfin_write_UART1_TAIP(val)	bfin_write32(UART1_TAIP, val)
    109. 

  109. #define bfin_read_UART1_TSR()		bfin_read32(UART1_TSR)
    110. 

  110. #define bfin_write_UART1_TSR(val)	bfin_write32(UART1_TSR, val)
    111. 

  111. #define bfin_read_UART1_RSR()		bfin_read32(UART1_RSR)
    112. 

  112. #define bfin_write_UART1_RSR(val)	bfin_write32(UART1_RSR, val)
    113. 

  113. #define bfin_read_UART1_TXCNT()		bfin_read32(UART1_TXCNT)
    114. 

  114. #define bfin_write_UART1_TXCNT(val)	bfin_write32(UART1_TXCNT, val)
    115. 

  115. #define bfin_read_UART1_RXCNT()		bfin_read32(UART1_RXCNT)
    116. 

  116. #define bfin_write_UART1_RXCNT(val)	bfin_write32(UART1_RXCNT, val)
    117. 

  117. 

  118. 

  119. /* SPI0 Registers */
    120. 

  120. 

  121. #define bfin_read_SPI0_CTL()		bfin_read32(SPI0_CTL)
    122. 

  122. #define bfin_write_SPI0_CTL(val)	bfin_write32(SPI0_CTL, val)
    123. 

  123. #define bfin_read_SPI0_RXCTL()		bfin_read32(SPI0_RXCTL)
    124. 

  124. #define bfin_write_SPI0_RXCTL(val)	bfin_write32(SPI0_RXCTL, val)
    125. 

  125. #define bfin_read_SPI0_TXCTL()		bfin_read32(SPI0_TXCTL)
    126. 

  126. #define bfin_write_SPI0_TXCTL(val)	bfin_write32(SPI0_TXCTL, val)
    127. 

  127. #define bfin_read_SPI0_CLK()		bfin_read32(SPI0_CLK)
    128. 

  128. #define bfin_write_SPI0_CLK(val)	bfin_write32(SPI0_CLK, val)
    129. 

  129. #define bfin_read_SPI0_DLY()		bfin_read32(SPI0_DLY)
    130. 

  130. #define bfin_write_SPI0_DLY(val)	bfin_write32(SPI0_DLY, val)
    131. 

  131. #define bfin_read_SPI0_SLVSEL()		bfin_read32(SPI0_SLVSEL)
    132. 

  132. #define bfin_write_SPI0_SLVSEL(val)	bfin_write32(SPI0_SLVSEL, val)
    133. 

  133. #define bfin_read_SPI0_RWC()		bfin_read32(SPI0_RWC)
    134. 

  134. #define bfin_write_SPI0_RWC(val)	bfin_write32(SPI0_RWC, val)
    135. 

  135. #define bfin_read_SPI0_RWCR()		bfin_read32(SPI0_RWCR)
    136. 

  136. #define bfin_write_SPI0_RWCR(val)	bfin_write32(SPI0_RWCR, val)
    137. 

  137. #define bfin_read_SPI0_TWC()		bfin_read32(SPI0_TWC)
    138. 

  138. #define bfin_write_SPI0_TWC(val)	bfin_write32(SPI0_TWC, val)
    139. 

  139. #define bfin_read_SPI0_TWCR()		bfin_read32(SPI0_TWCR)
    140. 

  140. #define bfin_write_SPI0_TWCR(val)	bfin_write32(SPI0_TWCR, val)
    141. 

  141. #define bfin_read_SPI0_IMSK()		bfin_read32(SPI0_IMSK)
    142. 

  142. #define bfin_write_SPI0_IMSK(val)	bfin_write32(SPI0_IMSK, val)
    143. 

  143. #define bfin_read_SPI0_IMSK_CLR()	bfin_read32(SPI0_IMSK_CLR)
    144. 

  144. #define bfin_write_SPI0_IMSK_CLR(val)	bfin_write32(SPI0_IMSK_CLR, val)
    145. 

  145. #define bfin_read_SPI0_IMSK_SET()	bfin_read32(SPI0_IMSK_SET)
    146. 

  146. #define bfin_write_SPI0_IMSK_SET(val)	bfin_write32(SPI0_IMSK_SET, val)
    147. 

  147. #define bfin_read_SPI0_STAT()		bfin_read32(SPI0_STAT)
    148. 

  148. #define bfin_write_SPI0_STAT(val)	bfin_write32(SPI0_STAT, val)
    149. 

  149. #define bfin_read_SPI0_ILAT()		bfin_read32(SPI0_ILAT)
    150. 

  150. #define bfin_write_SPI0_ILAT(val)	bfin_write32(SPI0_ILAT, val)
    151. 

  151. #define bfin_read_SPI0_ILAT_CLR()	bfin_read32(SPI0_ILAT_CLR)
    152. 

  152. #define bfin_write_SPI0_ILAT_CLR(val)	bfin_write32(SPI0_ILAT_CLR, val)
    153. 

  153. #define bfin_read_SPI0_RFIFO()		bfin_read32(SPI0_RFIFO)
    154. 

  154. #define bfin_write_SPI0_RFIFO(val)	bfin_write32(SPI0_RFIFO, val)
    155. 

  155. #define bfin_read_SPI0_TFIFO()		bfin_read32(SPI0_TFIFO)
    156. 

  156. #define bfin_write_SPI0_TFIFO(val)	bfin_write32(SPI0_TFIFO, val)
    157. 

  157. 

  158. /* SPI1 Registers */
    159. 

  159. 

  160. #define bfin_read_SPI1_CTL()		bfin_read32(SPI1_CTL)
    161. 

  161. #define bfin_write_SPI1_CTL(val)	bfin_write32(SPI1_CTL, val)
    162. 

  162. #define bfin_read_SPI1_RXCTL()		bfin_read32(SPI1_RXCTL)
    163. 

  163. #define bfin_write_SPI1_RXCTL(val)	bfin_write32(SPI1_RXCTL, val)
    164. 

  164. #define bfin_read_SPI1_TXCTL()		bfin_read32(SPI1_TXCTL)
    165. 

  165. #define bfin_write_SPI1_TXCTL(val)	bfin_write32(SPI1_TXCTL, val)
    166. 

  166. #define bfin_read_SPI1_CLK()		bfin_read32(SPI1_CLK)
    167. 

  167. #define bfin_write_SPI1_CLK(val)	bfin_write32(SPI1_CLK, val)
    168. 

  168. #define bfin_read_SPI1_DLY()		bfin_read32(SPI1_DLY)
    169. 

  169. #define bfin_write_SPI1_DLY(val)	bfin_write32(SPI1_DLY, val)
    170. 

  170. #define bfin_read_SPI1_SLVSEL()		bfin_read32(SPI1_SLVSEL)
    171. 

  171. #define bfin_write_SPI1_SLVSEL(val)	bfin_write32(SPI1_SLVSEL, val)
    172. 

  172. #define bfin_read_SPI1_RWC()		bfin_read32(SPI1_RWC)
    173. 

  173. #define bfin_write_SPI1_RWC(val)	bfin_write32(SPI1_RWC, val)
    174. 

  174. #define bfin_read_SPI1_RWCR()		bfin_read32(SPI1_RWCR)
    175. 

  175. #define bfin_write_SPI1_RWCR(val)	bfin_write32(SPI1_RWCR, val)
    176. 

  176. #define bfin_read_SPI1_TWC()		bfin_read32(SPI1_TWC)
    177. 

  177. #define bfin_write_SPI1_TWC(val)	bfin_write32(SPI1_TWC, val)
    178. 

  178. #define bfin_read_SPI1_TWCR()		bfin_read32(SPI1_TWCR)
    179. 

  179. #define bfin_write_SPI1_TWCR(val)	bfin_write32(SPI1_TWCR, val)
    180. 

  180. #define bfin_read_SPI1_IMSK()		bfin_read32(SPI1_IMSK)
    181. 

  181. #define bfin_write_SPI1_IMSK(val)	bfin_write32(SPI1_IMSK, val)
    182. 

  182. #define bfin_read_SPI1_IMSK_CLR()	bfin_read32(SPI1_IMSK_CLR)
    183. 

  183. #define bfin_write_SPI1_IMSK_CLR(val)	bfin_write32(SPI1_IMSK_CLR, val)
    184. 

  184. #define bfin_read_SPI1_IMSK_SET()	bfin_read32(SPI1_IMSK_SET)
    185. 

  185. #define bfin_write_SPI1_IMSK_SET(val)	bfin_write32(SPI1_IMSK_SET, val)
    186. 

  186. #define bfin_read_SPI1_STAT()		bfin_read32(SPI1_STAT)
    187. 

  187. #define bfin_write_SPI1_STAT(val)	bfin_write32(SPI1_STAT, val)
    188. 

  188. #define bfin_read_SPI1_ILAT()		bfin_read32(SPI1_ILAT)
    189. 

  189. #define bfin_write_SPI1_ILAT(val)	bfin_write32(SPI1_ILAT, val)
    190. 

  190. #define bfin_read_SPI1_ILAT_CLR()	bfin_read32(SPI1_ILAT_CLR)
    191. 

  191. #define bfin_write_SPI1_ILAT_CLR(val)	bfin_write32(SPI1_ILAT_CLR, val)
    192. 

  192. #define bfin_read_SPI1_RFIFO()		bfin_read32(SPI1_RFIFO)
    193. 

  193. #define bfin_write_SPI1_RFIFO(val)	bfin_write32(SPI1_RFIFO, val)
    194. 

  194. #define bfin_read_SPI1_TFIFO()		bfin_read32(SPI1_TFIFO)
    195. 

  195. #define bfin_write_SPI1_TFIFO(val)	bfin_write32(SPI1_TFIFO, val)
    196. 

  196. 

  197. /* Timer 0-7 registers */
    198. 

  198. #define bfin_read_TIMER0_CONFIG()            bfin_read16(TIMER0_CONFIG)
    199. 

  199. #define bfin_write_TIMER0_CONFIG(val)        bfin_write16(TIMER0_CONFIG, val)
    200. 

  200. #define bfin_read_TIMER0_COUNTER()           bfin_read32(TIMER0_COUNTER)
    201. 

  201. #define bfin_write_TIMER0_COUNTER(val)       bfin_write32(TIMER0_COUNTER, val)
    202. 

  202. #define bfin_read_TIMER0_PERIOD()            bfin_read32(TIMER0_PERIOD)
    203. 

  203. #define bfin_write_TIMER0_PERIOD(val)        bfin_write32(TIMER0_PERIOD, val)
    204. 

  204. #define bfin_read_TIMER0_WIDTH()             bfin_read32(TIMER0_WIDTH)
    205. 

  205. #define bfin_write_TIMER0_WIDTH(val)         bfin_write32(TIMER0_WIDTH, val)
    206. 

  206. #define bfin_read_TIMER1_CONFIG()            bfin_read16(TIMER1_CONFIG)
    207. 

  207. #define bfin_write_TIMER1_CONFIG(val)        bfin_write16(TIMER1_CONFIG, val)
    208. 

  208. #define bfin_read_TIMER1_COUNTER()           bfin_read32(TIMER1_COUNTER)
    209. 

  209. #define bfin_write_TIMER1_COUNTER(val)       bfin_write32(TIMER1_COUNTER, val)
    210. 

  210. #define bfin_read_TIMER1_PERIOD()            bfin_read32(TIMER1_PERIOD)
    211. 

  211. #define bfin_write_TIMER1_PERIOD(val)        bfin_write32(TIMER1_PERIOD, val)
    212. 

  212. #define bfin_read_TIMER1_WIDTH()             bfin_read32(TIMER1_WIDTH)
    213. 

  213. #define bfin_write_TIMER1_WIDTH(val)         bfin_write32(TIMER1_WIDTH, val)
    214. 

  214. #define bfin_read_TIMER2_CONFIG()            bfin_read16(TIMER2_CONFIG)
    215. 

  215. #define bfin_write_TIMER2_CONFIG(val)        bfin_write16(TIMER2_CONFIG, val)
    216. 

  216. #define bfin_read_TIMER2_COUNTER()           bfin_read32(TIMER2_COUNTER)
    217. 

  217. #define bfin_write_TIMER2_COUNTER(val)       bfin_write32(TIMER2_COUNTER, val)
    218. 

  218. #define bfin_read_TIMER2_PERIOD()            bfin_read32(TIMER2_PERIOD)
    219. 

  219. #define bfin_write_TIMER2_PERIOD(val)        bfin_write32(TIMER2_PERIOD, val)
    220. 

  220. #define bfin_read_TIMER2_WIDTH()             bfin_read32(TIMER2_WIDTH)
    221. 

  221. #define bfin_write_TIMER2_WIDTH(val)         bfin_write32(TIMER2_WIDTH, val)
    222. 

  222. #define bfin_read_TIMER3_CONFIG()            bfin_read16(TIMER3_CONFIG)
    223. 

  223. #define bfin_write_TIMER3_CONFIG(val)        bfin_write16(TIMER3_CONFIG, val)
    224. 

  224. #define bfin_read_TIMER3_COUNTER()           bfin_read32(TIMER3_COUNTER)
    225. 

  225. #define bfin_write_TIMER3_COUNTER(val)       bfin_write32(TIMER3_COUNTER, val)
    226. 

  226. #define bfin_read_TIMER3_PERIOD()            bfin_read32(TIMER3_PERIOD)
    227. 

  227. #define bfin_write_TIMER3_PERIOD(val)        bfin_write32(TIMER3_PERIOD, val)
    228. 

  228. #define bfin_read_TIMER3_WIDTH()             bfin_read32(TIMER3_WIDTH)
    229. 

  229. #define bfin_write_TIMER3_WIDTH(val)         bfin_write32(TIMER3_WIDTH, val)
    230. 

  230. #define bfin_read_TIMER4_CONFIG()            bfin_read16(TIMER4_CONFIG)
    231. 

  231. #define bfin_write_TIMER4_CONFIG(val)        bfin_write16(TIMER4_CONFIG, val)
    232. 

  232. #define bfin_read_TIMER4_COUNTER()           bfin_read32(TIMER4_COUNTER)
    233. 

  233. #define bfin_write_TIMER4_COUNTER(val)       bfin_write32(TIMER4_COUNTER, val)
    234. 

  234. #define bfin_read_TIMER4_PERIOD()            bfin_read32(TIMER4_PERIOD)
    235. 

  235. #define bfin_write_TIMER4_PERIOD(val)        bfin_write32(TIMER4_PERIOD, val)
    236. 

  236. #define bfin_read_TIMER4_WIDTH()             bfin_read32(TIMER4_WIDTH)
    237. 

  237. #define bfin_write_TIMER4_WIDTH(val)         bfin_write32(TIMER4_WIDTH, val)
    238. 

  238. #define bfin_read_TIMER5_CONFIG()            bfin_read16(TIMER5_CONFIG)
    239. 

  239. #define bfin_write_TIMER5_CONFIG(val)        bfin_write16(TIMER5_CONFIG, val)
    240. 

  240. #define bfin_read_TIMER5_COUNTER()           bfin_read32(TIMER5_COUNTER)
    241. 

  241. #define bfin_write_TIMER5_COUNTER(val)       bfin_write32(TIMER5_COUNTER, val)
    242. 

  242. #define bfin_read_TIMER5_PERIOD()            bfin_read32(TIMER5_PERIOD)
    243. 

  243. #define bfin_write_TIMER5_PERIOD(val)        bfin_write32(TIMER5_PERIOD, val)
    244. 

  244. #define bfin_read_TIMER5_WIDTH()             bfin_read32(TIMER5_WIDTH)
    245. 

  245. #define bfin_write_TIMER5_WIDTH(val)         bfin_write32(TIMER5_WIDTH, val)
    246. 

  246. #define bfin_read_TIMER6_CONFIG()            bfin_read16(TIMER6_CONFIG)
    247. 

  247. #define bfin_write_TIMER6_CONFIG(val)        bfin_write16(TIMER6_CONFIG, val)
    248. 

  248. #define bfin_read_TIMER6_COUNTER()           bfin_read32(TIMER6_COUNTER)
    249. 

  249. #define bfin_write_TIMER6_COUNTER(val)       bfin_write32(TIMER6_COUNTER, val)
    250.