Home Explore Help
Sign In
lixinru
/
aiot
1
0
Fork 0
Files Issues 0 Pull Requests 0 Wiki
Tree: a3da67e29b
Branches Tags
aiot
/
waterDataStatisticsCrossAssociation
/
dataAssociation
/
hiddenDangerAnalysis.h

hiddenDangerAnalysis.h 31 KB
History Raw

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533 
  1. /*
    2. 

  2.  * Copyright 2007-2010 Analog Devices Inc.
    3. 

  3.  *
    4. 

  4.  * Licensed under the GPL-2 or later.
    5. 

  5.  */
    6. 

  6. 

  7. #ifndef _CDEF_BF522_H
    8. 

  8. #define _CDEF_BF522_H
    9. 

  9. 

  10. /* Clock and System Control	(0xFFC00000 - 0xFFC000FF)								*/
    11. 

  11. #define bfin_read_PLL_CTL()			bfin_read16(PLL_CTL)
    12. 

  12. #define bfin_read_PLL_DIV()			bfin_read16(PLL_DIV)
    13. 

  13. #define bfin_write_PLL_DIV(val)			bfin_write16(PLL_DIV, val)
    14. 

  14. #define bfin_read_VR_CTL()			bfin_read16(VR_CTL)
    15. 

  15. #define bfin_read_PLL_STAT()			bfin_read16(PLL_STAT)
    16. 

  16. #define bfin_write_PLL_STAT(val)		bfin_write16(PLL_STAT, val)
    17. 

  17. #define bfin_read_PLL_LOCKCNT()			bfin_read16(PLL_LOCKCNT)
    18. 

  18. #define bfin_write_PLL_LOCKCNT(val)		bfin_write16(PLL_LOCKCNT, val)
    19. 

  19. #define bfin_read_CHIPID()			bfin_read32(CHIPID)
    20. 

  20. #define bfin_write_CHIPID(val)			bfin_write32(CHIPID, val)
    21. 

  21. 

  22. 

  23. /* System Interrupt Controller (0xFFC00100 - 0xFFC001FF)							*/
    24. 

  24. #define bfin_read_SWRST()			bfin_read16(SWRST)
    25. 

  25. #define bfin_write_SWRST(val)			bfin_write16(SWRST, val)
    26. 

  26. #define bfin_read_SYSCR()			bfin_read16(SYSCR)
    27. 

  27. #define bfin_write_SYSCR(val)			bfin_write16(SYSCR, val)
    28. 

  28. 

  29. #define bfin_read_SIC_RVECT()			bfin_read32(SIC_RVECT)
    30. 

  30. #define bfin_write_SIC_RVECT(val)		bfin_write32(SIC_RVECT, val)
    31. 

  31. #define bfin_read_SIC_IMASK0()			bfin_read32(SIC_IMASK0)
    32. 

  32. #define bfin_write_SIC_IMASK0(val)		bfin_write32(SIC_IMASK0, val)
    33. 

  33. #define bfin_read_SIC_IMASK(x)			bfin_read32(SIC_IMASK0 + (x << 6))
    34. 

  34. #define bfin_write_SIC_IMASK(x, val)		bfin_write32((SIC_IMASK0 + (x << 6)), val)
    35. 

  35. 

  36. #define bfin_read_SIC_IAR0()			bfin_read32(SIC_IAR0)
    37. 

  37. #define bfin_write_SIC_IAR0(val)		bfin_write32(SIC_IAR0, val)
    38. 

  38. #define bfin_read_SIC_IAR1()			bfin_read32(SIC_IAR1)
    39. 

  39. #define bfin_write_SIC_IAR1(val)		bfin_write32(SIC_IAR1, val)
    40. 

  40. #define bfin_read_SIC_IAR2()			bfin_read32(SIC_IAR2)
    41. 

  41. #define bfin_write_SIC_IAR2(val)		bfin_write32(SIC_IAR2, val)
    42. 

  42. #define bfin_read_SIC_IAR3()			bfin_read32(SIC_IAR3)
    43. 

  43. #define bfin_write_SIC_IAR3(val)		bfin_write32(SIC_IAR3, val)
    44. 

  44. 

  45. #define bfin_read_SIC_ISR0()			bfin_read32(SIC_ISR0)
    46. 

  46. #define bfin_write_SIC_ISR0(val)		bfin_write32(SIC_ISR0, val)
    47. 

  47. #define bfin_read_SIC_ISR(x)			bfin_read32(SIC_ISR0 + (x << 6))
    48. 

  48. #define bfin_write_SIC_ISR(x, val)		bfin_write32((SIC_ISR0 + (x << 6)), val)
    49. 

  49. 

  50. #define bfin_read_SIC_IWR0()			bfin_read32(SIC_IWR0)
    51. 

  51. #define bfin_write_SIC_IWR0(val)		bfin_write32(SIC_IWR0, val)
    52. 

  52. #define bfin_read_SIC_IWR(x)			bfin_read32(SIC_IWR0 + (x << 6))
    53. 

  53. #define bfin_write_SIC_IWR(x, val)		bfin_write32((SIC_IWR0 + (x << 6)), val)
    54. 

  54. 

  55. /* SIC Additions to ADSP-BF52x (0xFFC0014C - 0xFFC00162) */
    56. 

  56. 

  57. #define bfin_read_SIC_IMASK1()			bfin_read32(SIC_IMASK1)
    58. 

  58. #define bfin_write_SIC_IMASK1(val)		bfin_write32(SIC_IMASK1, val)
    59. 

  59. #define bfin_read_SIC_IAR4()			bfin_read32(SIC_IAR4)
    60. 

  60. #define bfin_write_SIC_IAR4(val)		bfin_write32(SIC_IAR4, val)
    61. 

  61. #define bfin_read_SIC_IAR5()			bfin_read32(SIC_IAR5)
    62. 

  62. #define bfin_write_SIC_IAR5(val)		bfin_write32(SIC_IAR5, val)
    63. 

  63. #define bfin_read_SIC_IAR6()			bfin_read32(SIC_IAR6)
    64. 

  64. #define bfin_write_SIC_IAR6(val)		bfin_write32(SIC_IAR6, val)
    65. 

  65. #define bfin_read_SIC_IAR7()			bfin_read32(SIC_IAR7)
    66. 

  66. #define bfin_write_SIC_IAR7(val)		bfin_write32(SIC_IAR7, val)
    67. 

  67. #define bfin_read_SIC_ISR1()			bfin_read32(SIC_ISR1)
    68. 

  68. #define bfin_write_SIC_ISR1(val)		bfin_write32(SIC_ISR1, val)
    69. 

  69. #define bfin_read_SIC_IWR1()			bfin_read32(SIC_IWR1)
    70. 

  70. #define bfin_write_SIC_IWR1(val)		bfin_write32(SIC_IWR1, val)
    71. 

  71. 

  72. /* Watchdog Timer		(0xFFC00200 - 0xFFC002FF)									*/
    73. 

  73. #define bfin_read_WDOG_CTL()			bfin_read16(WDOG_CTL)
    74. 

  74. #define bfin_write_WDOG_CTL(val)		bfin_write16(WDOG_CTL, val)
    75. 

  75. #define bfin_read_WDOG_CNT()			bfin_read32(WDOG_CNT)
    76. 

  76. #define bfin_write_WDOG_CNT(val)		bfin_write32(WDOG_CNT, val)
    77. 

  77. #define bfin_read_WDOG_STAT()			bfin_read32(WDOG_STAT)
    78. 

  78. #define bfin_write_WDOG_STAT(val)		bfin_write32(WDOG_STAT, val)
    79. 

  79. 

  80. 

  81. /* Real Time Clock		(0xFFC00300 - 0xFFC003FF)									*/
    82. 

  82. #define bfin_read_RTC_STAT()			bfin_read32(RTC_STAT)
    83. 

  83. #define bfin_write_RTC_STAT(val)		bfin_write32(RTC_STAT, val)
    84. 

  84. #define bfin_read_RTC_ICTL()			bfin_read16(RTC_ICTL)
    85. 

  85. #define bfin_write_RTC_ICTL(val)		bfin_write16(RTC_ICTL, val)
    86. 

  86. #define bfin_read_RTC_ISTAT()			bfin_read16(RTC_ISTAT)
    87. 

  87. #define bfin_write_RTC_ISTAT(val)		bfin_write16(RTC_ISTAT, val)
    88. 

  88. #define bfin_read_RTC_SWCNT()			bfin_read16(RTC_SWCNT)
    89. 

  89. #define bfin_write_RTC_SWCNT(val)		bfin_write16(RTC_SWCNT, val)
    90. 

  90. #define bfin_read_RTC_ALARM()			bfin_read32(RTC_ALARM)
    91. 

  91. #define bfin_write_RTC_ALARM(val)		bfin_write32(RTC_ALARM, val)
    92. 

  92. #define bfin_read_RTC_FAST()			bfin_read16(RTC_FAST)
    93. 

  93. #define bfin_write_RTC_FAST(val)		bfin_write16(RTC_FAST, val)
    94. 

  94. #define bfin_read_RTC_PREN()			bfin_read16(RTC_PREN)
    95. 

  95. #define bfin_write_RTC_PREN(val)		bfin_write16(RTC_PREN, val)
    96. 

  96. 

  97. 

  98. /* UART0 Controller		(0xFFC00400 - 0xFFC004FF)									*/
    99. 

  99. #define bfin_read_UART0_THR()			bfin_read16(UART0_THR)
    100. 

  100. #define bfin_write_UART0_THR(val)		bfin_write16(UART0_THR, val)
    101. 

  101. #define bfin_read_UART0_RBR()			bfin_read16(UART0_RBR)
    102. 

  102. #define bfin_write_UART0_RBR(val)		bfin_write16(UART0_RBR, val)
    103. 

  103. #define bfin_read_UART0_DLL()			bfin_read16(UART0_DLL)
    104. 

  104. #define bfin_write_UART0_DLL(val)		bfin_write16(UART0_DLL, val)
    105. 

  105. #define bfin_read_UART0_IER()			bfin_read16(UART0_IER)
    106. 

  106. #define bfin_write_UART0_IER(val)		bfin_write16(UART0_IER, val)
    107. 

  107. #define bfin_read_UART0_DLH()			bfin_read16(UART0_DLH)
    108. 

  108. #define bfin_write_UART0_DLH(val)		bfin_write16(UART0_DLH, val)
    109. 

  109. #define bfin_read_UART0_IIR()			bfin_read16(UART0_IIR)
    110. 

  110. #define bfin_write_UART0_IIR(val)		bfin_write16(UART0_IIR, val)
    111. 

  111. #define bfin_read_UART0_LCR()			bfin_read16(UART0_LCR)
    112. 

  112. #define bfin_write_UART0_LCR(val)		bfin_write16(UART0_LCR, val)
    113. 

  113. #define bfin_read_UART0_MCR()			bfin_read16(UART0_MCR)
    114. 

  114. #define bfin_write_UART0_MCR(val)		bfin_write16(UART0_MCR, val)
    115. 

  115. #define bfin_read_UART0_LSR()			bfin_read16(UART0_LSR)
    116. 

  116. #define bfin_write_UART0_LSR(val)		bfin_write16(UART0_LSR, val)
    117. 

  117. #define bfin_read_UART0_MSR()			bfin_read16(UART0_MSR)
    118. 

  118. #define bfin_write_UART0_MSR(val)		bfin_write16(UART0_MSR, val)
    119. 

  119. #define bfin_read_UART0_SCR()			bfin_read16(UART0_SCR)
    120. 

  120. #define bfin_write_UART0_SCR(val)		bfin_write16(UART0_SCR, val)
    121. 

  121. #define bfin_read_UART0_GCTL()			bfin_read16(UART0_GCTL)
    122. 

  122. #define bfin_write_UART0_GCTL(val)		bfin_write16(UART0_GCTL, val)
    123. 

  123. 

  124. 

  125. /* SPI Controller		(0xFFC00500 - 0xFFC005FF)									*/
    126. 

  126. #define bfin_read_SPI_CTL()			bfin_read16(SPI_CTL)
    127. 

  127. #define bfin_write_SPI_CTL(val)			bfin_write16(SPI_CTL, val)
    128. 

  128. #define bfin_read_SPI_FLG()			bfin_read16(SPI_FLG)
    129. 

  129. #define bfin_write_SPI_FLG(val)			bfin_write16(SPI_FLG, val)
    130. 

  130. #define bfin_read_SPI_STAT()			bfin_read16(SPI_STAT)
    131. 

  131. #define bfin_write_SPI_STAT(val)		bfin_write16(SPI_STAT, val)
    132. 

  132. #define bfin_read_SPI_TDBR()			bfin_read16(SPI_TDBR)
    133. 

  133. #define bfin_write_SPI_TDBR(val)		bfin_write16(SPI_TDBR, val)
    134. 

  134. #define bfin_read_SPI_RDBR()			bfin_read16(SPI_RDBR)
    135. 

  135. #define bfin_write_SPI_RDBR(val)		bfin_write16(SPI_RDBR, val)
    136. 

  136. #define bfin_read_SPI_BAUD()			bfin_read16(SPI_BAUD)
    137. 

  137. #define bfin_write_SPI_BAUD(val)		bfin_write16(SPI_BAUD, val)
    138. 

  138. #define bfin_read_SPI_SHADOW()			bfin_read16(SPI_SHADOW)
    139. 

  139. #define bfin_write_SPI_SHADOW(val)		bfin_write16(SPI_SHADOW, val)
    140. 

  140. 

  141. 

  142. /* TIMER0-7 Registers		(0xFFC00600 - 0xFFC006FF)								*/
    143. 

  143. #define bfin_read_TIMER0_CONFIG()		bfin_read16(TIMER0_CONFIG)
    144. 

  144. #define bfin_write_TIMER0_CONFIG(val)		bfin_write16(TIMER0_CONFIG, val)
    145. 

  145. #define bfin_read_TIMER0_COUNTER()		bfin_read32(TIMER0_COUNTER)
    146. 

  146. #define bfin_write_TIMER0_COUNTER(val)		bfin_write32(TIMER0_COUNTER, val)
    147. 

  147. #define bfin_read_TIMER0_PERIOD()		bfin_read32(TIMER0_PERIOD)
    148. 

  148. #define bfin_write_TIMER0_PERIOD(val)		bfin_write32(TIMER0_PERIOD, val)
    149. 

  149. #define bfin_read_TIMER0_WIDTH()		bfin_read32(TIMER0_WIDTH)
    150. 

  150. #define bfin_write_TIMER0_WIDTH(val)		bfin_write32(TIMER0_WIDTH, val)
    151. 

  151. 

  152. #define bfin_read_TIMER1_CONFIG()		bfin_read16(TIMER1_CONFIG)
    153. 

  153. #define bfin_write_TIMER1_CONFIG(val)		bfin_write16(TIMER1_CONFIG, val)
    154. 

  154. #define bfin_read_TIMER1_COUNTER()		bfin_read32(TIMER1_COUNTER)
    155. 

  155. #define bfin_write_TIMER1_COUNTER(val)		bfin_write32(TIMER1_COUNTER, val)
    156. 

  156. #define bfin_read_TIMER1_PERIOD()		bfin_read32(TIMER1_PERIOD)
    157. 

  157. #define bfin_write_TIMER1_PERIOD(val)		bfin_write32(TIMER1_PERIOD, val)
    158. 

  158. #define bfin_read_TIMER1_WIDTH()		bfin_read32(TIMER1_WIDTH)
    159. 

  159. #define bfin_write_TIMER1_WIDTH(val)		bfin_write32(TIMER1_WIDTH, val)
    160. 

  160. 

  161. #define bfin_read_TIMER2_CONFIG()		bfin_read16(TIMER2_CONFIG)
    162. 

  162. #define bfin_write_TIMER2_CONFIG(val)		bfin_write16(TIMER2_CONFIG, val)
    163. 

  163. #define bfin_read_TIMER2_COUNTER()		bfin_read32(TIMER2_COUNTER)
    164. 

  164. #define bfin_write_TIMER2_COUNTER(val)		bfin_write32(TIMER2_COUNTER, val)
    165. 

  165. #define bfin_read_TIMER2_PERIOD()		bfin_read32(TIMER2_PERIOD)
    166. 

  166. #define bfin_write_TIMER2_PERIOD(val)		bfin_write32(TIMER2_PERIOD, val)
    167. 

  167. #define bfin_read_TIMER2_WIDTH()		bfin_read32(TIMER2_WIDTH)
    168. 

  168. #define bfin_write_TIMER2_WIDTH(val)		bfin_write32(TIMER2_WIDTH, val)
    169. 

  169. 

  170. #define bfin_read_TIMER3_CONFIG()		bfin_read16(TIMER3_CONFIG)
    171. 

  171. #define bfin_write_TIMER3_CONFIG(val)		bfin_write16(TIMER3_CONFIG, val)
    172. 

  172. #define bfin_read_TIMER3_COUNTER()		bfin_read32(TIMER3_COUNTER)
    173. 

  173. #define bfin_write_TIMER3_COUNTER(val)		bfin_write32(TIMER3_COUNTER, val)
    174. 

  174. #define bfin_read_TIMER3_PERIOD()		bfin_read32(TIMER3_PERIOD)
    175. 

  175. #define bfin_write_TIMER3_PERIOD(val)		bfin_write32(TIMER3_PERIOD, val)
    176. 

  176. #define bfin_read_TIMER3_WIDTH()		bfin_read32(TIMER3_WIDTH)
    177. 

  177. #define bfin_write_TIMER3_WIDTH(val)		bfin_write32(TIMER3_WIDTH, val)
    178. 

  178. 

  179. #define bfin_read_TIMER4_CONFIG()		bfin_read16(TIMER4_CONFIG)
    180. 

  180. #define bfin_write_TIMER4_CONFIG(val)		bfin_write16(TIMER4_CONFIG, val)
    181. 

  181. #define bfin_read_TIMER4_COUNTER()		bfin_read32(TIMER4_COUNTER)
    182. 

  182. #define bfin_write_TIMER4_COUNTER(val)		bfin_write32(TIMER4_COUNTER, val)
    183. 

  183. #define bfin_read_TIMER4_PERIOD()		bfin_read32(TIMER4_PERIOD)
    184. 

  184. #define bfin_write_TIMER4_PERIOD(val)		bfin_write32(TIMER4_PERIOD, val)
    185. 

  185. #define bfin_read_TIMER4_WIDTH()		bfin_read32(TIMER4_WIDTH)
    186. 

  186. #define bfin_write_TIMER4_WIDTH(val)		bfin_write32(TIMER4_WIDTH, val)
    187. 

  187. 

  188. #define bfin_read_TIMER5_CONFIG()		bfin_read16(TIMER5_CONFIG)
    189. 

  189. #define bfin_write_TIMER5_CONFIG(val)		bfin_write16(TIMER5_CONFIG, val)
    190. 

  190. #define bfin_read_TIMER5_COUNTER()		bfin_read32(TIMER5_COUNTER)
    191. 

  191. #define bfin_write_TIMER5_COUNTER(val)		bfin_write32(TIMER5_COUNTER, val)
    192. 

  192. #define bfin_read_TIMER5_PERIOD()		bfin_read32(TIMER5_PERIOD)
    193. 

  193. #define bfin_write_TIMER5_PERIOD(val)		bfin_write32(TIMER5_PERIOD, val)
    194. 

  194. #define bfin_read_TIMER5_WIDTH()		bfin_read32(TIMER5_WIDTH)
    195. 

  195. #define bfin_write_TIMER5_WIDTH(val)		bfin_write32(TIMER5_WIDTH, val)
    196. 

  196. 

  197. #define bfin_read_TIMER6_CONFIG()		bfin_read16(TIMER6_CONFIG)
    198. 

  198. #define bfin_write_TIMER6_CONFIG(val)		bfin_write16(TIMER6_CONFIG, val)
    199. 

  199. #define bfin_read_TIMER6_COUNTER()		bfin_read32(TIMER6_COUNTER)
    200. 

  200. #define bfin_write_TIMER6_COUNTER(val)		bfin_write32(TIMER6_COUNTER, val)
    201. 

  201. #define bfin_read_TIMER6_PERIOD()		bfin_read32(TIMER6_PERIOD)
    202. 

  202. #define bfin_write_TIMER6_PERIOD(val)		bfin_write32(TIMER6_PERIOD, val)
    203. 

  203. #define bfin_read_TIMER6_WIDTH()		bfin_read32(TIMER6_WIDTH)
    204. 

  204. #define bfin_write_TIMER6_WIDTH(val)		bfin_write32(TIMER6_WIDTH, val)
    205. 

  205. 

  206. #define bfin_read_TIMER7_CONFIG()		bfin_read16(TIMER7_CONFIG)
    207. 

  207. #define bfin_write_TIMER7_CONFIG(val)		bfin_write16(TIMER7_CONFIG, val)
    208. 

  208. #define bfin_read_TIMER7_COUNTER()		bfin_read32(TIMER7_COUNTER)
    209. 

  209. #define bfin_write_TIMER7_COUNTER(val)		bfin_write32(TIMER7_COUNTER, val)
    210. 

  210. #define bfin_read_TIMER7_PERIOD()		bfin_read32(TIMER7_PERIOD)
    211. 

  211. #define bfin_write_TIMER7_PERIOD(val)		bfin_write32(TIMER7_PERIOD, val)
    212. 

  212. #define bfin_read_TIMER7_WIDTH()		bfin_read32(TIMER7_WIDTH)
    213. 

  213. #define bfin_write_TIMER7_WIDTH(val)		bfin_write32(TIMER7_WIDTH, val)
    214. 

  214. 

  215. #define bfin_read_TIMER_ENABLE()		bfin_read16(TIMER_ENABLE)
    216. 

  216. #define bfin_write_TIMER_ENABLE(val)		bfin_write16(TIMER_ENABLE, val)
    217. 

  217. #define bfin_read_TIMER_DISABLE()		bfin_read16(TIMER_DISABLE)
    218. 

  218. #define bfin_write_TIMER_DISABLE(val)		bfin_write16(TIMER_DISABLE, val)
    219. 

  219. #define bfin_read_TIMER_STATUS()		bfin_read32(TIMER_STATUS)
    220. 

  220. #define bfin_write_TIMER_STATUS(val)		bfin_write32(TIMER_STATUS, val)
    221. 

  221. 

  222. 

  223. /* General Purpose I/O Port F (0xFFC00700 - 0xFFC007FF)								*/
    224. 

  224. #define bfin_read_PORTFIO()			bfin_read16(PORTFIO)
    225. 

  225. #define bfin_write_PORTFIO(val)			bfin_write16(PORTFIO, val)
    226. 

  226. #define bfin_read_PORTFIO_CLEAR()		bfin_read16(PORTFIO_CLEAR)
    227. 

  227. #define bfin_write_PORTFIO_CLEAR(val)		bfin_write16(PORTFIO_CLEAR, val)
    228. 

  228. #define bfin_read_PORTFIO_SET()			bfin_read16(PORTFIO_SET)
    229. 

  229. #define bfin_write_PORTFIO_SET(val)		bfin_write16(PORTFIO_SET, val)
    230. 

  230. #define bfin_read_PORTFIO_TOGGLE()		bfin_read16(PORTFIO_TOGGLE)
    231. 

  231. #define bfin_write_PORTFIO_TOGGLE(val)		bfin_write16(PORTFIO_TOGGLE, val)
    232. 

  232. #define bfin_read_PORTFIO_MASKA()		bfin_read16(PORTFIO_MASKA)
    233. 

  233. #define bfin_write_PORTFIO_MASKA(val)		bfin_write16(PORTFIO_MASKA, val)
    234. 

  234. #define bfin_read_PORTFIO_MASKA_CLEAR()		bfin_read16(PORTFIO_MASKA_CLEAR)
    235. 

  235. #define bfin_write_PORTFIO_MASKA_CLEAR(val)	bfin_write16(PORTFIO_MASKA_CLEAR, val)
    236. 

  236. #define bfin_read_PORTFIO_MASKA_SET()		bfin_read16(PORTFIO_MASKA_SET)
    237. 

  237. #define bfin_write_PORTFIO_MASKA_SET(val)	bfin_write16(PORTFIO_MASKA_SET, val)
    238. 

  238. #define bfin_read_PORTFIO_MASKA_TOGGLE()	bfin_read16(PORTFIO_MASKA_TOGGLE)
    239. 

  239. #define bfin_write_PORTFIO_MASKA_TOGGLE(val)	bfin_write16(PORTFIO_MASKA_TOGGLE, val)
    240. 

  240. #define bfin_read_PORTFIO_MASKB()		bfin_read16(PORTFIO_MASKB)
    241. 

  241. #define bfin_write_PORTFIO_MASKB(val)		bfin_write16(PORTFIO_MASKB, val)
    242. 

  242. #define bfin_read_PORTFIO_MASKB_CLEAR()		bfin_read16(PORTFIO_MASKB_CLEAR)
    243. 

  243. #define bfin_write_PORTFIO_MASKB_CLEAR(val)	bfin_write16(PORTFIO_MASKB_CLEAR, val)
    244. 

  244. #define bfin_read_PORTFIO_MASKB_SET()		bfin_read16(PORTFIO_MASKB_SET)
    245. 

  245. #define bfin_write_PORTFIO_MASKB_SET(val)	bfin_write16(PORTFIO_MASKB_SET, val)
    246. 

  246. #define bfin_read_PORTFIO_MASKB_TOGGLE()	bfin_read16(PORTFIO_MASKB_TOGGLE)
    247. 

  247. #define bfin_write_PORTFIO_MASKB_TOGGLE(val)	bfin_write16(PORTFIO_MASKB_TOGGLE, val)
    248. 

  248. #define bfin_read_PORTFIO_DIR()			bfin_read16(PORTFIO_DIR)
    249. 

  249. #define bfin_write_PORTFIO_DIR(val)		bfin_write16(PORTFIO_DIR, val)
    250. 

  250. #define bfin_read_PORTFIO_POLAR()		bfin_read16(PORTFIO_POLAR)
    251. 

  251. #define bfin_write_PORTFIO_POLAR(val)		bfin_write16(PORTFIO_POLAR, val)
    252. 

  252. #define bfin_read_PORTFIO_EDGE()		bfin_read16(PORTFIO_EDGE)
    253. 

  253. #define bfin_write_PORTFIO_EDGE(val)		bfin_write16(PORTFIO_EDGE, val)
    254. 

  254. #define bfin_read_PORTFIO_BOTH()		bfin_read16(PORTFIO_BOTH)
    255. 

  255. #define bfin_write_PORTFIO_BOTH(val)		bfin_write16(PORTFIO_BOTH, val)
    256. 

  256. #define bfin_read_PORTFIO_INEN()		bfin_read16(PORTFIO_INEN)
    257. 

  257. #define bfin_write_PORTFIO_INEN(val)		bfin_write16(PORTFIO_INEN, val)
    258. 

  258. 

  259. 

  260. /* SPORT0 Controller		(0xFFC00800 - 0xFFC008FF)								*/
    261. 

  261. #define bfin_read_SPORT0_TCR1()			bfin_read16(SPORT0_TCR1)
    262. 

  262. #define bfin_write_SPORT0_TCR1(val)		bfin_write16(SPORT0_TCR1, val)
    263. 

  263. #define bfin_read_SPORT0_TCR2()			bfin_read16(SPORT0_TCR2)
    264. 

  264. #define bfin_write_SPORT0_TCR2(val)		bfin_write16(SPORT0_TCR2, val)
    265. 

  265. #define bfin_read_SPORT0_TCLKDIV()		bfin_read16(SPORT0_TCLKDIV)
    266. 

  266. #define bfin_write_SPORT0_TCLKDIV(val)		bfin_write16(SPORT0_TCLKDIV, val)
    267. 

  267. #define bfin_read_SPORT0_TFSDIV()		bfin_read16(SPORT0_TFSDIV)
    268. 

  268. #define bfin_write_SPORT0_TFSDIV(val)		bfin_write16(SPORT0_TFSDIV, val)
    269. 

  269. #define bfin_read_SPORT0_TX()			bfin_read32(SPORT0_TX)
    270. 

  270. #define bfin_write_SPORT0_TX(val)		bfin_write32(SPORT0_TX, val)
    271. 

  271. #define bfin_read_SPORT0_RX()			bfin_read32(SPORT0_RX)
    272. 

  272. #define bfin_write_SPORT0_RX(val)		bfin_write32(SPORT0_RX, val)
    273. 

  273. #define bfin_read_SPORT0_TX32()			bfin_read32(SPORT0_TX)
    274. 

  274. #define bfin_write_SPORT0_TX32(val)		bfin_write32(SPORT0_TX, val)
    275. 

  275. #define bfin_read_SPORT0_RX32()			bfin_read32(SPORT0_RX)
    276. 

  276. #define bfin_write_SPORT0_RX32(val)		bfin_write32(SPORT0_RX, val)
    277. 

  277. #define bfin_read_SPORT0_TX16()			bfin_read16(SPORT0_TX)
    278. 

  278. #define bfin_write_SPORT0_TX16(val)		bfin_write16(SPORT0_TX, val)
    279. 

  279. #define bfin_read_SPORT0_RX16()			bfin_read16(SPORT0_RX)
    280. 

  280. #define bfin_write_SPORT0_RX16(val)		bfin_write16(SPORT0_RX, val)
    281. 

  281. #define bfin_read_SPORT0_RCR1()			bfin_read16(SPORT0_RCR1)
    282. 

  282. #define bfin_write_SPORT0_RCR1(val)		bfin_write16(SPORT0_RCR1, val)
    283. 

  283. #define bfin_read_SPORT0_RCR2()			bfin_read16(SPORT0_RCR2)
    284. 

  284. #define bfin_write_SPORT0_RCR2(val)		bfin_write16(SPORT0_RCR2, val)
    285. 

  285. #define bfin_read_SPORT0_RCLKDIV()		bfin_read16(SPORT0_RCLKDIV)
    286. 

  286. #define bfin_write_SPORT0_RCLKDIV(val)		bfin_write16(SPORT0_RCLKDIV, val)
    287. 

  287. #define bfin_read_SPORT0_RFSDIV()		bfin_read16(SPORT0_RFSDIV)
    288. 

  288. #define bfin_write_SPORT0_RFSDIV(val)		bfin_write16(SPORT0_RFSDIV, val)
    289. 

  289. #define bfin_read_SPORT0_STAT()			bfin_read16(SPORT0_STAT)
    290. 

  290. #define bfin_write_SPORT0_STAT(val)		bfin_write16(SPORT0_STAT, val)
    291. 

  291. #define bfin_read_SPORT0_CHNL()			bfin_read16(SPORT0_CHNL)
    292. 

  292. #define bfin_write_SPORT0_CHNL(val)		bfin_write16(SPORT0_CHNL, val)
    293. 

  293. #define bfin_read_SPORT0_MCMC1()		bfin_read16(SPORT0_MCMC1)
    294. 

  294. #define bfin_write_SPORT0_MCMC1(val)		bfin_write16(SPORT0_MCMC1, val)
    295. 

  295. #define bfin_read_SPORT0_MCMC2()		bfin_read16(SPORT0_MCMC2)
    296. 

  296. #define bfin_write_SPORT0_MCMC2(val)		bfin_write16(SPORT0_MCMC2, val)
    297. 

  297. #define bfin_read_SPORT0_MTCS0()		bfin_read32(SPORT0_MTCS0)
    298. 

  298. #define bfin_write_SPORT0_MTCS0(val)		bfin_write32(SPORT0_MTCS0, val)
    299. 

  299. #define bfin_read_SPORT0_MTCS1()		bfin_read32(SPORT0_MTCS1)
    300. 

  300. #define bfin_write_SPORT0_MTCS1(val)		bfin_write32(SPORT0_MTCS1, val)
    301. 

  301. #define bfin_read_SPORT0_MTCS2()		bfin_read32(SPORT0_MTCS2)
    302. 

  302. #define bfin_write_SPORT0_MTCS2(val)		bfin_write32(SPORT0_MTCS2, val)
    303. 

  303. #define bfin_read_SPORT0_MTCS3()		bfin_read32(SPORT0_MTCS3)
    304. 

  304. #define bfin_write_SPORT0_MTCS3(val)		bfin_write32(SPORT0_MTCS3, val)
    305. 

  305. #define bfin_read_SPORT0_MRCS0()		bfin_read32(SPORT0_MRCS0)
    306. 

  306. #define bfin_write_SPORT0_MRCS0(val)		bfin_write32(SPORT0_MRCS0, val)
    307. 

  307. #define bfin_read_SPORT0_MRCS1()		bfin_read32(SPORT0_MRCS1)
    308. 

  308. #define bfin_write_SPORT0_MRCS1(val)		bfin_write32(SPORT0_MRCS1, val)
    309. 

  309. #define bfin_read_SPORT0_MRCS2()		bfin_read32(SPORT0_MRCS2)
    310. 

  310. #define bfin_write_SPORT0_MRCS2(val)		bfin_write32(SPORT0_MRCS2, val)
    311. 

  311. #define bfin_read_SPORT0_MRCS3()		bfin_read32(SPORT0_MRCS3)
    312. 

  312. #define bfin_write_SPORT0_MRCS3(val)		bfin_write32(SPORT0_MRCS3, val)
    313. 

  313. 

  314. 

  315. /* SPORT1 Controller		(0xFFC00900 - 0xFFC009FF)								*/
    316. 

  316. #define bfin_read_SPORT1_TCR1()			bfin_read16(SPORT1_TCR1)
    317. 

  317. #define bfin_write_SPORT1_TCR1(val)		bfin_write16(SPORT1_TCR1, val)
    318. 

  318. #define bfin_read_SPORT1_TCR2()			bfin_read16(SPORT1_TCR2)
    319. 

  319. #define bfin_write_SPORT1_TCR2(val)		bfin_write16(SPORT1_TCR2, val)
    320. 

  320. #define bfin_read_SPORT1_TCLKDIV()		bfin_read16(SPORT1_TCLKDIV)
    321. 

  321. #define bfin_write_SPORT1_TCLKDIV(val)		bfin_write16(SPORT1_TCLKDIV, val)
    322. 

  322. #define bfin_read_SPORT1_TFSDIV()		bfin_read16(SPORT1_TFSDIV)
    323. 

  323. #define bfin_write_SPORT1_TFSDIV(val)		bfin_write16(SPORT1_TFSDIV, val)
    324. 

  324. #define bfin_read_SPORT1_TX()			bfin_read32(SPORT1_TX)
    325. 

  325. #define bfin_write_SPORT1_TX(val)		bfin_write32(SPORT1_TX, val)
    326. 

  326. #define bfin_read_SPORT1_RX()			bfin_read32(SPORT1_RX)
    327. 

  327. #define bfin_write_SPORT1_RX(val)		bfin_write32(SPORT1_RX, val)
    328. 

  328. #define bfin_read_SPORT1_TX32()			bfin_read32(SPORT1_TX)
    329. 

  329. #define bfin_write_SPORT1_TX32(val)		bfin_write32(SPORT1_TX, val)
    330. 

  330. #define bfin_read_SPORT1_RX32()			bfin_read32(SPORT1_RX)
    331. 

  331. #define bfin_write_SPORT1_RX32(val)		bfin_write32(SPORT1_RX, val)
    332. 

  332. #define bfin_read_SPORT1_TX16()			bfin_read16(SPORT1_TX)
    333. 

  333. #define bfin_write_SPORT1_TX16(val)		bfin_write16(SPORT1_TX, val)
    334. 

  334. #define bfin_read_SPORT1_RX16()			bfin_read16(SPORT1_RX)
    335. 

  335. #define bfin_write_SPORT1_RX16(val)		bfin_write16(SPORT1_RX, val)
    336. 

  336. #define bfin_read_SPORT1_RCR1()			bfin_read16(SPORT1_RCR1)
    337. 

  337. #define bfin_write_SPORT1_RCR1(val)		bfin_write16(SPORT1_RCR1, val)
    338. 

  338. #define bfin_read_SPORT1_RCR2()			bfin_read16(SPORT1_RCR2)
    339. 

  339. #define bfin_write_SPORT1_RCR2(val)		bfin_write16(SPORT1_RCR2, val)
    340. 

  340. #define bfin_read_SPORT1_RCLKDIV()		bfin_read16(SPORT1_RCLKDIV)
    341. 

  341. #define bfin_write_SPORT1_RCLKDIV(val)		bfin_write16(SPORT1_RCLKDIV, val)
    342. 

  342. #define bfin_read_SPORT1_RFSDIV()		bfin_read16(SPORT1_RFSDIV)
    343. 

  343. #define bfin_write_SPORT1_RFSDIV(val)		bfin_write16(SPORT1_RFSDIV, val)
    344. 

  344. #define bfin_read_SPORT1_STAT()			bfin_read16(SPORT1_STAT)
    345. 

  345. #define bfin_write_SPORT1_STAT(val)		bfin_write16(SPORT1_STAT, val)
    346. 

  346. #define bfin_read_SPORT1_CHNL()			bfin_read16(SPORT1_CHNL)
    347. 

  347. #define bfin_write_SPORT1_CHNL(val)		bfin_write16(SPORT1_CHNL, val)
    348. 

  348. #define bfin_read_SPORT1_MCMC1()		bfin_read16(SPORT1_MCMC1)
    349. 

  349. #define bfin_write_SPORT1_MCMC1(val)		bfin_write16(SPORT1_MCMC1, val)
    350. 

  350. #define bfin_read_SPORT1_MCMC2()		bfin_read16(SPORT1_MCMC2)
    351. 

  351. #define bfin_write_SPORT1_MCMC2(val)		bfin_write16(SPORT1_MCMC2, val)
    352. 

  352. #define bfin_read_SPORT1_MTCS0()		bfin_read32(SPORT1_MTCS0)
    353. 

  353. #define bfin_write_SPORT1_MTCS0(val)		bfin_write32(SPORT1_MTCS0, val)
    354. 

  354. #define bfin_read_SPORT1_MTCS1()		bfin_read32(SPORT1_MTCS1)
    355. 

  355. #define bfin_write_SPORT1_MTCS1(val)		bfin_write32(SPORT1_MTCS1, val)
    356. 

  356. #define bfin_read_SPORT1_MTCS2()		bfin_read32(SPORT1_MTCS2)
    357. 

  357. #define bfin_write_SPORT1_MTCS2(val)		bfin_write32(SPORT1_MTCS2, val)
    358. 

  358. #define bfin_read_SPORT1_MTCS3()		bfin_read32(SPORT1_MTCS3)
    359. 

  359. #define bfin_write_SPORT1_MTCS3(val)		bfin_write32(SPORT1_MTCS3, val)
    360. 

  360. #define bfin_read_SPORT1_MRCS0()		bfin_read32(SPORT1_MRCS0)
    361. 

  361. #define bfin_write_SPORT1_MRCS0(val)		bfin_write32(SPORT1_MRCS0, val)
    362. 

  362. #define bfin_read_SPORT1_MRCS1()		bfin_read32(SPORT1_MRCS1)
    363. 

  363. #define bfin_write_SPORT1_MRCS1(val)		bfin_write32(SPORT1_MRCS1, val)
    364. 

  364. #define bfin_read_SPORT1_MRCS2()		bfin_read32(SPORT1_MRCS2)
    365. 

  365. #define bfin_write_SPORT1_MRCS2(val)		bfin_write32(SPORT1_MRCS2, val)
    366. 

  366. #define bfin_read_SPORT1_MRCS3()		bfin_read32(SPORT1_MRCS3)
    367. 

  367. #define bfin_write_SPORT1_MRCS3(val)		bfin_write32(SPORT1_MRCS3, val)
    368. 

  368. 

  369. 

  370. /* External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF)							*/
    371. 

  371. #define bfin_read_EBIU_AMGCTL()			bfin_read16(EBIU_AMGCTL)
    372. 

  372. #define bfin_write_EBIU_AMGCTL(val)		bfin_write16(EBIU_AMGCTL, val)
    373. 

  373. #define bfin_read_EBIU_AMBCTL0()		bfin_read32(EBIU_AMBCTL0)
    374. 

  374. #define bfin_write_EBIU_AMBCTL0(val)		bfin_write32(EBIU_AMBCTL0, val)
    375. 

  375. #define bfin_read_EBIU_AMBCTL1()		bfin_read32(EBIU_AMBCTL1)
    376. 

  376. #define bfin_write_EBIU_AMBCTL1(val)		bfin_write32(EBIU_AMBCTL1, val)
    377. 

  377. #define bfin_read_EBIU_SDGCTL()			bfin_read32(EBIU_SDGCTL)
    378. 

  378. #define bfin_write_EBIU_SDGCTL(val)		bfin_write32(EBIU_SDGCTL, val)
    379. 

  379. #define bfin_read_EBIU_SDBCTL()			bfin_read16(EBIU_SDBCTL)
    380. 

  380. #define bfin_write_EBIU_SDBCTL(val)		bfin_write16(EBIU_SDBCTL, val)
    381. 

  381. #define bfin_read_EBIU_SDRRC()			bfin_read16(EBIU_SDRRC)
    382. 

  382. #define bfin_write_EBIU_SDRRC(val)		bfin_write16(EBIU_SDRRC, val)
    383. 

  383. #define bfin_read_EBIU_SDSTAT()			bfin_read16(EBIU_SDSTAT)
    384. 

  384. #define bfin_write_EBIU_SDSTAT(val)		bfin_write16(EBIU_SDSTAT, val)
    385. 

  385. 

  386. 

  387. /* DMA Traffic Control Registers													*/
    388. 

  388. #define bfin_read_DMAC_TC_PER()			bfin_read16(DMAC_TC_PER)
    389. 

  389. #define bfin_write_DMAC_TC_PER(val)		bfin_write16(DMAC_TC_PER, val)
    390. 

  390. #define bfin_read_DMAC_TC_CNT()			bfin_read16(DMAC_TC_CNT)
    391. 

  391. #define bfin_write_DMAC_TC_CNT(val)		bfin_write16(DMAC_TC_CNT, val)
    392. 

  392. 

  393. /* DMA Controller																	*/
    394. 

  394. #define bfin_read_DMA0_CONFIG()			bfin_read16(DMA0_CONFIG)
    395. 

  395. #define bfin_write_DMA0_CONFIG(val)		bfin_write16(DMA0_CONFIG, val)
    396. 

  396. #define bfin_read_DMA0_NEXT_DESC_PTR()		bfin_read32(DMA0_NEXT_DESC_PTR)
    397. 

  397. #define bfin_write_DMA0_NEXT_DESC_PTR(val)	bfin_write32(DMA0_NEXT_DESC_PTR, val)
    398. 

  398. #define bfin_read_DMA0_START_ADDR()		bfin_read32(DMA0_START_ADDR)
    399. 

  399. #define bfin_write_DMA0_START_ADDR(val)		bfin_write32(DMA0_START_ADDR, val)
    400. 

  400. #define bfin_read_DMA0_X_COUNT()		bfin_read16(DMA0_X_COUNT)
    401. 

  401. #define bfin_write_DMA0_X_COUNT(val)		bfin_write16(DMA0_X_COUNT, val)
    402. 

  402. #define bfin_read_DMA0_Y_COUNT()		bfin_read16(DMA0_Y_COUNT)
    403. 

  403. #define bfin_write_DMA0_Y_COUNT(val)		bfin_write16(DMA0_Y_COUNT, val)
    404. 

  404. #define bfin_read_DMA0_X_MODIFY()		bfin_read16(DMA0_X_MODIFY)
    405. 

  405. #define bfin_write_DMA0_X_MODIFY(val)		bfin_write16(DMA0_X_MODIFY, val)
    406. 

  406. #define bfin_read_DMA0_Y_MODIFY()		bfin_read16(DMA0_Y_MODIFY)
    407. 

  407. #define bfin_write_DMA0_Y_MODIFY(val)		bfin_write16(DMA0_Y_MODIFY, val)
    408. 

  408. #define bfin_read_DMA0_CURR_DESC_PTR()		bfin_read32(DMA0_CURR_DESC_PTR)
    409. 

  409. #define bfin_write_DMA0_CURR_DESC_PTR(val)	bfin_write32(DMA0_CURR_DESC_PTR, val)
    410. 

  410. #define bfin_read_DMA0_CURR_ADDR()		bfin_read32(DMA0_CURR_ADDR)
    411. 

  411. #define bfin_write_DMA0_CURR_ADDR(val)		bfin_write32(DMA0_CURR_ADDR, val)
    412. 

  412. #define bfin_read_DMA0_CURR_X_COUNT()		bfin_read16(DMA0_CURR_X_COUNT)
    413. 

  413. #define bfin_write_DMA0_CURR_X_COUNT(val)	bfin_write16(DMA0_CURR_X_COUNT, val)
    414. 

  414. #define bfin_read_DMA0_CURR_Y_COUNT()		bfin_read16(DMA0_CURR_Y_COUNT)
    415. 

  415. #define bfin_write_DMA0_CURR_Y_COUNT(val)	bfin_write16(DMA0_CURR_Y_COUNT, val)
    416. 

  416. #define bfin_read_DMA0_IRQ_STATUS()		bfin_read16(DMA0_IRQ_STATUS)
    417. 

  417. #define bfin_write_DMA0_IRQ_STATUS(val)		bfin_write16(DMA0_IRQ_STATUS, val)
    418. 

  418. #define bfin_read_DMA0_PERIPHERAL_MAP()		bfin_read16(DMA0_PERIPHERAL_MAP)
    419. 

  419. #define bfin_write_DMA0_PERIPHERAL_MAP(val)	bfin_write16(DMA0_PERIPHERAL_MAP, val)
    420. 

  420. 

  421. #define bfin_read_DMA1_CONFIG()			bfin_read16(DMA1_CONFIG)
    422. 

  422. #define bfin_write_DMA1_CONFIG(val)		bfin_write16(DMA1_CONFIG, val)
    423. 

  423. #define bfin_read_DMA1_NEXT_DESC_PTR()		bfin_read32(DMA1_NEXT_DESC_PTR)
    424. 

  424. #define bfin_write_DMA1_NEXT_DESC_PTR(val)	bfin_write32(DMA1_NEXT_DESC_PTR, val)
    425. 

  425. #define bfin_read_DMA1_START_ADDR()		bfin_read32(DMA1_START_ADDR)
    426. 

  426. #define bfin_write_DMA1_START_ADDR(val)		bfin_write32(DMA1_START_ADDR, val)
    427. 

  427. #define bfin_read_DMA1_X_COUNT()		bfin_read16(DMA1_X_COUNT)
    428. 

  428. #define bfin_write_DMA1_X_COUNT(val)		bfin_write16(DMA1_X_COUNT, val)
    429. 

  429. #define bfin_read_DMA1_Y_COUNT()		bfin_read16(DMA1_Y_COUNT)
    430. 

  430. #define bfin_write_DMA1_Y_COUNT(val)		bfin_write16(DMA1_Y_COUNT, val)
    431. 

  431. #define bfin_read_DMA1_X_MODIFY()		bfin_read16(DMA1_X_MODIFY)
    432. 

  432. #define bfin_write_DMA1_X_MODIFY(val)		bfin_write16(DMA1_X_MODIFY, val)
    433. 

  433. #define bfin_read_DMA1_Y_MODIFY()		bfin_read16(DMA1_Y_MODIFY)
    434. 

  434. #define bfin_write_DMA1_Y_MODIFY(val)		bfin_write16(DMA1_Y_MODIFY, val)
    435. 

  435. #define bfin_read_DMA1_CURR_DESC_PTR()		bfin_read32(DMA1_CURR_DESC_PTR)
    436. 

  436. #define bfin_write_DMA1_CURR_DESC_PTR(val)	bfin_write32(DMA1_CURR_DESC_PTR, val)
    437. 

  437. #define bfin_read_DMA1_CURR_ADDR()		bfin_read32(DMA1_CURR_ADDR)
    438. 

  438. #define bfin_write_DMA1_CURR_ADDR(val)		bfin_write32(DMA1_CURR_ADDR, val)
    439. 

  439. #define bfin_read_DMA1_CURR_X_COUNT()		bfin_read16(DMA1_CURR_X_COUNT)
    440. 

  440. #define bfin_write_DMA1_CURR_X_COUNT(val)	bfin_write16(DMA1_CURR_X_COUNT, val)
    441. 

  441. #define bfin_read_DMA1_CURR_Y_COUNT()		bfin_read16(DMA1_CURR_Y_COUNT)
    442. 

  442. #define bfin_write_DMA1_CURR_Y_COUNT(val)	bfin_write16(DMA1_CURR_Y_COUNT, val)
    443. 

  443. #define bfin_read_DMA1_IRQ_STATUS()		bfin_read16(DMA1_IRQ_STATUS)
    444. 

  444. #define bfin_write_DMA1_IRQ_STATUS(val)		bfin_write16(DMA1_IRQ_STATUS, val)
    445. 

  445. #define bfin_read_DMA1_PERIPHERAL_MAP()		bfin_read16(DMA1_PERIPHERAL_MAP)
    446. 

  446. #define bfin_write_DMA1_PERIPHERAL_MAP(val)	bfin_write16(DMA1_PERIPHERAL_MAP, val)
    447. 

  447. 

  448. #define bfin_read_DMA2_CONFIG()			bfin_read16(DMA2_CONFIG)
    449. 

  449. #define bfin_write_DMA2_CONFIG(val)		bfin_write16(DMA2_CONFIG, val)
    450. 

  450. #define bfin_read_DMA2_NEXT_DESC_PTR()		bfin_read32(DMA2_NEXT_DESC_PTR)
    451. 

  451. #define bfin_write_DMA2_NEXT_DESC_PTR(val)	bfin_write32(DMA2_NEXT_DESC_PTR, val)
    452. 

  452. #define bfin_read_DMA2_START_ADDR()		bfin_read32(DMA2_START_ADDR)
    453. 

  453. #define bfin_write_DMA2_START_ADDR(val)		bfin_write32(DMA2_START_ADDR, val)
    454. 

  454. #define bfin_read_DMA2_X_COUNT()		bfin_read16(DMA2_X_COUNT)
    455. 

  455. #define bfin_write_DMA2_X_COUNT(val)		bfin_write16(DMA2_X_COUNT, val)
    456. 

  456. #define bfin_read_DMA2_Y_COUNT()		bfin_read16(DMA2_Y_COUNT)
    457. 

  457. #define bfin_write_DMA2_Y_COUNT(val)		bfin_write16(DMA2_Y_COUNT, val)
    458. 

  458. #define bfin_read_DMA2_X_MODIFY()		bfin_read16(DMA2_X_MODIFY)
    459. 

  459. #define bfin_write_DMA2_X_MODIFY(val)		bfin_write16(DMA2_X_MODIFY, val)
    460. 

  460. #define bfin_read_DMA2_Y_MODIFY()		bfin_read16(DMA2_Y_MODIFY)
    461. 

  461. #define bfin_write_DMA2_Y_MODIFY(val)		bfin_write16(DMA2_Y_MODIFY, val)
    462. 

  462. #define bfin_read_DMA2_CURR_DESC_PTR()		bfin_read32(DMA2_CURR_DESC_PTR)
    463. 

  463. #define bfin_write_DMA2_CURR_DESC_PTR(val)	bfin_write32(DMA2_CURR_DESC_PTR, val)
    464. 

  464. #define bfin_read_DMA2_CURR_ADDR()		bfin_read32(DMA2_CURR_ADDR)
    465. 

  465. #define bfin_write_DMA2_CURR_ADDR(val)		bfin_write32(DMA2_CURR_ADDR, val)
    466. 

  466. #define bfin_read_DMA2_CURR_X_COUNT()		bfin_read16(DMA2_CURR_X_COUNT)
    467. 

  467. #define bfin_write_DMA2_CURR_X_COUNT(val)	bfin_write16(DMA2_CURR_X_COUNT, val)
    468. 

  468. #define bfin_read_DMA2_CURR_Y_COUNT()		bfin_read16(DMA2_CURR_Y_COUNT)
    469. 

  469. #define bfin_write_DMA2_CURR_Y_COUNT(val)	bfin_write16(DMA2_CURR_Y_COUNT, val)
    470. 

  470. #define bfin_read_DMA2_IRQ_STATUS()		bfin_read16(DMA2_IRQ_STATUS)
    471. 

  471. #define bfin_write_DMA2_IRQ_STATUS(val)		bfin_write16(DMA2_IRQ_STATUS, val)
    472. 

  472. #define bfin_read_DMA2_PERIPHERAL_MAP()		bfin_read16(DMA2_PERIPHERAL_MAP)
    473. 

  473. #define bfin_write_DMA2_PERIPHERAL_MAP(val)	bfin_write16(DMA2_PERIPHERAL_MAP, val)
    474. 

  474. 

  475. #define bfin_read_DMA3_CONFIG()			bfin_read16(DMA3_CONFIG)
    476. 

  476. #define bfin_write_DMA3_CONFIG(val)		bfin_write16(DMA3_CONFIG, val)
    477. 

  477. #define bfin_read_DMA3_NEXT_DESC_PTR()		bfin_read32(DMA3_NEXT_DESC_PTR)
    478. 

  478. #define bfin_write_DMA3_NEXT_DESC_PTR(val)	bfin_write32(DMA3_NEXT_DESC_PTR, val)
    479. 

  479. #define bfin_read_DMA3_START_ADDR()		bfin_read32(DMA3_START_ADDR)
    480. 

  480. #define bfin_write_DMA3_START_ADDR(val)		bfin_write32(DMA3_START_ADDR, val)
    481. 

  481. #define bfin_read_DMA3_X_COUNT()		bfin_read16(DMA3_X_COUNT)
    482. 

  482. #define bfin_write_DMA3_X_COUNT(val)		bfin_write16(DMA3_X_COUNT, val)
    483. 

  483. #define bfin_read_DMA3_Y_COUNT()		bfin_read16(DMA3_Y_COUNT)
    484. 

  484. #define bfin_write_DMA3_Y_COUNT(val)		bfin_write16(DMA3_Y_COUNT, val)
    485. 

  485. #define bfin_read_DMA3_X_MODIFY()		bfin_read16(DMA3_X_MODIFY)
    486. 

  486. #define bfin_write_DMA3_X_MODIFY(val)		bfin_write16(DMA3_X_MODIFY, val)
    487. 

  487. #define bfin_read_DMA3_Y_MODIFY()		bfin_read16(DMA3_Y_MODIFY)
    488. 

  488. #define bfin_write_DMA3_Y_MODIFY(val)		bfin_write16(DMA3_Y_MODIFY, val)
    489. 

  489. #define bfin_read_DMA3_CURR_DESC_PTR()		bfin_read32(DMA3_CURR_DESC_PTR)
    490. 

  490. #define bfin_write_DMA3_CURR_DESC_PTR(val)	bfin_write32(DMA3_CURR_DESC_PTR, val)
    491. 

  491. #define bfin_read_DMA3_CURR_ADDR()		bfin_read32(DMA3_CURR_ADDR)
    492. 

  492. #define bfin_write_DMA3_CURR_ADDR(val)		bfin_write32(DMA3_CURR_ADDR, val)
    493. 

  493. #define bfin_read_DMA3_CURR_X_COUNT()		bfin_read16(DMA3_CURR_X_COUNT)
    494. 

  494. #define bfin_write_DMA3_CURR_X_COUNT(val)	bfin_write16(DMA3_CURR_X_COUNT, val)
    495. 

  495. #define bfin_read_DMA3_CURR_Y_COUNT()		bfin_read16(DMA3_CURR_Y_COUNT)
    496. 

  496. #define bfin_write_DMA3_CURR_Y_COUNT(val)	bfin_write16(DMA3_CURR_Y_COUNT, val)
    497. 

  497. #define bfin_read_DMA3_IRQ_STATUS()		bfin_read16(DMA3_IRQ_STATUS)
    498. 

  498. #define bfin_write_DMA3_IRQ_STATUS(val)		bfin_write16(DMA3_IRQ_STATUS, val)
    499. 

  499. #define bfin_read_DMA3_PERIPHERAL_MAP()		bfin_read16(DMA3_PERIPHERAL_MAP)
    500. 

  500. #define bfin_write_DMA3_PERIPHERAL_MAP(val)	bfin_write16(DMA3_PERIPHERAL_MAP, val)
    501. 

  501. 

  502. #define bfin_read_DMA4_CONFIG()			bfin_read16(DMA4_CONFIG)
    503. 

  503. #define bfin_write_DMA4_CONFIG(val)		bfin_write16(DMA4_CONFIG, val)
    504. 

  504. #define bfin_read_DMA4_NEXT_DESC_PTR()		bfin_read32(DMA4_NEXT_DESC_PTR)
    505. 

  505. #define bfin_write_DMA4_NEXT_DESC_PTR(val)	bfin_write32(DMA4_NEXT_DESC_PTR, val)
    506. 

  506. #define bfin_read_DMA4_START_ADDR()		bfin_read32(DMA4_START_ADDR)
    507. 

  507. #define bfin_write_DMA4_START_ADDR(val)		bfin_write32(DMA4_START_ADDR, val)
    508. 

  508. #define bfin_read_DMA4_X_COUNT()		bfin_read16(DMA4_X_COUNT)
    509. 

  509. #define bfin_write_DMA4_X_COUNT(val)		bfin_write16(DMA4_X_COUNT, val)
    510. 

  510. #define bfin_read_DMA4_Y_COUNT()		bfin_read16(DMA4_Y_COUNT)
    511. 

  511. #define bfin_write_DMA4_Y_COUNT(val)		bfin_write16(DMA4_Y_COUNT, val)
    512. 

  512. #define bfin_read_DMA4_X_MODIFY()		bfin_read16(DMA4_X_MODIFY)
    513. 

  513. #define bfin_write_DMA4_X_MODIFY(val)		bfin_write16(DMA4_X_MODIFY, val)
    514. 

  514. #define bfin_read_DMA4_Y_MODIFY()		bfin_read16(DMA4_Y_MODIFY)
    515. 

  515. #define bfin_write_DMA4_Y_MODIFY(val)		bfin_write16(DMA4_Y_MODIFY, val)
    516. 

  516. #define bfin_read_DMA4_CURR_DESC_PTR()		bfin_read32(DMA4_CURR_DESC_PTR)
    517. 

  517. #define bfin_write_DMA4_CURR_DESC_PTR(val)	bfin_write32(DMA4_CURR_DESC_PTR, val)
    518. 

  518. #define bfin_read_DMA4_CURR_ADDR()		bfin_read32(DMA4_CURR_ADDR)
    519. 

  519. #define bfin_write_DMA4_CURR_ADDR(val)		bfin_write32(DMA4_CURR_ADDR, val)
    520. 

  520. #define bfin_read_DMA4_CURR_X_COUNT()		bfin_read16(DMA4_CURR_X_COUNT)
    521. 

  521. #define bfin_write_DMA4_CURR_X_COUNT(val)	bfin_write16(DMA4_CURR_X_COUNT, val)
    522. 

  522. #define bfin_read_DMA4_CURR_Y_COUNT()		bfin_read16(DMA4_CURR_Y_COUNT)
    523. 

  523. #define bfin_write_DMA4_CURR_Y_COUNT(val)	bfin_write16(DMA4_CURR_Y_COUNT, val)
    524. 

  524. #define bfin_read_DMA4_IRQ_STATUS()		bfin_read16(DMA4_IRQ_STATUS)
    525. 

  525. #define bfin_write_DMA4_IRQ_STATUS(val)		bfin_write16(DMA4_IRQ_STATUS, val)
    526. 

  526. #define bfin_read_DMA4_PERIPHERAL_MAP()		bfin_read16(DMA4_PERIPHERAL_MAP)
    527. 

  527. #define bfin_write_DMA4_PERIPHERAL_MAP(val)	bfin_write16(DMA4_PERIPHERAL_MAP, val)
    528. 

  528. 

  529. #define bfin_read_DMA5_CONFIG()			bfin_read16(DMA5_CONFIG)
    530. 

  530. #define bfin_write_DMA5_CONFIG(val)		bfin_write16(DMA5_CONFIG, val)
    531. 

  531. #define bfin_read_DMA5_NEXT_DESC_PTR()		bfin_read32(DMA5_NEXT_DESC_PTR)
    532. 

  532. #define bfin_write_DMA5_NEXT_DESC_PTR(val)	bfin_write32(DMA5_NEXT_DESC_PTR, val)
    533. 

  533. #define bfin_read_DMA5_START_ADDR()		bfin_read32(DMA5_START_ADDR)
    534.