memoryOperation.c 18 KB

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  1. /* linux/arch/arm/plat-s3c24xx/dma.c
  2. *
  3. * Copyright 2003-2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 DMA core
  7. *
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #ifdef CONFIG_S3C2410_DMA_DEBUG
  15. #define DEBUG
  16. #endif
  17. #include <linux/module.h>
  18. #include <linux/init.h>
  19. #include <linux/sched.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/syscore_ops.h>
  23. #include <linux/slab.h>
  24. #include <linux/errno.h>
  25. #include <linux/io.h>
  26. #include <asm/irq.h>
  27. #include <mach/hardware.h>
  28. #include <mach/dma.h>
  29. #include <mach/map.h>
  30. #include <plat/dma-s3c24xx.h>
  31. #include <plat/regs-dma.h>
  32. /* io map for dma */
  33. static void __iomem *dma_base;
  34. static struct kmem_cache *dma_kmem;
  35. static int dma_channels;
  36. static struct s3c24xx_dma_selection dma_sel;
  37. /* debugging functions */
  38. #define BUF_MAGIC (0xcafebabe)
  39. #define dmawarn(fmt...) printk(KERN_DEBUG fmt)
  40. #define dma_regaddr(chan, reg) ((chan)->regs + (reg))
  41. #if 1
  42. #define dma_wrreg(chan, reg, val) writel((val), (chan)->regs + (reg))
  43. #else
  44. static inline void
  45. dma_wrreg(struct s3c2410_dma_chan *chan, int reg, unsigned long val)
  46. {
  47. pr_debug("writing %08x to register %08x\n",(unsigned int)val,reg);
  48. writel(val, dma_regaddr(chan, reg));
  49. }
  50. #endif
  51. #define dma_rdreg(chan, reg) readl((chan)->regs + (reg))
  52. /* captured register state for debug */
  53. struct s3c2410_dma_regstate {
  54. unsigned long dcsrc;
  55. unsigned long disrc;
  56. unsigned long dstat;
  57. unsigned long dcon;
  58. unsigned long dmsktrig;
  59. };
  60. #ifdef CONFIG_S3C2410_DMA_DEBUG
  61. /* dmadbg_showregs
  62. *
  63. * simple debug routine to print the current state of the dma registers
  64. */
  65. static void
  66. dmadbg_capture(struct s3c2410_dma_chan *chan, struct s3c2410_dma_regstate *regs)
  67. {
  68. regs->dcsrc = dma_rdreg(chan, S3C2410_DMA_DCSRC);
  69. regs->disrc = dma_rdreg(chan, S3C2410_DMA_DISRC);
  70. regs->dstat = dma_rdreg(chan, S3C2410_DMA_DSTAT);
  71. regs->dcon = dma_rdreg(chan, S3C2410_DMA_DCON);
  72. regs->dmsktrig = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG);
  73. }
  74. static void
  75. dmadbg_dumpregs(const char *fname, int line, struct s3c2410_dma_chan *chan,
  76. struct s3c2410_dma_regstate *regs)
  77. {
  78. printk(KERN_DEBUG "dma%d: %s:%d: DCSRC=%08lx, DISRC=%08lx, DSTAT=%08lx DMT=%02lx, DCON=%08lx\n",
  79. chan->number, fname, line,
  80. regs->dcsrc, regs->disrc, regs->dstat, regs->dmsktrig,
  81. regs->dcon);
  82. }
  83. static void
  84. dmadbg_showchan(const char *fname, int line, struct s3c2410_dma_chan *chan)
  85. {
  86. struct s3c2410_dma_regstate state;
  87. dmadbg_capture(chan, &state);
  88. printk(KERN_DEBUG "dma%d: %s:%d: ls=%d, cur=%p, %p %p\n",
  89. chan->number, fname, line, chan->load_state,
  90. chan->curr, chan->next, chan->end);
  91. dmadbg_dumpregs(fname, line, chan, &state);
  92. }
  93. static void
  94. dmadbg_showregs(const char *fname, int line, struct s3c2410_dma_chan *chan)
  95. {
  96. struct s3c2410_dma_regstate state;
  97. dmadbg_capture(chan, &state);
  98. dmadbg_dumpregs(fname, line, chan, &state);
  99. }
  100. #define dbg_showregs(chan) dmadbg_showregs(__func__, __LINE__, (chan))
  101. #define dbg_showchan(chan) dmadbg_showchan(__func__, __LINE__, (chan))
  102. #else
  103. #define dbg_showregs(chan) do { } while(0)
  104. #define dbg_showchan(chan) do { } while(0)
  105. #endif /* CONFIG_S3C2410_DMA_DEBUG */
  106. /* s3c2410_dma_stats_timeout
  107. *
  108. * Update DMA stats from timeout info
  109. */
  110. static void
  111. s3c2410_dma_stats_timeout(struct s3c2410_dma_stats *stats, int val)
  112. {
  113. if (stats == NULL)
  114. return;
  115. if (val > stats->timeout_longest)
  116. stats->timeout_longest = val;
  117. if (val < stats->timeout_shortest)
  118. stats->timeout_shortest = val;
  119. stats->timeout_avg += val;
  120. }
  121. /* s3c2410_dma_waitforload
  122. *
  123. * wait for the DMA engine to load a buffer, and update the state accordingly
  124. */
  125. static int
  126. s3c2410_dma_waitforload(struct s3c2410_dma_chan *chan, int line)
  127. {
  128. int timeout = chan->load_timeout;
  129. int took;
  130. if (chan->load_state != S3C2410_DMALOAD_1LOADED) {
  131. printk(KERN_ERR "dma%d: s3c2410_dma_waitforload() called in loadstate %d from line %d\n", chan->number, chan->load_state, line);
  132. return 0;
  133. }
  134. if (chan->stats != NULL)
  135. chan->stats->loads++;
  136. while (--timeout > 0) {
  137. if ((dma_rdreg(chan, S3C2410_DMA_DSTAT) << (32-20)) != 0) {
  138. took = chan->load_timeout - timeout;
  139. s3c2410_dma_stats_timeout(chan->stats, took);
  140. switch (chan->load_state) {
  141. case S3C2410_DMALOAD_1LOADED:
  142. chan->load_state = S3C2410_DMALOAD_1RUNNING;
  143. break;
  144. default:
  145. printk(KERN_ERR "dma%d: unknown load_state in s3c2410_dma_waitforload() %d\n", chan->number, chan->load_state);
  146. }
  147. return 1;
  148. }
  149. }
  150. if (chan->stats != NULL) {
  151. chan->stats->timeout_failed++;
  152. }
  153. return 0;
  154. }
  155. /* s3c2410_dma_loadbuffer
  156. *
  157. * load a buffer, and update the channel state
  158. */
  159. static inline int
  160. s3c2410_dma_loadbuffer(struct s3c2410_dma_chan *chan,
  161. struct s3c2410_dma_buf *buf)
  162. {
  163. unsigned long reload;
  164. if (buf == NULL) {
  165. dmawarn("buffer is NULL\n");
  166. return -EINVAL;
  167. }
  168. pr_debug("s3c2410_chan_loadbuffer: loading buff %p (0x%08lx,0x%06x)\n",
  169. buf, (unsigned long)buf->data, buf->size);
  170. /* check the state of the channel before we do anything */
  171. if (chan->load_state == S3C2410_DMALOAD_1LOADED) {
  172. dmawarn("load_state is S3C2410_DMALOAD_1LOADED\n");
  173. }
  174. if (chan->load_state == S3C2410_DMALOAD_1LOADED_1RUNNING) {
  175. dmawarn("state is S3C2410_DMALOAD_1LOADED_1RUNNING\n");
  176. }
  177. /* it would seem sensible if we are the last buffer to not bother
  178. * with the auto-reload bit, so that the DMA engine will not try
  179. * and load another transfer after this one has finished...
  180. */
  181. if (chan->load_state == S3C2410_DMALOAD_NONE) {
  182. pr_debug("load_state is none, checking for noreload (next=%p)\n",
  183. buf->next);
  184. reload = (buf->next == NULL) ? S3C2410_DCON_NORELOAD : 0;
  185. } else {
  186. //pr_debug("load_state is %d => autoreload\n", chan->load_state);
  187. reload = S3C2410_DCON_AUTORELOAD;
  188. }
  189. if ((buf->data & 0xf0000000) != 0x30000000) {
  190. dmawarn("dmaload: buffer is %p\n", (void *)buf->data);
  191. }
  192. writel(buf->data, chan->addr_reg);
  193. dma_wrreg(chan, S3C2410_DMA_DCON,
  194. chan->dcon | reload | (buf->size/chan->xfer_unit));
  195. chan->next = buf->next;
  196. /* update the state of the channel */
  197. switch (chan->load_state) {
  198. case S3C2410_DMALOAD_NONE:
  199. chan->load_state = S3C2410_DMALOAD_1LOADED;
  200. break;
  201. case S3C2410_DMALOAD_1RUNNING:
  202. chan->load_state = S3C2410_DMALOAD_1LOADED_1RUNNING;
  203. break;
  204. default:
  205. dmawarn("dmaload: unknown state %d in loadbuffer\n",
  206. chan->load_state);
  207. break;
  208. }
  209. return 0;
  210. }
  211. /* s3c2410_dma_call_op
  212. *
  213. * small routine to call the op routine with the given op if it has been
  214. * registered
  215. */
  216. static void
  217. s3c2410_dma_call_op(struct s3c2410_dma_chan *chan, enum s3c2410_chan_op op)
  218. {
  219. if (chan->op_fn != NULL) {
  220. (chan->op_fn)(chan, op);
  221. }
  222. }
  223. /* s3c2410_dma_buffdone
  224. *
  225. * small wrapper to check if callback routine needs to be called, and
  226. * if so, call it
  227. */
  228. static inline void
  229. s3c2410_dma_buffdone(struct s3c2410_dma_chan *chan, struct s3c2410_dma_buf *buf,
  230. enum s3c2410_dma_buffresult result)
  231. {
  232. #if 0
  233. pr_debug("callback_fn=%p, buf=%p, id=%p, size=%d, result=%d\n",
  234. chan->callback_fn, buf, buf->id, buf->size, result);
  235. #endif
  236. if (chan->callback_fn != NULL) {
  237. (chan->callback_fn)(chan, buf->id, buf->size, result);
  238. }
  239. }
  240. /* s3c2410_dma_start
  241. *
  242. * start a dma channel going
  243. */
  244. static int s3c2410_dma_start(struct s3c2410_dma_chan *chan)
  245. {
  246. unsigned long tmp;
  247. unsigned long flags;
  248. pr_debug("s3c2410_start_dma: channel=%d\n", chan->number);
  249. local_irq_save(flags);
  250. if (chan->state == S3C2410_DMA_RUNNING) {
  251. pr_debug("s3c2410_start_dma: already running (%d)\n", chan->state);
  252. local_irq_restore(flags);
  253. return 0;
  254. }
  255. chan->state = S3C2410_DMA_RUNNING;
  256. /* check whether there is anything to load, and if not, see
  257. * if we can find anything to load
  258. */
  259. if (chan->load_state == S3C2410_DMALOAD_NONE) {
  260. if (chan->next == NULL) {
  261. printk(KERN_ERR "dma%d: channel has nothing loaded\n",
  262. chan->number);
  263. chan->state = S3C2410_DMA_IDLE;
  264. local_irq_restore(flags);
  265. return -EINVAL;
  266. }
  267. s3c2410_dma_loadbuffer(chan, chan->next);
  268. }
  269. dbg_showchan(chan);
  270. /* enable the channel */
  271. if (!chan->irq_enabled) {
  272. enable_irq(chan->irq);
  273. chan->irq_enabled = 1;
  274. }
  275. /* start the channel going */
  276. tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG);
  277. tmp &= ~S3C2410_DMASKTRIG_STOP;
  278. tmp |= S3C2410_DMASKTRIG_ON;
  279. dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp);
  280. pr_debug("dma%d: %08lx to DMASKTRIG\n", chan->number, tmp);
  281. #if 0
  282. /* the dma buffer loads should take care of clearing the AUTO
  283. * reloading feature */
  284. tmp = dma_rdreg(chan, S3C2410_DMA_DCON);
  285. tmp &= ~S3C2410_DCON_NORELOAD;
  286. dma_wrreg(chan, S3C2410_DMA_DCON, tmp);
  287. #endif
  288. s3c2410_dma_call_op(chan, S3C2410_DMAOP_START);
  289. dbg_showchan(chan);
  290. /* if we've only loaded one buffer onto the channel, then chec
  291. * to see if we have another, and if so, try and load it so when
  292. * the first buffer is finished, the new one will be loaded onto
  293. * the channel */
  294. if (chan->next != NULL) {
  295. if (chan->load_state == S3C2410_DMALOAD_1LOADED) {
  296. if (s3c2410_dma_waitforload(chan, __LINE__) == 0) {
  297. pr_debug("%s: buff not yet loaded, no more todo\n",
  298. __func__);
  299. } else {
  300. chan->load_state = S3C2410_DMALOAD_1RUNNING;
  301. s3c2410_dma_loadbuffer(chan, chan->next);
  302. }
  303. } else if (chan->load_state == S3C2410_DMALOAD_1RUNNING) {
  304. s3c2410_dma_loadbuffer(chan, chan->next);
  305. }
  306. }
  307. local_irq_restore(flags);
  308. return 0;
  309. }
  310. /* s3c2410_dma_canload
  311. *
  312. * work out if we can queue another buffer into the DMA engine
  313. */
  314. static int
  315. s3c2410_dma_canload(struct s3c2410_dma_chan *chan)
  316. {
  317. if (chan->load_state == S3C2410_DMALOAD_NONE ||
  318. chan->load_state == S3C2410_DMALOAD_1RUNNING)
  319. return 1;
  320. return 0;
  321. }
  322. /* s3c2410_dma_enqueue
  323. *
  324. * queue an given buffer for dma transfer.
  325. *
  326. * id the device driver's id information for this buffer
  327. * data the physical address of the buffer data
  328. * size the size of the buffer in bytes
  329. *
  330. * If the channel is not running, then the flag S3C2410_DMAF_AUTOSTART
  331. * is checked, and if set, the channel is started. If this flag isn't set,
  332. * then an error will be returned.
  333. *
  334. * It is possible to queue more than one DMA buffer onto a channel at
  335. * once, and the code will deal with the re-loading of the next buffer
  336. * when necessary.
  337. */
  338. int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
  339. dma_addr_t data, int size)
  340. {
  341. struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
  342. struct s3c2410_dma_buf *buf;
  343. unsigned long flags;
  344. if (chan == NULL)
  345. return -EINVAL;
  346. pr_debug("%s: id=%p, data=%08x, size=%d\n",
  347. __func__, id, (unsigned int)data, size);
  348. buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC);
  349. if (buf == NULL) {
  350. pr_debug("%s: out of memory (%ld alloc)\n",
  351. __func__, (long)sizeof(*buf));
  352. return -ENOMEM;
  353. }
  354. //pr_debug("%s: new buffer %p\n", __func__, buf);
  355. //dbg_showchan(chan);
  356. buf->next = NULL;
  357. buf->data = buf->ptr = data;
  358. buf->size = size;
  359. buf->id = id;
  360. buf->magic = BUF_MAGIC;
  361. local_irq_save(flags);
  362. if (chan->curr == NULL) {
  363. /* we've got nothing loaded... */
  364. pr_debug("%s: buffer %p queued onto empty channel\n",
  365. __func__, buf);
  366. chan->curr = buf;
  367. chan->end = buf;
  368. chan->next = NULL;
  369. } else {
  370. pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n",
  371. chan->number, __func__, buf);
  372. if (chan->end == NULL) {
  373. pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n",
  374. chan->number, __func__, chan);
  375. } else {
  376. chan->end->next = buf;
  377. chan->end = buf;
  378. }
  379. }
  380. /* if necessary, update the next buffer field */
  381. if (chan->next == NULL)
  382. chan->next = buf;
  383. /* check to see if we can load a buffer */
  384. if (chan->state == S3C2410_DMA_RUNNING) {
  385. if (chan->load_state == S3C2410_DMALOAD_1LOADED && 1) {
  386. if (s3c2410_dma_waitforload(chan, __LINE__) == 0) {
  387. printk(KERN_ERR "dma%d: loadbuffer:"
  388. "timeout loading buffer\n",
  389. chan->number);
  390. dbg_showchan(chan);
  391. local_irq_restore(flags);
  392. return -EINVAL;
  393. }
  394. }
  395. while (s3c2410_dma_canload(chan) && chan->next != NULL) {
  396. s3c2410_dma_loadbuffer(chan, chan->next);
  397. }
  398. } else if (chan->state == S3C2410_DMA_IDLE) {
  399. if (chan->flags & S3C2410_DMAF_AUTOSTART) {
  400. s3c2410_dma_ctrl(chan->number | DMACH_LOW_LEVEL,
  401. S3C2410_DMAOP_START);
  402. }
  403. }
  404. local_irq_restore(flags);
  405. return 0;
  406. }
  407. EXPORT_SYMBOL(s3c2410_dma_enqueue);
  408. static inline void
  409. s3c2410_dma_freebuf(struct s3c2410_dma_buf *buf)
  410. {
  411. int magicok = (buf->magic == BUF_MAGIC);
  412. buf->magic = -1;
  413. if (magicok) {
  414. kmem_cache_free(dma_kmem, buf);
  415. } else {
  416. printk("s3c2410_dma_freebuf: buff %p with bad magic\n", buf);
  417. }
  418. }
  419. /* s3c2410_dma_lastxfer
  420. *
  421. * called when the system is out of buffers, to ensure that the channel
  422. * is prepared for shutdown.
  423. */
  424. static inline void
  425. s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan)
  426. {
  427. #if 0
  428. pr_debug("dma%d: s3c2410_dma_lastxfer: load_state %d\n",
  429. chan->number, chan->load_state);
  430. #endif
  431. switch (chan->load_state) {
  432. case S3C2410_DMALOAD_NONE:
  433. break;
  434. case S3C2410_DMALOAD_1LOADED:
  435. if (s3c2410_dma_waitforload(chan, __LINE__) == 0) {
  436. /* flag error? */
  437. printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n",
  438. chan->number, __func__);
  439. return;
  440. }
  441. break;
  442. case S3C2410_DMALOAD_1LOADED_1RUNNING:
  443. /* I believe in this case we do not have anything to do
  444. * until the next buffer comes along, and we turn off the
  445. * reload */
  446. return;
  447. default:
  448. pr_debug("dma%d: lastxfer: unhandled load_state %d with no next\n",
  449. chan->number, chan->load_state);
  450. return;
  451. }
  452. /* hopefully this'll shut the damned thing up after the transfer... */
  453. dma_wrreg(chan, S3C2410_DMA_DCON, chan->dcon | S3C2410_DCON_NORELOAD);
  454. }
  455. #define dmadbg2(x...)
  456. static irqreturn_t
  457. s3c2410_dma_irq(int irq, void *devpw)
  458. {
  459. struct s3c2410_dma_chan *chan = (struct s3c2410_dma_chan *)devpw;
  460. struct s3c2410_dma_buf *buf;
  461. buf = chan->curr;
  462. dbg_showchan(chan);
  463. /* modify the channel state */
  464. switch (chan->load_state) {
  465. case S3C2410_DMALOAD_1RUNNING:
  466. /* TODO - if we are running only one buffer, we probably
  467. * want to reload here, and then worry about the buffer
  468. * callback */
  469. chan->load_state = S3C2410_DMALOAD_NONE;
  470. break;
  471. case S3C2410_DMALOAD_1LOADED:
  472. /* iirc, we should go back to NONE loaded here, we
  473. * had a buffer, and it was never verified as being
  474. * loaded.
  475. */
  476. chan->load_state = S3C2410_DMALOAD_NONE;
  477. break;
  478. case S3C2410_DMALOAD_1LOADED_1RUNNING:
  479. /* we'll worry about checking to see if another buffer is
  480. * ready after we've called back the owner. This should
  481. * ensure we do not wait around too long for the DMA
  482. * engine to start the next transfer
  483. */
  484. chan->load_state = S3C2410_DMALOAD_1LOADED;
  485. break;
  486. case S3C2410_DMALOAD_NONE:
  487. printk(KERN_ERR "dma%d: IRQ with no loaded buffer?\n",
  488. chan->number);
  489. break;
  490. default:
  491. printk(KERN_ERR "dma%d: IRQ in invalid load_state %d\n",
  492. chan->number, chan->load_state);
  493. break;
  494. }
  495. if (buf != NULL) {
  496. /* update the chain to make sure that if we load any more
  497. * buffers when we call the callback function, things should
  498. * work properly */
  499. chan->curr = buf->next;
  500. buf->next = NULL;
  501. if (buf->magic != BUF_MAGIC) {
  502. printk(KERN_ERR "dma%d: %s: buf %p incorrect magic\n",
  503. chan->number, __func__, buf);
  504. return IRQ_HANDLED;
  505. }
  506. s3c2410_dma_buffdone(chan, buf, S3C2410_RES_OK);
  507. /* free resouces */
  508. s3c2410_dma_freebuf(buf);
  509. } else {
  510. }
  511. /* only reload if the channel is still running... our buffer done
  512. * routine may have altered the state by requesting the dma channel
  513. * to stop or shutdown... */
  514. /* todo: check that when the channel is shut-down from inside this
  515. * function, we cope with unsetting reload, etc */
  516. if (chan->next != NULL && chan->state != S3C2410_DMA_IDLE) {
  517. unsigned long flags;
  518. switch (chan->load_state) {
  519. case S3C2410_DMALOAD_1RUNNING:
  520. /* don't need to do anything for this state */
  521. break;
  522. case S3C2410_DMALOAD_NONE:
  523. /* can load buffer immediately */
  524. break;
  525. case S3C2410_DMALOAD_1LOADED:
  526. if (s3c2410_dma_waitforload(chan, __LINE__) == 0) {
  527. /* flag error? */
  528. printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n",
  529. chan->number, __func__);
  530. return IRQ_HANDLED;
  531. }
  532. break;
  533. case S3C2410_DMALOAD_1LOADED_1RUNNING:
  534. goto no_load;
  535. default:
  536. printk(KERN_ERR "dma%d: unknown load_state in irq, %d\n",
  537. chan->number, chan->load_state);
  538. return IRQ_HANDLED;
  539. }
  540. local_irq_save(flags);
  541. s3c2410_dma_loadbuffer(chan, chan->next);
  542. local_irq_restore(flags);
  543. } else {
  544. s3c2410_dma_lastxfer(chan);
  545. /* see if we can stop this channel.. */
  546. if (chan->load_state == S3C2410_DMALOAD_NONE) {
  547. pr_debug("dma%d: end of transfer, stopping channel (%ld)\n",
  548. chan->number, jiffies);
  549. s3c2410_dma_ctrl(chan->number | DMACH_LOW_LEVEL,
  550. S3C2410_DMAOP_STOP);
  551. }
  552. }
  553. no_load:
  554. return IRQ_HANDLED;
  555. }
  556. static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel);
  557. /* s3c2410_request_dma
  558. *
  559. * get control of an dma channel
  560. */
  561. int s3c2410_dma_request(enum dma_ch channel,
  562. struct s3c2410_dma_client *client,
  563. void *dev)
  564. {
  565. struct s3c2410_dma_chan *chan;
  566. unsigned long flags;
  567. int err;
  568. pr_debug("dma%d: s3c2410_request_dma: client=%s, dev=%p\n",
  569. channel, client->name, dev);
  570. local_irq_save(flags);
  571. chan = s3c2410_dma_map_channel(channel);
  572. if (chan == NULL) {
  573. local_irq_restore(flags);
  574. return -EBUSY;
  575. }
  576. dbg_showchan(chan);
  577. chan->client = client;
  578. chan->in_use = 1;
  579. if (!chan->irq_claimed) {
  580. pr_debug("dma%d: %s : requesting irq %d\n",
  581. channel, __func__, chan->irq);
  582. chan->irq_claimed = 1;
  583. local_irq_restore(flags);
  584. err = request_irq(chan->irq, s3c2410_dma_irq, IRQF_DISABLED,
  585. client->name, (void *)chan);
  586. local_irq_save(flags);
  587. if (err) {
  588. chan->in_use = 0;
  589. chan->irq_claimed = 0;
  590. local_irq_restore(flags);
  591. printk(KERN_ERR "%s: cannot get IRQ %d for DMA %d\n",
  592. client->name, chan->irq, chan->number);
  593. return err;
  594. }
  595. chan->irq_enabled = 1;
  596. }
  597. local_irq_restore(flags);
  598. /* need to setup */
  599. pr_debug("%s: channel initialised, %p\n", __func__, chan);
  600. return chan->number | DMACH_LOW_LEVEL;
  601. }