memoryOperation.h 4.2 KB

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  1. /*
  2. * arch/arm/plat-omap/include/mach/mux.h
  3. *
  4. * Table of the Omap register configurations for the FUNC_MUX and
  5. * PULL_DWN combinations.
  6. *
  7. * Copyright (C) 2004 - 2008 Texas Instruments Inc.
  8. * Copyright (C) 2003 - 2008 Nokia Corporation
  9. *
  10. * Written by Tony Lindgren
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. * NOTE: Please use the following naming style for new pin entries.
  27. * For example, W8_1610_MMC2_DAT0, where:
  28. * - W8 = ball
  29. * - 1610 = 1510 or 1610, none if common for both 1510 and 1610
  30. * - MMC2_DAT0 = function
  31. */
  32. #ifndef __ASM_ARCH_MUX_H
  33. #define __ASM_ARCH_MUX_H
  34. #define PU_PD_SEL_NA 0 /* No pu_pd reg available */
  35. #define PULL_DWN_CTRL_NA 0 /* No pull-down control needed */
  36. #ifdef CONFIG_OMAP_MUX_DEBUG
  37. #define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \
  38. .mux_reg = FUNC_MUX_CTRL_##reg, \
  39. .mask_offset = mode_offset, \
  40. .mask = mode,
  41. #define PULL_REG(reg, bit, status) .pull_name = "PULL_DWN_CTRL_"#reg, \
  42. .pull_reg = PULL_DWN_CTRL_##reg, \
  43. .pull_bit = bit, \
  44. .pull_val = status,
  45. #define PU_PD_REG(reg, status) .pu_pd_name = "PU_PD_SEL_"#reg, \
  46. .pu_pd_reg = PU_PD_SEL_##reg, \
  47. .pu_pd_val = status,
  48. #define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \
  49. .mux_reg = OMAP7XX_IO_CONF_##reg, \
  50. .mask_offset = mode_offset, \
  51. .mask = mode,
  52. #define PULL_REG_7XX(reg, bit, status) .pull_name = "OMAP7XX_IO_CONF_"#reg, \
  53. .pull_reg = OMAP7XX_IO_CONF_##reg, \
  54. .pull_bit = bit, \
  55. .pull_val = status,
  56. #else
  57. #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
  58. .mask_offset = mode_offset, \
  59. .mask = mode,
  60. #define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, \
  61. .pull_bit = bit, \
  62. .pull_val = status,
  63. #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \
  64. .pu_pd_val = status,
  65. #define MUX_REG_7XX(reg, mode_offset, mode) \
  66. .mux_reg = OMAP7XX_IO_CONF_##reg, \
  67. .mask_offset = mode_offset, \
  68. .mask = mode,
  69. #define PULL_REG_7XX(reg, bit, status) .pull_reg = OMAP7XX_IO_CONF_##reg, \
  70. .pull_bit = bit, \
  71. .pull_val = status,
  72. #endif /* CONFIG_OMAP_MUX_DEBUG */
  73. #define MUX_CFG(desc, mux_reg, mode_offset, mode, \
  74. pull_reg, pull_bit, pull_status, \
  75. pu_pd_reg, pu_pd_status, debug_status) \
  76. { \
  77. .name = desc, \
  78. .debug = debug_status, \
  79. MUX_REG(mux_reg, mode_offset, mode) \
  80. PULL_REG(pull_reg, pull_bit, pull_status) \
  81. PU_PD_REG(pu_pd_reg, pu_pd_status) \
  82. },
  83. /*
  84. * OMAP730/850 has a slightly different config for the pin mux.
  85. * - config regs are the OMAP7XX_IO_CONF_x regs (see omap7xx.h) regs and
  86. * not the FUNC_MUX_CTRL_x regs from hardware.h
  87. * - for pull-up/down, only has one enable bit which is is in the same register
  88. * as mux config
  89. */
  90. #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \
  91. pull_bit, pull_status, debug_status)\
  92. { \
  93. .name = desc, \
  94. .debug = debug_status, \
  95. MUX_REG_7XX(mux_reg, mode_offset, mode) \
  96. PULL_REG_7XX(mux_reg, pull_bit, pull_status) \
  97. PU_PD_REG(NA, 0) \
  98. },
  99. struct pin_config {
  100. char *name;
  101. const unsigned int mux_reg;
  102. unsigned char debug;
  103. const unsigned char mask_offset;
  104. const unsigned char mask;
  105. const char *pull_name;
  106. const unsigned int pull_reg;
  107. const unsigned char pull_val;
  108. const unsigned char pull_bit;
  109. const char *pu_pd_name;
  110. const unsigned int pu_pd_reg;
  111. const unsigned char pu_pd_val;
  112. #if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
  113. const char *mux_reg_name;
  114. #endif
  115. };
  116. enum omap7xx_index {
  117. /* OMAP 730 keyboard */
  118. E2_7XX_KBR0,
  119. J7_7XX_KBR1,