| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129 | /* * Copyright (C) 2009 Integration Software and Electronic Engineering. * * Modified from mach-omap2/board-generic.c * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */#include <linux/kernel.h>#include <linux/init.h>#include <linux/platform_device.h>#include <linux/delay.h>#include <linux/err.h>#include <linux/clk.h>#include <linux/io.h>#include <linux/gpio.h>#include <linux/interrupt.h>#include <linux/input.h>#include <linux/regulator/machine.h>#include <linux/regulator/fixed.h>#include <linux/i2c/twl.h>#include <linux/mmc/host.h>#include <linux/mtd/nand.h>#include <asm/mach-types.h>#include <asm/mach/arch.h>#include <video/omapdss.h>#include <video/omap-panel-tfp410.h>#include <linux/platform_data/mtd-onenand-omap2.h>#include "common.h"#include "gpmc.h"#include "mux.h"#include "hsmmc.h"#include "sdram-numonyx-m65kxxxxam.h"#include "common-board-devices.h"#include "board-flash.h"#include "control.h"#include "gpmc-onenand.h"#define IGEP2_SMSC911X_CS       5#define IGEP2_SMSC911X_GPIO     176#define IGEP2_GPIO_USBH_NRESET  24#define IGEP2_GPIO_LED0_GREEN   26#define IGEP2_GPIO_LED0_RED     27#define IGEP2_GPIO_LED1_RED     28#define IGEP2_GPIO_DVI_PUP      170#define IGEP2_RB_GPIO_WIFI_NPD     94#define IGEP2_RB_GPIO_WIFI_NRESET  95#define IGEP2_RB_GPIO_BT_NRESET    137#define IGEP2_RC_GPIO_WIFI_NPD     138#define IGEP2_RC_GPIO_WIFI_NRESET  139#define IGEP2_RC_GPIO_BT_NRESET    137#define IGEP3_GPIO_LED0_GREEN	54#define IGEP3_GPIO_LED0_RED	53#define IGEP3_GPIO_LED1_RED	16#define IGEP3_GPIO_USBH_NRESET  183#define IGEP_SYSBOOT_MASK           0x1f#define IGEP_SYSBOOT_NAND           0x0f#define IGEP_SYSBOOT_ONENAND        0x10/* * IGEP2 Hardware Revision Table * *  -------------------------------------------------------------------------- * | Id. | Hw Rev.            | HW0 (28) | WIFI_NPD | WIFI_NRESET | BT_NRESET | *  -------------------------------------------------------------------------- * |  0  | B                  |   high   |  gpio94  |   gpio95    |     -     | * |  0  | B/C (B-compatible) |   high   |  gpio94  |   gpio95    |  gpio137  | * |  1  | C                  |   low    |  gpio138 |   gpio139   |  gpio137  | *  -------------------------------------------------------------------------- */#define IGEP2_BOARD_HWREV_B	0#define IGEP2_BOARD_HWREV_C	1#define IGEP3_BOARD_HWREV	2static u8 hwrev;static void __init igep2_get_revision(void){	u8 ret;	if (machine_is_igep0030()) {		hwrev = IGEP3_BOARD_HWREV;		return;	}	omap_mux_init_gpio(IGEP2_GPIO_LED1_RED, OMAP_PIN_INPUT);	if (gpio_request_one(IGEP2_GPIO_LED1_RED, GPIOF_IN, "GPIO_HW0_REV")) {		pr_warning("IGEP2: Could not obtain gpio GPIO_HW0_REV\n");		pr_err("IGEP2: Unknown Hardware Revision\n");		return;	}	ret = gpio_get_value(IGEP2_GPIO_LED1_RED);	if (ret == 0) {		pr_info("IGEP2: Hardware Revision C (B-NON compatible)\n");		hwrev = IGEP2_BOARD_HWREV_C;	} else if (ret ==  1) {		pr_info("IGEP2: Hardware Revision B/C (B compatible)\n");		hwrev = IGEP2_BOARD_HWREV_B;	} else {		pr_err("IGEP2: Unknown Hardware Revision\n");		hwrev = -1;	}	gpio_free(IGEP2_GPIO_LED1_RED);}#if defined(CONFIG_MTD_ONENAND_OMAP2) ||		\	defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) ||	\	defined(CONFIG_MTD_NAND_OMAP2) ||		\	defined(CONFIG_MTD_NAND_OMAP2_MODULE)#define ONENAND_MAP             0x20000000/* NAND04GR4E1A ( x2 Flash built-in COMBO POP MEMORY ) * Since the device is equipped with two DataRAMs, and two-plane NAND * Flash memory array, these two component enables simultaneous program
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