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functionDefinition.h

functionDefinition.h 6.3 KB
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  1. /*
    2. 

  2.  * linux/arch/arm/mach-mv78xx0/mpp.h -- Multi Purpose Pins
    3. 

  3.  *
    4. 

  4.  *
    5. 

  5.  * sebastien requiem <sebastien@requiem.fr>
    6. 

  6.  *
    7. 

  7.  * This file is licensed under the terms of the GNU General Public
    8. 

  8.  * License version 2.  This program is licensed "as is" without any
    9. 

  9.  * warranty of any kind, whether express or implied.
    10. 

  10.  */
    11. 

  11. 

  12. #ifndef __MV78X00_MPP_H
    13. 

  13. #define __MV78X00_MPP_H
    14. 

  14. 

  15. #define MPP(_num, _sel, _in, _out, _78100_A0) (\
    16. 

  16.     /* MPP number */        ((_num) & 0xff) | \
    17. 

  17.     /* MPP select value */        (((_sel) & 0xf) << 8) | \
    18. 

  18.     /* may be input signal */    ((!!(_in)) << 12) | \
    19. 

  19.     /* may be output signal */    ((!!(_out)) << 13) | \
    20. 

  20.     /* available on A0 */    ((!!(_78100_A0)) << 14))
    21. 

  21. 

  22.                 /*   num sel  i  o  78100_A0  */
    23. 

  23. 

  24. #define MPP_78100_A0_MASK    MPP(0, 0x0, 0, 0, 1)
    25. 

  25. 

  26. #define MPP0_GPIO        MPP(0, 0x0, 1, 1, 1)
    27. 

  27. #define MPP0_GE0_COL        MPP(0, 0x1, 0, 0, 1)
    28. 

  28. #define MPP0_GE1_TXCLK        MPP(0, 0x2, 0, 0, 1)
    29. 

  29. #define MPP0_UNUSED        MPP(0, 0x3, 0, 0, 1)
    30. 

  30. 

  31. #define MPP1_GPIO        MPP(1, 0x0, 1, 1, 1)
    32. 

  32. #define MPP1_GE0_RXERR        MPP(1, 0x1, 0, 0, 1)
    33. 

  33. #define MPP1_GE1_TXCTL        MPP(1, 0x2, 0, 0, 1)
    34. 

  34. #define MPP1_UNUSED        MPP(1, 0x3, 0, 0, 1)
    35. 

  35. 

  36. #define MPP2_GPIO        MPP(2, 0x0, 1, 1, 1)
    37. 

  37. #define MPP2_GE0_CRS        MPP(2, 0x1, 0, 0, 1)
    38. 

  38. #define MPP2_GE1_RXCTL        MPP(2, 0x2, 0, 0, 1)
    39. 

  39. #define MPP2_UNUSED        MPP(2, 0x3, 0, 0, 1)
    40. 

  40. 

  41. #define MPP3_GPIO        MPP(3, 0x0, 1, 1, 1)
    42. 

  42. #define MPP3_GE0_TXERR        MPP(3, 0x1, 0, 0, 1)
    43. 

  43. #define MPP3_GE1_RXCLK        MPP(3, 0x2, 0, 0, 1)
    44. 

  44. #define MPP3_UNUSED        MPP(3, 0x3, 0, 0, 1)
    45. 

  45. 

  46. #define MPP4_GPIO        MPP(4, 0x0, 1, 1, 1)
    47. 

  47. #define MPP4_GE0_TXD4        MPP(4, 0x1, 0, 0, 1)
    48. 

  48. #define MPP4_GE1_TXD0        MPP(4, 0x2, 0, 0, 1)
    49. 

  49. #define MPP4_UNUSED        MPP(4, 0x3, 0, 0, 1)
    50. 

  50. 

  51. #define MPP5_GPIO        MPP(5, 0x0, 1, 1, 1)
    52. 

  52. #define MPP5_GE0_TXD5        MPP(5, 0x1, 0, 0, 1)
    53. 

  53. #define MPP5_GE1_TXD1        MPP(5, 0x2, 0, 0, 1)
    54. 

  54. #define MPP5_UNUSED        MPP(5, 0x3, 0, 0, 1)
    55. 

  55. 

  56. #define MPP6_GPIO        MPP(6, 0x0, 1, 1, 1)
    57. 

  57. #define MPP6_GE0_TXD6        MPP(6, 0x1, 0, 0, 1)
    58. 

  58. #define MPP6_GE1_TXD2        MPP(6, 0x2, 0, 0, 1)
    59. 

  59. #define MPP6_UNUSED        MPP(6, 0x3, 0, 0, 1)
    60. 

  60. 

  61. #define MPP7_GPIO        MPP(7, 0x0, 1, 1, 1)
    62. 

  62. #define MPP7_GE0_TXD7        MPP(7, 0x1, 0, 0, 1)
    63. 

  63. #define MPP7_GE1_TXD3        MPP(7, 0x2, 0, 0, 1)
    64. 

  64. #define MPP7_UNUSED        MPP(7, 0x3, 0, 0, 1)
    65. 

  65. 

  66. #define MPP8_GPIO        MPP(8, 0x0, 1, 1, 1)
    67. 

  67. #define MPP8_GE0_RXD4        MPP(8, 0x1, 0, 0, 1)
    68. 

  68. #define MPP8_GE1_RXD0        MPP(8, 0x2, 0, 0, 1)
    69. 

  69. #define MPP8_UNUSED        MPP(8, 0x3, 0, 0, 1)
    70. 

  70. 

  71. #define MPP9_GPIO        MPP(9, 0x0, 1, 1, 1)
    72. 

  72. #define MPP9_GE0_RXD5        MPP(9, 0x1, 0, 0, 1)
    73. 

  73. #define MPP9_GE1_RXD1        MPP(9, 0x2, 0, 0, 1)
    74. 

  74. #define MPP9_UNUSED        MPP(9, 0x3, 0, 0, 1)
    75. 

  75. 

  76. #define MPP10_GPIO        MPP(10, 0x0, 1, 1, 1)
    77. 

  77. #define MPP10_GE0_RXD6        MPP(10, 0x1, 0, 0, 1)
    78. 

  78. #define MPP10_GE1_RXD2        MPP(10, 0x2, 0, 0, 1)
    79. 

  79. #define MPP10_UNUSED        MPP(10, 0x3, 0, 0, 1)
    80. 

  80. 

  81. #define MPP11_GPIO        MPP(11, 0x0, 1, 1, 1)
    82. 

  82. #define MPP11_GE0_RXD7        MPP(11, 0x1, 0, 0, 1)
    83. 

  83. #define MPP11_GE1_RXD3        MPP(11, 0x2, 0, 0, 1)
    84. 

  84. #define MPP11_UNUSED        MPP(11, 0x3, 0, 0, 1)
    85. 

  85. 

  86. #define MPP12_GPIO        MPP(12, 0x0, 1, 1, 1)
    87. 

  87. #define MPP12_M_BB        MPP(12, 0x3, 0, 0, 1)
    88. 

  88. #define MPP12_UA0_CTSn        MPP(12, 0x4, 0, 0, 1)
    89. 

  89. #define MPP12_NAND_FLASH_REn0    MPP(12, 0x5, 0, 0, 1)
    90. 

  90. #define MPP12_TDM0_SCSn        MPP(12, 0X6, 0, 0, 1)
    91. 

  91. #define MPP12_UNUSED        MPP(12, 0x1, 0, 0, 1)
    92. 

  92. 

  93. #define MPP13_GPIO        MPP(13, 0x0, 1, 1, 1)
    94. 

  94. #define MPP13_SYSRST_OUTn    MPP(13, 0x3, 0, 0, 1)
    95. 

  95. #define MPP13_UA0_RTSn        MPP(13, 0x4, 0, 0, 1)
    96. 

  96. #define MPP13_NAN_FLASH_WEn0    MPP(13, 0x5, 0, 0, 1)
    97. 

  97. #define MPP13_TDM_SCLK        MPP(13, 0x6, 0, 0, 1)
    98. 

  98. #define MPP13_UNUSED        MPP(13, 0x1, 0, 0, 1)
    99. 

  99. 

  100. #define MPP14_GPIO        MPP(14, 0x0, 1, 1, 1)
    101. 

  101. #define MPP14_SATA1_ACTn    MPP(14, 0x3, 0, 0, 1)
    102. 

  102. #define MPP14_UA1_CTSn        MPP(14, 0x4, 0, 0, 1)
    103. 

  103. #define MPP14_NAND_FLASH_REn1    MPP(14, 0x5, 0, 0, 1)
    104. 

  104. #define MPP14_TDM_SMOSI        MPP(14, 0x6, 0, 0, 1)
    105. 

  105. #define MPP14_UNUSED        MPP(14, 0x1, 0, 0, 1)
    106. 

  106. 

  107. #define MPP15_GPIO        MPP(15, 0x0, 1, 1, 1)
    108. 

  108. #define MPP15_SATA0_ACTn    MPP(15, 0x3, 0, 0, 1)
    109. 

  109. #define MPP15_UA1_RTSn        MPP(15, 0x4, 0, 0, 1)
    110. 

  110. #define MPP15_NAND_FLASH_WEn1    MPP(15, 0x5, 0, 0, 1)
    111. 

  111. #define MPP15_TDM_SMISO        MPP(15, 0x6, 0, 0, 1)
    112. 

  112. #define MPP15_UNUSED        MPP(15, 0x1, 0, 0, 1)
    113. 

  113. 

  114. #define MPP16_GPIO        MPP(16, 0x0, 1, 1, 1)
    115. 

  115. #define MPP16_SATA1_PRESENTn    MPP(16, 0x3, 0, 0, 1)
    116. 

  116. #define MPP16_UA2_TXD        MPP(16, 0x4, 0, 0, 1)
    117. 

  117. #define MPP16_NAND_FLASH_REn3    MPP(16, 0x5, 0, 0, 1)
    118. 

  118. #define MPP16_TDM_INTn        MPP(16, 0x6, 0, 0, 1)
    119. 

  119. #define MPP16_UNUSED        MPP(16, 0x1, 0, 0, 1)
    120. 

  120. 

  121. 

  122. #define MPP17_GPIO        MPP(17, 0x0, 1, 1, 1)
    123. 

  123. #define MPP17_SATA0_PRESENTn    MPP(17, 0x3, 0, 0, 1)
    124. 

  124. #define MPP17_UA2_RXD        MPP(17, 0x4, 0, 0, 1)
    125. 

  125. #define MPP17_NAND_FLASH_WEn3    MPP(17, 0x5, 0, 0, 1)
    126. 

  126. #define MPP17_TDM_RSTn        MPP(17, 0x6, 0, 0, 1)
    127. 

  127. #define MPP17_UNUSED        MPP(17, 0x1, 0, 0, 1)
    128. 

  128. 

  129. 

  130. #define MPP18_GPIO        MPP(18, 0x0, 1, 1, 1)
    131. 

  131. #define MPP18_UA0_CTSn        MPP(18, 0x4, 0, 0, 1)
    132. 

  132. #define MPP18_BOOT_FLASH_REn    MPP(18, 0x5, 0, 0, 1)
    133. 

  133. #define MPP18_UNUSED        MPP(18, 0x1, 0, 0, 1)
    134. 

  134. 

  135. 

  136. 

  137. #define MPP19_GPIO        MPP(19, 0x0, 1, 1, 1)
    138. 

  138. #define MPP19_UA0_CTSn        MPP(19, 0x4, 0, 0, 1)
    139. 

  139. #define MPP19_BOOT_FLASH_WEn    MPP(19, 0x5, 0, 0, 1)
    140. 

  140. #define MPP19_UNUSED        MPP(19, 0x1, 0, 0, 1)
    141. 

  141. 

  142. 

  143. #define MPP20_GPIO        MPP(20, 0x0, 1, 1, 1)
    144. 

  144. #define MPP20_UA1_CTSs        MPP(20, 0x4, 0, 0, 1)
    145. 

  145. #define MPP20_TDM_PCLK        MPP(20, 0x6, 0, 0, 0)
    146. 

  146. #define MPP20_UNUSED        MPP(20, 0x1, 0, 0, 1)
    147. 

  147. 

  148. 

  149. 

  150. #define MPP21_GPIO        MPP(21, 0x0, 1, 1, 1)
    151. 

  151. #define MPP21_UA1_CTSs        MPP(21, 0x4, 0, 0, 1)
    152. 

  152. #define MPP21_TDM_FSYNC        MPP(21, 0x6, 0, 0, 0)
    153. 

  153. #define MPP21_UNUSED        MPP(21, 0x1, 0, 0, 1)
    154. 

  154. 

  155. 

  156. 

  157. #define MPP22_GPIO        MPP(22, 0x0, 1, 1, 1)
    158. 

  158. #define MPP22_UA3_TDX        MPP(22, 0x4, 0, 0, 1)
    159. 

  159. #define MPP22_NAND_FLASH_REn2    MPP(22, 0x5, 0, 0, 1)
    160. 

  160. #define MPP22_TDM_DRX        MPP(22, 0x6, 0, 0, 1)
    161. 

  161. #define MPP22_UNUSED        MPP(22, 0x1, 0, 0, 1)
    162. 

  162. 

  163. 

  164. 

  165. #define MPP23_GPIO        MPP(23, 0x0, 1, 1, 1)
    166. 

  166. #define MPP23_UA3_RDX        MPP(23, 0x4, 0, 0, 1)
    167. 

  167. #define MPP23_NAND_FLASH_WEn2    MPP(23, 0x5, 0, 0, 1)
    168. 

  168. #define MPP23_TDM_DTX        MPP(23, 0x6, 0, 0, 1)
    169. 

  169. #define MPP23_UNUSED        MPP(23, 0x1, 0, 0, 1)
    170. 

  170. 

  171. 

  172. #define MPP24_GPIO        MPP(24, 0x0, 1, 1, 1)
    173. 

  173. #define MPP24_UA2_TXD        MPP(24, 0x4, 0, 0, 1)
    174. 

  174. #define MPP24_TDM_INTn        MPP(24, 0x6, 0, 0, 1)
    175.