fireHydrantDataOperation.c 8.0 KB

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  1. /*
  2. * OMAP Voltage Controller (VC) interface
  3. *
  4. * Copyright (C) 2011 Texas Instruments, Inc.
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/bug.h>
  14. #include <linux/io.h>
  15. #include <asm/div64.h>
  16. #include "iomap.h"
  17. #include "soc.h"
  18. #include "voltage.h"
  19. #include "vc.h"
  20. #include "prm-regbits-34xx.h"
  21. #include "prm-regbits-44xx.h"
  22. #include "prm44xx.h"
  23. #include "pm.h"
  24. #include "scrm44xx.h"
  25. #include "control.h"
  26. /**
  27. * struct omap_vc_channel_cfg - describe the cfg_channel bitfield
  28. * @sa: bit for slave address
  29. * @rav: bit for voltage configuration register
  30. * @rac: bit for command configuration register
  31. * @racen: enable bit for RAC
  32. * @cmd: bit for command value set selection
  33. *
  34. * Channel configuration bits, common for OMAP3+
  35. * OMAP3 register: PRM_VC_CH_CONF
  36. * OMAP4 register: PRM_VC_CFG_CHANNEL
  37. * OMAP5 register: PRM_VC_SMPS_<voltdm>_CONFIG
  38. */
  39. struct omap_vc_channel_cfg {
  40. u8 sa;
  41. u8 rav;
  42. u8 rac;
  43. u8 racen;
  44. u8 cmd;
  45. };
  46. static struct omap_vc_channel_cfg vc_default_channel_cfg = {
  47. .sa = BIT(0),
  48. .rav = BIT(1),
  49. .rac = BIT(2),
  50. .racen = BIT(3),
  51. .cmd = BIT(4),
  52. };
  53. /*
  54. * On OMAP3+, all VC channels have the above default bitfield
  55. * configuration, except the OMAP4 MPU channel. This appears
  56. * to be a freak accident as every other VC channel has the
  57. * default configuration, thus creating a mutant channel config.
  58. */
  59. static struct omap_vc_channel_cfg vc_mutant_channel_cfg = {
  60. .sa = BIT(0),
  61. .rav = BIT(2),
  62. .rac = BIT(3),
  63. .racen = BIT(4),
  64. .cmd = BIT(1),
  65. };
  66. static struct omap_vc_channel_cfg *vc_cfg_bits;
  67. /* Default I2C trace length on pcb, 6.3cm. Used for capacitance calculations. */
  68. static u32 sr_i2c_pcb_length = 63;
  69. #define CFG_CHANNEL_MASK 0x1f
  70. /**
  71. * omap_vc_config_channel - configure VC channel to PMIC mappings
  72. * @voltdm: pointer to voltagdomain defining the desired VC channel
  73. *
  74. * Configures the VC channel to PMIC mappings for the following
  75. * PMIC settings
  76. * - i2c slave address (SA)
  77. * - voltage configuration address (RAV)
  78. * - command configuration address (RAC) and enable bit (RACEN)
  79. * - command values for ON, ONLP, RET and OFF (CMD)
  80. *
  81. * This function currently only allows flexible configuration of the
  82. * non-default channel. Starting with OMAP4, there are more than 2
  83. * channels, with one defined as the default (on OMAP4, it's MPU.)
  84. * Only the non-default channel can be configured.
  85. */
  86. static int omap_vc_config_channel(struct voltagedomain *voltdm)
  87. {
  88. struct omap_vc_channel *vc = voltdm->vc;
  89. /*
  90. * For default channel, the only configurable bit is RACEN.
  91. * All others must stay at zero (see function comment above.)
  92. */
  93. if (vc->flags & OMAP_VC_CHANNEL_DEFAULT)
  94. vc->cfg_channel &= vc_cfg_bits->racen;
  95. voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift,
  96. vc->cfg_channel << vc->cfg_channel_sa_shift,
  97. vc->cfg_channel_reg);
  98. return 0;
  99. }
  100. /* Voltage scale and accessory APIs */
  101. int omap_vc_pre_scale(struct voltagedomain *voltdm,
  102. unsigned long target_volt,
  103. u8 *target_vsel, u8 *current_vsel)
  104. {
  105. struct omap_vc_channel *vc = voltdm->vc;
  106. u32 vc_cmdval;
  107. /* Check if sufficient pmic info is available for this vdd */
  108. if (!voltdm->pmic) {
  109. pr_err("%s: Insufficient pmic info to scale the vdd_%s\n",
  110. __func__, voltdm->name);
  111. return -EINVAL;
  112. }
  113. if (!voltdm->pmic->uv_to_vsel) {
  114. pr_err("%s: PMIC function to convert voltage in uV to vsel not registered. Hence unable to scale voltage for vdd_%s\n",
  115. __func__, voltdm->name);
  116. return -ENODATA;
  117. }
  118. if (!voltdm->read || !voltdm->write) {
  119. pr_err("%s: No read/write API for accessing vdd_%s regs\n",
  120. __func__, voltdm->name);
  121. return -EINVAL;
  122. }
  123. *target_vsel = voltdm->pmic->uv_to_vsel(target_volt);
  124. *current_vsel = voltdm->pmic->uv_to_vsel(voltdm->nominal_volt);
  125. /* Setting the ON voltage to the new target voltage */
  126. vc_cmdval = voltdm->read(vc->cmdval_reg);
  127. vc_cmdval &= ~vc->common->cmd_on_mask;
  128. vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift);
  129. voltdm->write(vc_cmdval, vc->cmdval_reg);
  130. voltdm->vc_param->on = target_volt;
  131. omap_vp_update_errorgain(voltdm, target_volt);
  132. return 0;
  133. }
  134. void omap_vc_post_scale(struct voltagedomain *voltdm,
  135. unsigned long target_volt,
  136. u8 target_vsel, u8 current_vsel)
  137. {
  138. u32 smps_steps = 0, smps_delay = 0;
  139. smps_steps = abs(target_vsel - current_vsel);
  140. /* SMPS slew rate / step size. 2us added as buffer. */
  141. smps_delay = ((smps_steps * voltdm->pmic->step_size) /
  142. voltdm->pmic->slew_rate) + 2;
  143. udelay(smps_delay);
  144. }
  145. /* vc_bypass_scale - VC bypass method of voltage scaling */
  146. int omap_vc_bypass_scale(struct voltagedomain *voltdm,
  147. unsigned long target_volt)
  148. {
  149. struct omap_vc_channel *vc = voltdm->vc;
  150. u32 loop_cnt = 0, retries_cnt = 0;
  151. u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
  152. u8 target_vsel, current_vsel;
  153. int ret;
  154. ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
  155. if (ret)
  156. return ret;
  157. vc_valid = vc->common->valid;
  158. vc_bypass_val_reg = vc->common->bypass_val_reg;
  159. vc_bypass_value = (target_vsel << vc->common->data_shift) |
  160. (vc->volt_reg_addr << vc->common->regaddr_shift) |
  161. (vc->i2c_slave_addr << vc->common->slaveaddr_shift);
  162. voltdm->write(vc_bypass_value, vc_bypass_val_reg);
  163. voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
  164. vc_bypass_value = voltdm->read(vc_bypass_val_reg);
  165. /*
  166. * Loop till the bypass command is acknowledged from the SMPS.
  167. * NOTE: This is legacy code. The loop count and retry count needs
  168. * to be revisited.
  169. */
  170. while (!(vc_bypass_value & vc_valid)) {
  171. loop_cnt++;
  172. if (retries_cnt > 10) {
  173. pr_warning("%s: Retry count exceeded\n", __func__);
  174. return -ETIMEDOUT;
  175. }
  176. if (loop_cnt > 50) {
  177. retries_cnt++;
  178. loop_cnt = 0;
  179. udelay(10);
  180. }
  181. vc_bypass_value = voltdm->read(vc_bypass_val_reg);
  182. }
  183. omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
  184. return 0;
  185. }
  186. /* Convert microsecond value to number of 32kHz clock cycles */
  187. static inline u32 omap_usec_to_32k(u32 usec)
  188. {
  189. return DIV_ROUND_UP_ULL(32768ULL * (u64)usec, 1000000ULL);
  190. }
  191. /* Set oscillator setup time for omap3 */
  192. static void omap3_set_clksetup(u32 usec, struct voltagedomain *voltdm)
  193. {
  194. voltdm->write(omap_usec_to_32k(usec), OMAP3_PRM_CLKSETUP_OFFSET);
  195. }
  196. /**
  197. * omap3_set_i2c_timings - sets i2c sleep timings for a channel
  198. * @voltdm: channel to configure
  199. * @off_mode: select whether retention or off mode values used
  200. *
  201. * Calculates and sets up voltage controller to use I2C based
  202. * voltage scaling for sleep modes. This can be used for either off mode
  203. * or retention. Off mode has additionally an option to use sys_off_mode
  204. * pad, which uses a global signal to program the whole power IC to
  205. * off-mode.
  206. */
  207. static void omap3_set_i2c_timings(struct voltagedomain *voltdm, bool off_mode)
  208. {
  209. unsigned long voltsetup1;
  210. u32 tgt_volt;
  211. /*
  212. * Oscillator is shut down only if we are using sys_off_mode pad,
  213. * thus we set a minimal setup time here
  214. */
  215. omap3_set_clksetup(1, voltdm);
  216. if (off_mode)
  217. tgt_volt = voltdm->vc_param->off;
  218. else
  219. tgt_volt = voltdm->vc_param->ret;
  220. voltsetup1 = (voltdm->vc_param->on - tgt_volt) /
  221. voltdm->pmic->slew_rate;
  222. voltsetup1 = voltsetup1 * voltdm->sys_clk.rate / 8 / 1000000 + 1;
  223. voltdm->rmw(voltdm->vfsm->voltsetup_mask,
  224. voltsetup1 << __ffs(voltdm->vfsm->voltsetup_mask),
  225. voltdm->vfsm->voltsetup_reg);
  226. /*
  227. * pmic is not controlling the voltage scaling during retention,
  228. * thus set voltsetup2 to 0
  229. */
  230. voltdm->write(0, OMAP3_PRM_VOLTSETUP2_OFFSET);
  231. }
  232. /**
  233. * omap3_set_off_timings - sets off-mode timings for a channel
  234. * @voltdm: channel to configure
  235. *
  236. * Calculates and sets up off-mode timings for a channel. Off-mode
  237. * can use either I2C based voltage scaling, or alternatively
  238. * sys_off_mode pad can be used to send a global command to power IC.
  239. * This function first checks which mode is being used, and calls
  240. * omap3_set_i2c_timings() if the system is using I2C control mode.
  241. * sys_off_mode has the additional benefit that voltages can be