hiddenDangerAnalysis.h 12 KB

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  1. /*
  2. * Copyright 2007-2010 Analog Devices Inc.
  3. *
  4. * Licensed under the GPL-2 or later.
  5. */
  6. #ifndef _CDEF_BF522_H
  7. #define _CDEF_BF522_H
  8. /* Clock and System Control (0xFFC00000 - 0xFFC000FF) */
  9. #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
  10. #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
  11. #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val)
  12. #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
  13. #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
  14. #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val)
  15. #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
  16. #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val)
  17. #define bfin_read_CHIPID() bfin_read32(CHIPID)
  18. #define bfin_write_CHIPID(val) bfin_write32(CHIPID, val)
  19. /* System Interrupt Controller (0xFFC00100 - 0xFFC001FF) */
  20. #define bfin_read_SWRST() bfin_read16(SWRST)
  21. #define bfin_write_SWRST(val) bfin_write16(SWRST, val)
  22. #define bfin_read_SYSCR() bfin_read16(SYSCR)
  23. #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val)
  24. #define bfin_read_SIC_RVECT() bfin_read32(SIC_RVECT)
  25. #define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT, val)
  26. #define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
  27. #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val)
  28. #define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + (x << 6))
  29. #define bfin_write_SIC_IMASK(x, val) bfin_write32((SIC_IMASK0 + (x << 6)), val)
  30. #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
  31. #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val)
  32. #define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1)
  33. #define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1, val)
  34. #define bfin_read_SIC_IAR2() bfin_read32(SIC_IAR2)
  35. #define bfin_write_SIC_IAR2(val) bfin_write32(SIC_IAR2, val)
  36. #define bfin_read_SIC_IAR3() bfin_read32(SIC_IAR3)
  37. #define bfin_write_SIC_IAR3(val) bfin_write32(SIC_IAR3, val)
  38. #define bfin_read_SIC_ISR0() bfin_read32(SIC_ISR0)
  39. #define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0, val)
  40. #define bfin_read_SIC_ISR(x) bfin_read32(SIC_ISR0 + (x << 6))
  41. #define bfin_write_SIC_ISR(x, val) bfin_write32((SIC_ISR0 + (x << 6)), val)
  42. #define bfin_read_SIC_IWR0() bfin_read32(SIC_IWR0)
  43. #define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0, val)
  44. #define bfin_read_SIC_IWR(x) bfin_read32(SIC_IWR0 + (x << 6))
  45. #define bfin_write_SIC_IWR(x, val) bfin_write32((SIC_IWR0 + (x << 6)), val)
  46. /* SIC Additions to ADSP-BF52x (0xFFC0014C - 0xFFC00162) */
  47. #define bfin_read_SIC_IMASK1() bfin_read32(SIC_IMASK1)
  48. #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val)
  49. #define bfin_read_SIC_IAR4() bfin_read32(SIC_IAR4)
  50. #define bfin_write_SIC_IAR4(val) bfin_write32(SIC_IAR4, val)
  51. #define bfin_read_SIC_IAR5() bfin_read32(SIC_IAR5)
  52. #define bfin_write_SIC_IAR5(val) bfin_write32(SIC_IAR5, val)
  53. #define bfin_read_SIC_IAR6() bfin_read32(SIC_IAR6)
  54. #define bfin_write_SIC_IAR6(val) bfin_write32(SIC_IAR6, val)
  55. #define bfin_read_SIC_IAR7() bfin_read32(SIC_IAR7)
  56. #define bfin_write_SIC_IAR7(val) bfin_write32(SIC_IAR7, val)
  57. #define bfin_read_SIC_ISR1() bfin_read32(SIC_ISR1)
  58. #define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1, val)
  59. #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
  60. #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
  61. /* Watchdog Timer (0xFFC00200 - 0xFFC002FF) */
  62. #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
  63. #define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL, val)
  64. #define bfin_read_WDOG_CNT() bfin_read32(WDOG_CNT)
  65. #define bfin_write_WDOG_CNT(val) bfin_write32(WDOG_CNT, val)
  66. #define bfin_read_WDOG_STAT() bfin_read32(WDOG_STAT)
  67. #define bfin_write_WDOG_STAT(val) bfin_write32(WDOG_STAT, val)
  68. /* Real Time Clock (0xFFC00300 - 0xFFC003FF) */
  69. #define bfin_read_RTC_STAT() bfin_read32(RTC_STAT)
  70. #define bfin_write_RTC_STAT(val) bfin_write32(RTC_STAT, val)
  71. #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
  72. #define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL, val)
  73. #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)
  74. #define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTAT, val)
  75. #define bfin_read_RTC_SWCNT() bfin_read16(RTC_SWCNT)
  76. #define bfin_write_RTC_SWCNT(val) bfin_write16(RTC_SWCNT, val)
  77. #define bfin_read_RTC_ALARM() bfin_read32(RTC_ALARM)
  78. #define bfin_write_RTC_ALARM(val) bfin_write32(RTC_ALARM, val)
  79. #define bfin_read_RTC_FAST() bfin_read16(RTC_FAST)
  80. #define bfin_write_RTC_FAST(val) bfin_write16(RTC_FAST, val)
  81. #define bfin_read_RTC_PREN() bfin_read16(RTC_PREN)
  82. #define bfin_write_RTC_PREN(val) bfin_write16(RTC_PREN, val)
  83. /* UART0 Controller (0xFFC00400 - 0xFFC004FF) */
  84. #define bfin_read_UART0_THR() bfin_read16(UART0_THR)
  85. #define bfin_write_UART0_THR(val) bfin_write16(UART0_THR, val)
  86. #define bfin_read_UART0_RBR() bfin_read16(UART0_RBR)
  87. #define bfin_write_UART0_RBR(val) bfin_write16(UART0_RBR, val)
  88. #define bfin_read_UART0_DLL() bfin_read16(UART0_DLL)
  89. #define bfin_write_UART0_DLL(val) bfin_write16(UART0_DLL, val)
  90. #define bfin_read_UART0_IER() bfin_read16(UART0_IER)
  91. #define bfin_write_UART0_IER(val) bfin_write16(UART0_IER, val)
  92. #define bfin_read_UART0_DLH() bfin_read16(UART0_DLH)
  93. #define bfin_write_UART0_DLH(val) bfin_write16(UART0_DLH, val)
  94. #define bfin_read_UART0_IIR() bfin_read16(UART0_IIR)
  95. #define bfin_write_UART0_IIR(val) bfin_write16(UART0_IIR, val)
  96. #define bfin_read_UART0_LCR() bfin_read16(UART0_LCR)
  97. #define bfin_write_UART0_LCR(val) bfin_write16(UART0_LCR, val)
  98. #define bfin_read_UART0_MCR() bfin_read16(UART0_MCR)
  99. #define bfin_write_UART0_MCR(val) bfin_write16(UART0_MCR, val)
  100. #define bfin_read_UART0_LSR() bfin_read16(UART0_LSR)
  101. #define bfin_write_UART0_LSR(val) bfin_write16(UART0_LSR, val)
  102. #define bfin_read_UART0_MSR() bfin_read16(UART0_MSR)
  103. #define bfin_write_UART0_MSR(val) bfin_write16(UART0_MSR, val)
  104. #define bfin_read_UART0_SCR() bfin_read16(UART0_SCR)
  105. #define bfin_write_UART0_SCR(val) bfin_write16(UART0_SCR, val)
  106. #define bfin_read_UART0_GCTL() bfin_read16(UART0_GCTL)
  107. #define bfin_write_UART0_GCTL(val) bfin_write16(UART0_GCTL, val)
  108. /* SPI Controller (0xFFC00500 - 0xFFC005FF) */
  109. #define bfin_read_SPI_CTL() bfin_read16(SPI_CTL)
  110. #define bfin_write_SPI_CTL(val) bfin_write16(SPI_CTL, val)
  111. #define bfin_read_SPI_FLG() bfin_read16(SPI_FLG)
  112. #define bfin_write_SPI_FLG(val) bfin_write16(SPI_FLG, val)
  113. #define bfin_read_SPI_STAT() bfin_read16(SPI_STAT)
  114. #define bfin_write_SPI_STAT(val) bfin_write16(SPI_STAT, val)
  115. #define bfin_read_SPI_TDBR() bfin_read16(SPI_TDBR)
  116. #define bfin_write_SPI_TDBR(val) bfin_write16(SPI_TDBR, val)
  117. #define bfin_read_SPI_RDBR() bfin_read16(SPI_RDBR)
  118. #define bfin_write_SPI_RDBR(val) bfin_write16(SPI_RDBR, val)
  119. #define bfin_read_SPI_BAUD() bfin_read16(SPI_BAUD)
  120. #define bfin_write_SPI_BAUD(val) bfin_write16(SPI_BAUD, val)
  121. #define bfin_read_SPI_SHADOW() bfin_read16(SPI_SHADOW)
  122. #define bfin_write_SPI_SHADOW(val) bfin_write16(SPI_SHADOW, val)
  123. /* TIMER0-7 Registers (0xFFC00600 - 0xFFC006FF) */
  124. #define bfin_read_TIMER0_CONFIG() bfin_read16(TIMER0_CONFIG)
  125. #define bfin_write_TIMER0_CONFIG(val) bfin_write16(TIMER0_CONFIG, val)
  126. #define bfin_read_TIMER0_COUNTER() bfin_read32(TIMER0_COUNTER)
  127. #define bfin_write_TIMER0_COUNTER(val) bfin_write32(TIMER0_COUNTER, val)
  128. #define bfin_read_TIMER0_PERIOD() bfin_read32(TIMER0_PERIOD)
  129. #define bfin_write_TIMER0_PERIOD(val) bfin_write32(TIMER0_PERIOD, val)
  130. #define bfin_read_TIMER0_WIDTH() bfin_read32(TIMER0_WIDTH)
  131. #define bfin_write_TIMER0_WIDTH(val) bfin_write32(TIMER0_WIDTH, val)
  132. #define bfin_read_TIMER1_CONFIG() bfin_read16(TIMER1_CONFIG)
  133. #define bfin_write_TIMER1_CONFIG(val) bfin_write16(TIMER1_CONFIG, val)
  134. #define bfin_read_TIMER1_COUNTER() bfin_read32(TIMER1_COUNTER)
  135. #define bfin_write_TIMER1_COUNTER(val) bfin_write32(TIMER1_COUNTER, val)
  136. #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
  137. #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
  138. #define bfin_read_TIMER1_WIDTH() bfin_read32(TIMER1_WIDTH)
  139. #define bfin_write_TIMER1_WIDTH(val) bfin_write32(TIMER1_WIDTH, val)
  140. #define bfin_read_TIMER2_CONFIG() bfin_read16(TIMER2_CONFIG)
  141. #define bfin_write_TIMER2_CONFIG(val) bfin_write16(TIMER2_CONFIG, val)
  142. #define bfin_read_TIMER2_COUNTER() bfin_read32(TIMER2_COUNTER)
  143. #define bfin_write_TIMER2_COUNTER(val) bfin_write32(TIMER2_COUNTER, val)
  144. #define bfin_read_TIMER2_PERIOD() bfin_read32(TIMER2_PERIOD)
  145. #define bfin_write_TIMER2_PERIOD(val) bfin_write32(TIMER2_PERIOD, val)
  146. #define bfin_read_TIMER2_WIDTH() bfin_read32(TIMER2_WIDTH)
  147. #define bfin_write_TIMER2_WIDTH(val) bfin_write32(TIMER2_WIDTH, val)
  148. #define bfin_read_TIMER3_CONFIG() bfin_read16(TIMER3_CONFIG)
  149. #define bfin_write_TIMER3_CONFIG(val) bfin_write16(TIMER3_CONFIG, val)
  150. #define bfin_read_TIMER3_COUNTER() bfin_read32(TIMER3_COUNTER)
  151. #define bfin_write_TIMER3_COUNTER(val) bfin_write32(TIMER3_COUNTER, val)
  152. #define bfin_read_TIMER3_PERIOD() bfin_read32(TIMER3_PERIOD)
  153. #define bfin_write_TIMER3_PERIOD(val) bfin_write32(TIMER3_PERIOD, val)
  154. #define bfin_read_TIMER3_WIDTH() bfin_read32(TIMER3_WIDTH)
  155. #define bfin_write_TIMER3_WIDTH(val) bfin_write32(TIMER3_WIDTH, val)
  156. #define bfin_read_TIMER4_CONFIG() bfin_read16(TIMER4_CONFIG)
  157. #define bfin_write_TIMER4_CONFIG(val) bfin_write16(TIMER4_CONFIG, val)
  158. #define bfin_read_TIMER4_COUNTER() bfin_read32(TIMER4_COUNTER)
  159. #define bfin_write_TIMER4_COUNTER(val) bfin_write32(TIMER4_COUNTER, val)
  160. #define bfin_read_TIMER4_PERIOD() bfin_read32(TIMER4_PERIOD)
  161. #define bfin_write_TIMER4_PERIOD(val) bfin_write32(TIMER4_PERIOD, val)
  162. #define bfin_read_TIMER4_WIDTH() bfin_read32(TIMER4_WIDTH)
  163. #define bfin_write_TIMER4_WIDTH(val) bfin_write32(TIMER4_WIDTH, val)
  164. #define bfin_read_TIMER5_CONFIG() bfin_read16(TIMER5_CONFIG)
  165. #define bfin_write_TIMER5_CONFIG(val) bfin_write16(TIMER5_CONFIG, val)
  166. #define bfin_read_TIMER5_COUNTER() bfin_read32(TIMER5_COUNTER)
  167. #define bfin_write_TIMER5_COUNTER(val) bfin_write32(TIMER5_COUNTER, val)
  168. #define bfin_read_TIMER5_PERIOD() bfin_read32(TIMER5_PERIOD)
  169. #define bfin_write_TIMER5_PERIOD(val) bfin_write32(TIMER5_PERIOD, val)
  170. #define bfin_read_TIMER5_WIDTH() bfin_read32(TIMER5_WIDTH)
  171. #define bfin_write_TIMER5_WIDTH(val) bfin_write32(TIMER5_WIDTH, val)
  172. #define bfin_read_TIMER6_CONFIG() bfin_read16(TIMER6_CONFIG)
  173. #define bfin_write_TIMER6_CONFIG(val) bfin_write16(TIMER6_CONFIG, val)
  174. #define bfin_read_TIMER6_COUNTER() bfin_read32(TIMER6_COUNTER)
  175. #define bfin_write_TIMER6_COUNTER(val) bfin_write32(TIMER6_COUNTER, val)
  176. #define bfin_read_TIMER6_PERIOD() bfin_read32(TIMER6_PERIOD)
  177. #define bfin_write_TIMER6_PERIOD(val) bfin_write32(TIMER6_PERIOD, val)
  178. #define bfin_read_TIMER6_WIDTH() bfin_read32(TIMER6_WIDTH)
  179. #define bfin_write_TIMER6_WIDTH(val) bfin_write32(TIMER6_WIDTH, val)
  180. #define bfin_read_TIMER7_CONFIG() bfin_read16(TIMER7_CONFIG)
  181. #define bfin_write_TIMER7_CONFIG(val) bfin_write16(TIMER7_CONFIG, val)
  182. #define bfin_read_TIMER7_COUNTER() bfin_read32(TIMER7_COUNTER)
  183. #define bfin_write_TIMER7_COUNTER(val) bfin_write32(TIMER7_COUNTER, val)
  184. #define bfin_read_TIMER7_PERIOD() bfin_read32(TIMER7_PERIOD)
  185. #define bfin_write_TIMER7_PERIOD(val) bfin_write32(TIMER7_PERIOD, val)
  186. #define bfin_read_TIMER7_WIDTH() bfin_read32(TIMER7_WIDTH)
  187. #define bfin_write_TIMER7_WIDTH(val) bfin_write32(TIMER7_WIDTH, val)
  188. #define bfin_read_TIMER_ENABLE() bfin_read16(TIMER_ENABLE)
  189. #define bfin_write_TIMER_ENABLE(val) bfin_write16(TIMER_ENABLE, val)
  190. #define bfin_read_TIMER_DISABLE() bfin_read16(TIMER_DISABLE)
  191. #define bfin_write_TIMER_DISABLE(val) bfin_write16(TIMER_DISABLE, val)
  192. #define bfin_read_TIMER_STATUS() bfin_read32(TIMER_STATUS)
  193. #define bfin_write_TIMER_STATUS(val) bfin_write32(TIMER_STATUS, val)
  194. /* General Purpose I/O Port F (0xFFC00700 - 0xFFC007FF) */
  195. #define bfin_read_PORTFIO() bfin_read16(PORTFIO)
  196. #define bfin_write_PORTFIO(val) bfin_write16(PORTFIO, val)
  197. #define bfin_read_PORTFIO_CLEAR() bfin_read16(PORTFIO_CLEAR)
  198. #define bfin_write_PORTFIO_CLEAR(val) bfin_write16(PORTFIO_CLEAR, val)