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rtuTemperatureHumidityDataOperation.h

rtuTemperatureHumidityDataOperation.h 3.2 KB
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  1. /*
    2. 

  2.  * Copyright (C) 2009 Nokia
    3. 

  3.  * Copyright (C) 2009 Texas Instruments
    4. 

  4.  *
    5. 

  5.  * This program is free software; you can redistribute it and/or modify
    6. 

  6.  * it under the terms of the GNU General Public License version 2 as
    7. 

  7.  * published by the Free Software Foundation.
    8. 

  8.  */
    9. 

  9. 

  10. #define OMAP2430_CONTROL_PADCONF_MUX_PBASE			0x49002030LU
    11. 

  11. 

  12. #define OMAP2430_MUX(mode0, mux_value)					\
    13. 

  13. {									\
    14. 

  14. 	.reg_offset	= (OMAP2430_CONTROL_PADCONF_##mode0##_OFFSET),	\
    15. 

  15. 	.value		= (mux_value),					\
    16. 

  16. }
    17. 

  17. 

  18. /*
    19. 

  19.  * OMAP2430 CONTROL_PADCONF* register offsets for pin-muxing
    20. 

  20.  *
    21. 

  21.  * Extracted from the TRM.  Add 0x49002030 to these values to get the
    22. 

  22.  * absolute addresses.  The name in the macro is the mode-0 name of
    23. 

  23.  * the pin.  NOTE: These registers are 8-bits wide.
    24. 

  24.  *
    25. 

  25.  * Note that these defines use SDMMC instead of MMC for compatibility
    26. 

  26.  * with signal names used in 3630.
    27. 

  27.  */
    28. 

  28. #define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET		0x000
    29. 

  29. #define OMAP2430_CONTROL_PADCONF_GPMC_NCS0_OFFSET		0x001
    30. 

  30. #define OMAP2430_CONTROL_PADCONF_GPMC_NCS1_OFFSET		0x002
    31. 

  31. #define OMAP2430_CONTROL_PADCONF_GPMC_NCS2_OFFSET		0x003
    32. 

  32. #define OMAP2430_CONTROL_PADCONF_GPMC_NCS3_OFFSET		0x004
    33. 

  33. #define OMAP2430_CONTROL_PADCONF_GPMC_NCS4_OFFSET		0x005
    34. 

  34. #define OMAP2430_CONTROL_PADCONF_GPMC_NCS5_OFFSET		0x006
    35. 

  35. #define OMAP2430_CONTROL_PADCONF_GPMC_NCS6_OFFSET		0x007
    36. 

  36. #define OMAP2430_CONTROL_PADCONF_GPMC_NCS7_OFFSET		0x008
    37. 

  37. #define OMAP2430_CONTROL_PADCONF_GPMC_NADV_ALE_OFFSET		0x009
    38. 

  38. #define OMAP2430_CONTROL_PADCONF_GPMC_NOE_NRE_OFFSET		0x00a
    39. 

  39. #define OMAP2430_CONTROL_PADCONF_GPMC_NWE_OFFSET		0x00b
    40. 

  40. #define OMAP2430_CONTROL_PADCONF_GPMC_NBE0_CLE_OFFSET		0x00c
    41. 

  41. #define OMAP2430_CONTROL_PADCONF_GPMC_NBE1_OFFSET		0x00d
    42. 

  42. #define OMAP2430_CONTROL_PADCONF_GPMC_NWP_OFFSET		0x00e
    43. 

  43. #define OMAP2430_CONTROL_PADCONF_GPMC_WAIT0_OFFSET		0x00f
    44. 

  44. #define OMAP2430_CONTROL_PADCONF_GPMC_WAIT1_OFFSET		0x010
    45. 

  45. #define OMAP2430_CONTROL_PADCONF_GPMC_WAIT2_OFFSET		0x011
    46. 

  46. #define OMAP2430_CONTROL_PADCONF_GPMC_WAIT3_OFFSET		0x012
    47. 

  47. #define OMAP2430_CONTROL_PADCONF_SDRC_CLK_OFFSET		0x013
    48. 

  48. #define OMAP2430_CONTROL_PADCONF_SDRC_NCLK_OFFSET		0x014
    49. 

  49. #define OMAP2430_CONTROL_PADCONF_SDRC_NCS0_OFFSET		0x015
    50. 

  50. #define OMAP2430_CONTROL_PADCONF_SDRC_NCS1_OFFSET		0x016
    51. 

  51. #define OMAP2430_CONTROL_PADCONF_SDRC_CKE0_OFFSET		0x017
    52. 

  52. #define OMAP2430_CONTROL_PADCONF_SDRC_CKE1_OFFSET		0x018
    53. 

  53. #define OMAP2430_CONTROL_PADCONF_SDRC_NRAS_OFFSET		0x019
    54. 

  54. #define OMAP2430_CONTROL_PADCONF_SDRC_NCAS_OFFSET		0x01a
    55. 

  55. #define OMAP2430_CONTROL_PADCONF_SDRC_NWE_OFFSET		0x01b
    56. 

  56. #define OMAP2430_CONTROL_PADCONF_SDRC_DM0_OFFSET		0x01c
    57. 

  57. #define OMAP2430_CONTROL_PADCONF_SDRC_DM1_OFFSET		0x01d
    58. 

  58. #define OMAP2430_CONTROL_PADCONF_SDRC_DM2_OFFSET		0x01e
    59. 

  59. #define OMAP2430_CONTROL_PADCONF_SDRC_DM3_OFFSET		0x01f
    60. 

  60. #define OMAP2430_CONTROL_PADCONF_SDRC_DQS0_OFFSET		0x020
    61. 

  61. #define OMAP2430_CONTROL_PADCONF_SDRC_DQS1_OFFSET		0x021
    62. 

  62. #define OMAP2430_CONTROL_PADCONF_SDRC_DQS2_OFFSET		0x022
    63. 

  63. #define OMAP2430_CONTROL_PADCONF_SDRC_DQS3_OFFSET		0x023
    64. 

  64. #define OMAP2430_CONTROL_PADCONF_SDRC_A14_OFFSET		0x024
    65. 

  65. #define OMAP2430_CONTROL_PADCONF_SDRC_A13_OFFSET		0x025
    66. 

  66. #define OMAP2430_CONTROL_PADCONF_SDRC_A12_OFFSET		0x026
    67. 

  67. #define OMAP2430_CONTROL_PADCONF_SDRC_BA1_OFFSET		0x027
    68. 

  68. #define OMAP2430_CONTROL_PADCONF_SDRC_BA0_OFFSET		0x028
    69. 

  69. #define OMAP2430_CONTROL_PADCONF_SDRC_A11_OFFSET		0x029
    70.