| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390 | /* *  Copyright (C) 2007 Atmel Corporation * * This file is subject to the terms and conditions of the GNU General Public * License.  See the file COPYING in the main directory of this archive for * more details. */#include <asm/mach/arch.h>#include <asm/mach/map.h>#include <linux/dma-mapping.h>#include <linux/gpio.h>#include <linux/platform_device.h>#include <linux/i2c-gpio.h>#include <linux/fb.h>#include <video/atmel_lcdc.h>#include <mach/at91sam9rl.h>#include <mach/at91sam9rl_matrix.h>#include <mach/at91_matrix.h>#include <mach/at91sam9_smc.h>#include <linux/platform_data/dma-atmel.h>#include "board.h"#include "generic.h"/* -------------------------------------------------------------------- *  HDMAC - AHB DMA Controller * -------------------------------------------------------------------- */#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)static u64 hdmac_dmamask = DMA_BIT_MASK(32);static struct resource hdmac_resources[] = {	[0] = {		.start	= AT91SAM9RL_BASE_DMA,		.end	= AT91SAM9RL_BASE_DMA + SZ_512 - 1,		.flags	= IORESOURCE_MEM,	},	[2] = {		.start	= NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,		.end	= NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,		.flags	= IORESOURCE_IRQ,	},};static struct platform_device at_hdmac_device = {	.name		= "at91sam9rl_dma",	.id		= -1,	.dev		= {				.dma_mask		= &hdmac_dmamask,				.coherent_dma_mask	= DMA_BIT_MASK(32),	},	.resource	= hdmac_resources,	.num_resources	= ARRAY_SIZE(hdmac_resources),};void __init at91_add_device_hdmac(void){	platform_device_register(&at_hdmac_device);}#elsevoid __init at91_add_device_hdmac(void) {}#endif/* -------------------------------------------------------------------- *  USB HS Device (Gadget) * -------------------------------------------------------------------- */#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)static struct resource usba_udc_resources[] = {	[0] = {		.start	= AT91SAM9RL_UDPHS_FIFO,		.end	= AT91SAM9RL_UDPHS_FIFO + SZ_512K - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= AT91SAM9RL_BASE_UDPHS,		.end	= AT91SAM9RL_BASE_UDPHS + SZ_1K - 1,		.flags	= IORESOURCE_MEM,	},	[2] = {		.start	= NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,		.end	= NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,		.flags	= IORESOURCE_IRQ,	},};#define EP(nam, idx, maxpkt, maxbk, dma, isoc)			\	[idx] = {						\		.name		= nam,				\		.index		= idx,				\		.fifo_size	= maxpkt,			\		.nr_banks	= maxbk,			\		.can_dma	= dma,				\		.can_isoc	= isoc,				\	}static struct usba_ep_data usba_udc_ep[] __initdata = {	EP("ep0", 0, 64, 1, 0, 0),	EP("ep1", 1, 1024, 2, 1, 1),	EP("ep2", 2, 1024, 2, 1, 1),	EP("ep3", 3, 1024, 3, 1, 0),	EP("ep4", 4, 1024, 3, 1, 0),	EP("ep5", 5, 1024, 3, 1, 1),	EP("ep6", 6, 1024, 3, 1, 1),};#undef EP/* * pdata doesn't have room for any endpoints, so we need to * append room for the ones we need right after it. */static struct {	struct usba_platform_data pdata;	struct usba_ep_data ep[7];} usba_udc_data;static struct platform_device at91_usba_udc_device = {	.name		= "atmel_usba_udc",	.id		= -1,	.dev		= {				.platform_data	= &usba_udc_data.pdata,	},	.resource	= usba_udc_resources,	.num_resources	= ARRAY_SIZE(usba_udc_resources),};void __init at91_add_device_usba(struct usba_platform_data *data){	/*	 * Invalid pins are 0 on AT91, but the usba driver is shared	 * with AVR32, which use negative values instead. Once/if	 * gpio_is_valid() is ported to AT91, revisit this code.	 */	usba_udc_data.pdata.vbus_pin = -EINVAL;	usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);	memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));	if (data && gpio_is_valid(data->vbus_pin)) {		at91_set_gpio_input(data->vbus_pin, 0);		at91_set_deglitch(data->vbus_pin, 1);		usba_udc_data.pdata.vbus_pin = data->vbus_pin;	}	/* Pullup pin is handled internally by USB device peripheral */	platform_device_register(&at91_usba_udc_device);}#elsevoid __init at91_add_device_usba(struct usba_platform_data *data) {}#endif/* -------------------------------------------------------------------- *  MMC / SD * -------------------------------------------------------------------- */#if IS_ENABLED(CONFIG_MMC_ATMELMCI)static u64 mmc_dmamask = DMA_BIT_MASK(32);static struct mci_platform_data mmc_data;static struct resource mmc_resources[] = {	[0] = {		.start	= AT91SAM9RL_BASE_MCI,		.end	= AT91SAM9RL_BASE_MCI + SZ_16K - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,		.end	= NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,		.flags	= IORESOURCE_IRQ,	},};static struct platform_device at91sam9rl_mmc_device = {	.name		= "atmel_mci",	.id		= -1,	.dev		= {				.dma_mask		= &mmc_dmamask,				.coherent_dma_mask	= DMA_BIT_MASK(32),				.platform_data		= &mmc_data,	},	.resource	= mmc_resources,	.num_resources	= ARRAY_SIZE(mmc_resources),};void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data){	if (!data)		return;	if (data->slot[0].bus_width) {		/* input/irq */		if (gpio_is_valid(data->slot[0].detect_pin)) {			at91_set_gpio_input(data->slot[0].detect_pin, 1);			at91_set_deglitch(data->slot[0].detect_pin, 1);		}		if (gpio_is_valid(data->slot[0].wp_pin))			at91_set_gpio_input(data->slot[0].wp_pin, 1);		/* CLK */		at91_set_A_periph(AT91_PIN_PA2, 0);		/* CMD */		at91_set_A_periph(AT91_PIN_PA1, 1);		/* DAT0, maybe DAT1..DAT3 */		at91_set_A_periph(AT91_PIN_PA0, 1);		if (data->slot[0].bus_width == 4) {			at91_set_A_periph(AT91_PIN_PA3, 1);			at91_set_A_periph(AT91_PIN_PA4, 1);			at91_set_A_periph(AT91_PIN_PA5, 1);		}		mmc_data = *data;		platform_device_register(&at91sam9rl_mmc_device);	}}#elsevoid __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}#endif/* -------------------------------------------------------------------- *  NAND / SmartMedia * -------------------------------------------------------------------- */#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)static struct atmel_nand_data nand_data;#define NAND_BASE	AT91_CHIPSELECT_3static struct resource nand_resources[] = {	[0] = {		.start	= NAND_BASE,		.end	= NAND_BASE + SZ_256M - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= AT91SAM9RL_BASE_ECC,		.end	= AT91SAM9RL_BASE_ECC + SZ_512 - 1,		.flags	= IORESOURCE_MEM,	}};static struct platform_device atmel_nand_device = {	.name		= "atmel_nand",	.id		= -1,	.dev		= {				.platform_data	= &nand_data,	},	.resource	= nand_resources,	.num_resources	= ARRAY_SIZE(nand_resources),};void __init at91_add_device_nand(struct atmel_nand_data *data){	unsigned long csa;	if (!data)		return;	csa = at91_matrix_read(AT91_MATRIX_EBICSA);	at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);	/* enable pin */	if (gpio_is_valid(data->enable_pin))		at91_set_gpio_output(data->enable_pin, 1);	/* ready/busy pin */	if (gpio_is_valid(data->rdy_pin))		at91_set_gpio_input(data->rdy_pin, 1);	/* card detect pin */	if (gpio_is_valid(data->det_pin))		at91_set_gpio_input(data->det_pin, 1);	at91_set_A_periph(AT91_PIN_PB4, 0);		/* NANDOE */	at91_set_A_periph(AT91_PIN_PB5, 0);		/* NANDWE */	nand_data = *data;	platform_device_register(&atmel_nand_device);}#elsevoid __init at91_add_device_nand(struct atmel_nand_data *data) {}#endif/* -------------------------------------------------------------------- *  TWI (i2c) * -------------------------------------------------------------------- *//* * Prefer the GPIO code since the TWI controller isn't robust * (gets overruns and underruns under load) and can only issue * repeated STARTs in one scenario (the driver doesn't yet handle them). */#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)static struct i2c_gpio_platform_data pdata = {	.sda_pin		= AT91_PIN_PA23,	.sda_is_open_drain	= 1,	.scl_pin		= AT91_PIN_PA24,	.scl_is_open_drain	= 1,	.udelay			= 2,		/* ~100 kHz */};static struct platform_device at91sam9rl_twi_device = {	.name			= "i2c-gpio",	.id			= 0,	.dev.platform_data	= &pdata,};void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices){	at91_set_GPIO_periph(AT91_PIN_PA23, 1);		/* TWD (SDA) */	at91_set_multi_drive(AT91_PIN_PA23, 1);	at91_set_GPIO_periph(AT91_PIN_PA24, 1);		/* TWCK (SCL) */	at91_set_multi_drive(AT91_PIN_PA24, 1);	i2c_register_board_info(0, devices, nr_devices);	platform_device_register(&at91sam9rl_twi_device);}#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)static struct resource twi_resources[] = {	[0] = {		.start	= AT91SAM9RL_BASE_TWI0,		.end	= AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,		.end	= NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,		.flags	= IORESOURCE_IRQ,	},};static struct platform_device at91sam9rl_twi_device = {	.name		= "i2c-at91sam9g20",	.id		= 0,	.resource	= twi_resources,	.num_resources	= ARRAY_SIZE(twi_resources),};void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices){	/* pins used for TWI interface */	at91_set_A_periph(AT91_PIN_PA23, 0);		/* TWD */	at91_set_multi_drive(AT91_PIN_PA23, 1);	at91_set_A_periph(AT91_PIN_PA24, 0);		/* TWCK */	at91_set_multi_drive(AT91_PIN_PA24, 1);	i2c_register_board_info(0, devices, nr_devices);	platform_device_register(&at91sam9rl_twi_device);}#elsevoid __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}#endif/* -------------------------------------------------------------------- *  SPI * -------------------------------------------------------------------- */#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)static u64 spi_dmamask = DMA_BIT_MASK(32);static struct resource spi_resources[] = {	[0] = {		.start	= AT91SAM9RL_BASE_SPI,		.end	= AT91SAM9RL_BASE_SPI + SZ_16K - 1,		.flags	= IORESOURCE_MEM,	},	[1] = {		.start	= NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,		.end	= NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,		.flags	= IORESOURCE_IRQ,	},};
 |