| 12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455 | /* * Copyright 2011 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */#include <linux/init.h>#include <linux/types.h>#include <linux/clk.h>#include <linux/clkdev.h>#include <linux/err.h>#include <linux/io.h>#include <linux/of.h>#include <linux/of_address.h>#include <linux/of_irq.h>#include "clk.h"#include "common.h"#define CCGR0				0x68#define CCGR1				0x6c#define CCGR2				0x70#define CCGR3				0x74#define CCGR4				0x78#define CCGR5				0x7c#define CCGR6				0x80#define CCGR7				0x84#define CLPCR				0x54#define BP_CLPCR_LPM			0#define BM_CLPCR_LPM			(0x3 << 0)#define BM_CLPCR_BYPASS_PMIC_READY	(0x1 << 2)#define BM_CLPCR_ARM_CLK_DIS_ON_LPM	(0x1 << 5)#define BM_CLPCR_SBYOS			(0x1 << 6)#define BM_CLPCR_DIS_REF_OSC		(0x1 << 7)#define BM_CLPCR_VSTBY			(0x1 << 8)#define BP_CLPCR_STBY_COUNT		9#define BM_CLPCR_STBY_COUNT		(0x3 << 9)#define BM_CLPCR_COSC_PWRDOWN		(0x1 << 11)#define BM_CLPCR_WB_PER_AT_LPM		(0x1 << 16)#define BM_CLPCR_WB_CORE_AT_LPM		(0x1 << 17)#define BM_CLPCR_BYP_MMDC_CH0_LPM_HS	(0x1 << 19)#define BM_CLPCR_BYP_MMDC_CH1_LPM_HS	(0x1 << 21)#define BM_CLPCR_MASK_CORE0_WFI		(0x1 << 22)#define BM_CLPCR_MASK_CORE1_WFI		(0x1 << 23)#define BM_CLPCR_MASK_CORE2_WFI		(0x1 << 24)#define BM_CLPCR_MASK_CORE3_WFI		(0x1 << 25)#define BM_CLPCR_MASK_SCU_IDLE		(0x1 << 26)#define BM_CLPCR_MASK_L2CC_IDLE		(0x1 << 27)
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