synchronousMemoryDatabase.c 3.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129
  1. /*
  2. * Copyright (C) 2009 Integration Software and Electronic Engineering.
  3. *
  4. * Modified from mach-omap2/board-generic.c
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/delay.h>
  14. #include <linux/err.h>
  15. #include <linux/clk.h>
  16. #include <linux/io.h>
  17. #include <linux/gpio.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/input.h>
  20. #include <linux/regulator/machine.h>
  21. #include <linux/regulator/fixed.h>
  22. #include <linux/i2c/twl.h>
  23. #include <linux/mmc/host.h>
  24. #include <linux/mtd/nand.h>
  25. #include <asm/mach-types.h>
  26. #include <asm/mach/arch.h>
  27. #include <video/omapdss.h>
  28. #include <video/omap-panel-tfp410.h>
  29. #include <linux/platform_data/mtd-onenand-omap2.h>
  30. #include "common.h"
  31. #include "gpmc.h"
  32. #include "mux.h"
  33. #include "hsmmc.h"
  34. #include "sdram-numonyx-m65kxxxxam.h"
  35. #include "common-board-devices.h"
  36. #include "board-flash.h"
  37. #include "control.h"
  38. #include "gpmc-onenand.h"
  39. #define IGEP2_SMSC911X_CS 5
  40. #define IGEP2_SMSC911X_GPIO 176
  41. #define IGEP2_GPIO_USBH_NRESET 24
  42. #define IGEP2_GPIO_LED0_GREEN 26
  43. #define IGEP2_GPIO_LED0_RED 27
  44. #define IGEP2_GPIO_LED1_RED 28
  45. #define IGEP2_GPIO_DVI_PUP 170
  46. #define IGEP2_RB_GPIO_WIFI_NPD 94
  47. #define IGEP2_RB_GPIO_WIFI_NRESET 95
  48. #define IGEP2_RB_GPIO_BT_NRESET 137
  49. #define IGEP2_RC_GPIO_WIFI_NPD 138
  50. #define IGEP2_RC_GPIO_WIFI_NRESET 139
  51. #define IGEP2_RC_GPIO_BT_NRESET 137
  52. #define IGEP3_GPIO_LED0_GREEN 54
  53. #define IGEP3_GPIO_LED0_RED 53
  54. #define IGEP3_GPIO_LED1_RED 16
  55. #define IGEP3_GPIO_USBH_NRESET 183
  56. #define IGEP_SYSBOOT_MASK 0x1f
  57. #define IGEP_SYSBOOT_NAND 0x0f
  58. #define IGEP_SYSBOOT_ONENAND 0x10
  59. /*
  60. * IGEP2 Hardware Revision Table
  61. *
  62. * --------------------------------------------------------------------------
  63. * | Id. | Hw Rev. | HW0 (28) | WIFI_NPD | WIFI_NRESET | BT_NRESET |
  64. * --------------------------------------------------------------------------
  65. * | 0 | B | high | gpio94 | gpio95 | - |
  66. * | 0 | B/C (B-compatible) | high | gpio94 | gpio95 | gpio137 |
  67. * | 1 | C | low | gpio138 | gpio139 | gpio137 |
  68. * --------------------------------------------------------------------------
  69. */
  70. #define IGEP2_BOARD_HWREV_B 0
  71. #define IGEP2_BOARD_HWREV_C 1
  72. #define IGEP3_BOARD_HWREV 2
  73. static u8 hwrev;
  74. static void __init igep2_get_revision(void)
  75. {
  76. u8 ret;
  77. if (machine_is_igep0030()) {
  78. hwrev = IGEP3_BOARD_HWREV;
  79. return;
  80. }
  81. omap_mux_init_gpio(IGEP2_GPIO_LED1_RED, OMAP_PIN_INPUT);
  82. if (gpio_request_one(IGEP2_GPIO_LED1_RED, GPIOF_IN, "GPIO_HW0_REV")) {
  83. pr_warning("IGEP2: Could not obtain gpio GPIO_HW0_REV\n");
  84. pr_err("IGEP2: Unknown Hardware Revision\n");
  85. return;
  86. }
  87. ret = gpio_get_value(IGEP2_GPIO_LED1_RED);
  88. if (ret == 0) {
  89. pr_info("IGEP2: Hardware Revision C (B-NON compatible)\n");
  90. hwrev = IGEP2_BOARD_HWREV_C;
  91. } else if (ret == 1) {
  92. pr_info("IGEP2: Hardware Revision B/C (B compatible)\n");
  93. hwrev = IGEP2_BOARD_HWREV_B;
  94. } else {
  95. pr_err("IGEP2: Unknown Hardware Revision\n");
  96. hwrev = -1;
  97. }
  98. gpio_free(IGEP2_GPIO_LED1_RED);
  99. }
  100. #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
  101. defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) || \
  102. defined(CONFIG_MTD_NAND_OMAP2) || \
  103. defined(CONFIG_MTD_NAND_OMAP2_MODULE)
  104. #define ONENAND_MAP 0x20000000
  105. /* NAND04GR4E1A ( x2 Flash built-in COMBO POP MEMORY )
  106. * Since the device is equipped with two DataRAMs, and two-plane NAND
  107. * Flash memory array, these two component enables simultaneous program