| 12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394 | /* * Hardware modules present on the OMAP44xx chips * * Copyright (C) 2009-2012 Texas Instruments, Inc. * Copyright (C) 2009-2010 Nokia Corporation * * Paul Walmsley * Benoit Cousson * * This file is automatically generated from the OMAP hardware databases. * We respectfully ask that any modifications to this file be coordinated * with the public linux-omap@vger.kernel.org mailing list and the * authors above to ensure that the autogeneration scripts are kept * up-to-date with the file contents. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */#include <linux/io.h>#include <linux/platform_data/gpio-omap.h>#include <linux/power/smartreflex.h>#include <linux/platform_data/omap_ocp2scp.h>#include <linux/i2c-omap.h>#include <linux/omap-dma.h>#include <linux/platform_data/spi-omap2-mcspi.h>#include <linux/platform_data/asoc-ti-mcbsp.h>#include <linux/platform_data/iommu-omap.h>#include <plat/dmtimer.h>#include "omap_hwmod.h"#include "omap_hwmod_common_data.h"#include "cm1_44xx.h"#include "cm2_44xx.h"#include "prm44xx.h"#include "prm-regbits-44xx.h"#include "i2c.h"#include "mmc.h"#include "wd_timer.h"/* Base offset for all OMAP4 interrupts external to MPUSS */#define OMAP44XX_IRQ_GIC_START	32/* Base offset for all OMAP4 dma requests */#define OMAP44XX_DMA_REQ_START	1/* * IP blocks *//* * 'c2c_target_fw' class * instance(s): c2c_target_fw */static struct omap_hwmod_class omap44xx_c2c_target_fw_hwmod_class = {	.name	= "c2c_target_fw",};/* c2c_target_fw */static struct omap_hwmod omap44xx_c2c_target_fw_hwmod = {	.name		= "c2c_target_fw",	.class		= &omap44xx_c2c_target_fw_hwmod_class,	.clkdm_name	= "d2d_clkdm",	.prcm = {		.omap4 = {			.clkctrl_offs = OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET,			.context_offs = OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET,		},	},};/* * 'dmm' class * instance(s): dmm */static struct omap_hwmod_class omap44xx_dmm_hwmod_class = {	.name	= "dmm",};/* dmm */static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = {	{ .irq = 113 + OMAP44XX_IRQ_GIC_START },	{ .irq = -1 }};static struct omap_hwmod omap44xx_dmm_hwmod = {	.name		= "dmm",	.class		= &omap44xx_dmm_hwmod_class,	.clkdm_name	= "l3_emif_clkdm",	.mpu_irqs	= omap44xx_dmm_irqs,	.prcm = {
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