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waterDataPreprocessing
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externalListeningThread
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commandProcessing.h

commandProcessing.h 2.4 KB
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  1. /*
    2. 

  2.  * Copyright 2005-2010 Analog Devices Inc.
    3. 

  3.  *
    4. 

  4.  * Licensed under the GPL-2 or later
    5. 

  5.  */
    6. 

  6. 

  7. #ifndef _CDEF_BF532_H
    8. 

  8. #define _CDEF_BF532_H
    9. 

  9. 

  10. /* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */
    11. 

  11. #define bfin_read_PLL_CTL()                  bfin_read16(PLL_CTL)
    12. 

  12. #define bfin_read_PLL_STAT()                 bfin_read16(PLL_STAT)
    13. 

  13. #define bfin_write_PLL_STAT(val)             bfin_write16(PLL_STAT,val)
    14. 

  14. #define bfin_read_PLL_LOCKCNT()              bfin_read16(PLL_LOCKCNT)
    15. 

  15. #define bfin_write_PLL_LOCKCNT(val)          bfin_write16(PLL_LOCKCNT,val)
    16. 

  16. #define bfin_read_CHIPID()                   bfin_read32(CHIPID)
    17. 

  17. #define bfin_read_PLL_DIV()                  bfin_read16(PLL_DIV)
    18. 

  18. #define bfin_write_PLL_DIV(val)              bfin_write16(PLL_DIV,val)
    19. 

  19. #define bfin_read_VR_CTL()                   bfin_read16(VR_CTL)
    20. 

  20. 

  21. /* System Interrupt Controller (0xFFC0 0C00-0xFFC0 0FFF) */
    22. 

  22. #define bfin_read_SWRST()                    bfin_read16(SWRST)
    23. 

  23. #define bfin_write_SWRST(val)                bfin_write16(SWRST,val)
    24. 

  24. #define bfin_read_SYSCR()                    bfin_read16(SYSCR)
    25. 

  25. #define bfin_write_SYSCR(val)                bfin_write16(SYSCR,val)
    26. 

  26. #define bfin_read_SIC_IAR0()                 bfin_read32(SIC_IAR0)
    27. 

  27. #define bfin_write_SIC_IAR0(val)             bfin_write32(SIC_IAR0,val)
    28. 

  28. #define bfin_read_SIC_IAR1()                 bfin_read32(SIC_IAR1)
    29. 

  29. #define bfin_write_SIC_IAR1(val)             bfin_write32(SIC_IAR1,val)
    30. 

  30. #define bfin_read_SIC_IAR2()                 bfin_read32(SIC_IAR2)
    31. 

  31. #define bfin_write_SIC_IAR2(val)             bfin_write32(SIC_IAR2,val)
    32. 

  32. #define bfin_read_SIC_IAR3()                 bfin_read32(SIC_IAR3)
    33. 

  33. #define bfin_write_SIC_IAR3(val)             bfin_write32(SIC_IAR3,val)
    34. 

  34. #define bfin_read_SIC_IMASK()                bfin_read32(SIC_IMASK)
    35. 

  35. #define bfin_write_SIC_IMASK(val)            bfin_write32(SIC_IMASK,val)
    36. 

  36. #define bfin_read_SIC_ISR()                  bfin_read32(SIC_ISR)
    37. 

  37. #define bfin_write_SIC_ISR(val)              bfin_write32(SIC_ISR,val)
    38. 

  38. #define bfin_read_SIC_IWR()                  bfin_read32(SIC_IWR)
    39. 

  39. #define bfin_write_SIC_IWR(val)              bfin_write32(SIC_IWR,val)
    40. 

  40. 

  41. /* Watchdog Timer (0xFFC0 1000-0xFFC0 13FF) */
    42. 

  42. #define bfin_read_WDOG_CTL()                 bfin_read16(WDOG_CTL)
    43. 

  43. #define bfin_write_WDOG_CTL(val)             bfin_write16(WDOG_CTL,val)
    44. 

  44. #define bfin_read_WDOG_CNT()                 bfin_read32(WDOG_CNT)
    45. 

  45. #define bfin_write_WDOG_CNT(val)             bfin_write32(WDOG_CNT,val)
    46. 

  46. #define bfin_read_WDOG_STAT()                bfin_read32(WDOG_STAT)
    47.