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waterDataStatistics
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alarmProcessingDataCalculation
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synchronousMemoryDatabase.h

synchronousMemoryDatabase.h 7.8 KB
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  1. /*
    2. 

  2.  * Copyright 2005-2010 Analog Devices Inc.
    3. 

  3.  *
    4. 

  4.  * Licensed under the GPL-2 or later
    5. 

  5.  */
    6. 

  6. 

  7. #ifndef _CDEF_BF534_H
    8. 

  8. #define _CDEF_BF534_H
    9. 

  9. 

  10. /* Clock and System Control	(0xFFC00000 - 0xFFC000FF)								*/
    11. 

  11. #define bfin_read_PLL_CTL()                  bfin_read16(PLL_CTL)
    12. 

  12. #define bfin_read_PLL_DIV()                  bfin_read16(PLL_DIV)
    13. 

  13. #define bfin_write_PLL_DIV(val)              bfin_write16(PLL_DIV,val)
    14. 

  14. #define bfin_read_VR_CTL()                   bfin_read16(VR_CTL)
    15. 

  15. #define bfin_read_PLL_STAT()                 bfin_read16(PLL_STAT)
    16. 

  16. #define bfin_write_PLL_STAT(val)             bfin_write16(PLL_STAT,val)
    17. 

  17. #define bfin_read_PLL_LOCKCNT()              bfin_read16(PLL_LOCKCNT)
    18. 

  18. #define bfin_write_PLL_LOCKCNT(val)          bfin_write16(PLL_LOCKCNT,val)
    19. 

  19. #define bfin_read_CHIPID()                   bfin_read32(CHIPID)
    20. 

  20. 

  21. /* System Interrupt Controller (0xFFC00100 - 0xFFC001FF)							*/
    22. 

  22. #define bfin_read_SWRST()                    bfin_read16(SWRST)
    23. 

  23. #define bfin_write_SWRST(val)                bfin_write16(SWRST,val)
    24. 

  24. #define bfin_read_SYSCR()                    bfin_read16(SYSCR)
    25. 

  25. #define bfin_write_SYSCR(val)                bfin_write16(SYSCR,val)
    26. 

  26. #define bfin_read_SIC_RVECT()                bfin_read32(SIC_RVECT)
    27. 

  27. #define bfin_write_SIC_RVECT(val)            bfin_write32(SIC_RVECT,val)
    28. 

  28. #define bfin_read_SIC_IMASK()                bfin_read32(SIC_IMASK)
    29. 

  29. #define bfin_write_SIC_IMASK(val)            bfin_write32(SIC_IMASK,val)
    30. 

  30. #define bfin_read_SIC_IAR0()                 bfin_read32(SIC_IAR0)
    31. 

  31. #define bfin_write_SIC_IAR0(val)             bfin_write32(SIC_IAR0,val)
    32. 

  32. #define bfin_read_SIC_IAR1()                 bfin_read32(SIC_IAR1)
    33. 

  33. #define bfin_write_SIC_IAR1(val)             bfin_write32(SIC_IAR1,val)
    34. 

  34. #define bfin_read_SIC_IAR2()                 bfin_read32(SIC_IAR2)
    35. 

  35. #define bfin_write_SIC_IAR2(val)             bfin_write32(SIC_IAR2,val)
    36. 

  36. #define bfin_read_SIC_IAR3()                 bfin_read32(SIC_IAR3)
    37. 

  37. #define bfin_write_SIC_IAR3(val)             bfin_write32(SIC_IAR3,val)
    38. 

  38. #define bfin_read_SIC_ISR()                  bfin_read32(SIC_ISR)
    39. 

  39. #define bfin_write_SIC_ISR(val)              bfin_write32(SIC_ISR,val)
    40. 

  40. #define bfin_read_SIC_IWR()                  bfin_read32(SIC_IWR)
    41. 

  41. #define bfin_write_SIC_IWR(val)              bfin_write32(SIC_IWR,val)
    42. 

  42. 

  43. /* Watchdog Timer		(0xFFC00200 - 0xFFC002FF)									*/
    44. 

  44. #define bfin_read_WDOG_CTL()                 bfin_read16(WDOG_CTL)
    45. 

  45. #define bfin_write_WDOG_CTL(val)             bfin_write16(WDOG_CTL,val)
    46. 

  46. #define bfin_read_WDOG_CNT()                 bfin_read32(WDOG_CNT)
    47. 

  47. #define bfin_write_WDOG_CNT(val)             bfin_write32(WDOG_CNT,val)
    48. 

  48. #define bfin_read_WDOG_STAT()                bfin_read32(WDOG_STAT)
    49. 

  49. #define bfin_write_WDOG_STAT(val)            bfin_write32(WDOG_STAT,val)
    50. 

  50. 

  51. /* Real Time Clock		(0xFFC00300 - 0xFFC003FF)									*/
    52. 

  52. #define bfin_read_RTC_STAT()                 bfin_read32(RTC_STAT)
    53. 

  53. #define bfin_write_RTC_STAT(val)             bfin_write32(RTC_STAT,val)
    54. 

  54. #define bfin_read_RTC_ICTL()                 bfin_read16(RTC_ICTL)
    55. 

  55. #define bfin_write_RTC_ICTL(val)             bfin_write16(RTC_ICTL,val)
    56. 

  56. #define bfin_read_RTC_ISTAT()                bfin_read16(RTC_ISTAT)
    57. 

  57. #define bfin_write_RTC_ISTAT(val)            bfin_write16(RTC_ISTAT,val)
    58. 

  58. #define bfin_read_RTC_SWCNT()                bfin_read16(RTC_SWCNT)
    59. 

  59. #define bfin_write_RTC_SWCNT(val)            bfin_write16(RTC_SWCNT,val)
    60. 

  60. #define bfin_read_RTC_ALARM()                bfin_read32(RTC_ALARM)
    61. 

  61. #define bfin_write_RTC_ALARM(val)            bfin_write32(RTC_ALARM,val)
    62. 

  62. #define bfin_read_RTC_FAST()                 bfin_read16(RTC_FAST)
    63. 

  63. #define bfin_write_RTC_FAST(val)             bfin_write16(RTC_FAST,val)
    64. 

  64. #define bfin_read_RTC_PREN()                 bfin_read16(RTC_PREN)
    65. 

  65. #define bfin_write_RTC_PREN(val)             bfin_write16(RTC_PREN,val)
    66. 

  66. 

  67. /* UART0 Controller		(0xFFC00400 - 0xFFC004FF)									*/
    68. 

  68. #define bfin_read_UART0_THR()                bfin_read16(UART0_THR)
    69. 

  69. #define bfin_write_UART0_THR(val)            bfin_write16(UART0_THR,val)
    70. 

  70. #define bfin_read_UART0_RBR()                bfin_read16(UART0_RBR)
    71. 

  71. #define bfin_write_UART0_RBR(val)            bfin_write16(UART0_RBR,val)
    72. 

  72. #define bfin_read_UART0_DLL()                bfin_read16(UART0_DLL)
    73. 

  73. #define bfin_write_UART0_DLL(val)            bfin_write16(UART0_DLL,val)
    74. 

  74. #define bfin_read_UART0_IER()                bfin_read16(UART0_IER)
    75. 

  75. #define bfin_write_UART0_IER(val)            bfin_write16(UART0_IER,val)
    76. 

  76. #define bfin_read_UART0_DLH()                bfin_read16(UART0_DLH)
    77. 

  77. #define bfin_write_UART0_DLH(val)            bfin_write16(UART0_DLH,val)
    78. 

  78. #define bfin_read_UART0_IIR()                bfin_read16(UART0_IIR)
    79. 

  79. #define bfin_write_UART0_IIR(val)            bfin_write16(UART0_IIR,val)
    80. 

  80. #define bfin_read_UART0_LCR()                bfin_read16(UART0_LCR)
    81. 

  81. #define bfin_write_UART0_LCR(val)            bfin_write16(UART0_LCR,val)
    82. 

  82. #define bfin_read_UART0_MCR()                bfin_read16(UART0_MCR)
    83. 

  83. #define bfin_write_UART0_MCR(val)            bfin_write16(UART0_MCR,val)
    84. 

  84. #define bfin_read_UART0_LSR()                bfin_read16(UART0_LSR)
    85. 

  85. #define bfin_write_UART0_LSR(val)            bfin_write16(UART0_LSR,val)
    86. 

  86. #define bfin_read_UART0_MSR()                bfin_read16(UART0_MSR)
    87. 

  87. #define bfin_write_UART0_MSR(val)            bfin_write16(UART0_MSR,val)
    88. 

  88. #define bfin_read_UART0_SCR()                bfin_read16(UART0_SCR)
    89. 

  89. #define bfin_write_UART0_SCR(val)            bfin_write16(UART0_SCR,val)
    90. 

  90. #define bfin_read_UART0_GCTL()               bfin_read16(UART0_GCTL)
    91. 

  91. #define bfin_write_UART0_GCTL(val)           bfin_write16(UART0_GCTL,val)
    92. 

  92. 

  93. /* SPI Controller		(0xFFC00500 - 0xFFC005FF)									*/
    94. 

  94. #define bfin_read_SPI_CTL()                  bfin_read16(SPI_CTL)
    95. 

  95. #define bfin_write_SPI_CTL(val)              bfin_write16(SPI_CTL,val)
    96. 

  96. #define bfin_read_SPI_FLG()                  bfin_read16(SPI_FLG)
    97. 

  97. #define bfin_write_SPI_FLG(val)              bfin_write16(SPI_FLG,val)
    98. 

  98. #define bfin_read_SPI_STAT()                 bfin_read16(SPI_STAT)
    99. 

  99. #define bfin_write_SPI_STAT(val)             bfin_write16(SPI_STAT,val)
    100. 

  100. #define bfin_read_SPI_TDBR()                 bfin_read16(SPI_TDBR)
    101. 

  101. #define bfin_write_SPI_TDBR(val)             bfin_write16(SPI_TDBR,val)
    102. 

  102. #define bfin_read_SPI_RDBR()                 bfin_read16(SPI_RDBR)
    103. 

  103. #define bfin_write_SPI_RDBR(val)             bfin_write16(SPI_RDBR,val)
    104. 

  104. #define bfin_read_SPI_BAUD()                 bfin_read16(SPI_BAUD)
    105. 

  105. #define bfin_write_SPI_BAUD(val)             bfin_write16(SPI_BAUD,val)
    106. 

  106. #define bfin_read_SPI_SHADOW()               bfin_read16(SPI_SHADOW)
    107. 

  107. #define bfin_write_SPI_SHADOW(val)           bfin_write16(SPI_SHADOW,val)
    108. 

  108. 

  109. /* TIMER0-7 Registers		(0xFFC00600 - 0xFFC006FF)								*/
    110. 

  110. #define bfin_read_TIMER0_CONFIG()            bfin_read16(TIMER0_CONFIG)
    111. 

  111. #define bfin_write_TIMER0_CONFIG(val)        bfin_write16(TIMER0_CONFIG,val)
    112. 

  112. #define bfin_read_TIMER0_COUNTER()           bfin_read32(TIMER0_COUNTER)
    113. 

  113. #define bfin_write_TIMER0_COUNTER(val)       bfin_write32(TIMER0_COUNTER,val)
    114. 

  114. #define bfin_read_TIMER0_PERIOD()            bfin_read32(TIMER0_PERIOD)
    115. 

  115. #define bfin_write_TIMER0_PERIOD(val)        bfin_write32(TIMER0_PERIOD,val)
    116. 

  116. #define bfin_read_TIMER0_WIDTH()             bfin_read32(TIMER0_WIDTH)
    117. 

  117. #define bfin_write_TIMER0_WIDTH(val)         bfin_write32(TIMER0_WIDTH,val)
    118. 

  118. 

  119. #define bfin_read_TIMER1_CONFIG()            bfin_read16(TIMER1_CONFIG)
    120. 

  120. #define bfin_write_TIMER1_CONFIG(val)        bfin_write16(TIMER1_CONFIG,val)
    121. 

  121. #define bfin_read_TIMER1_COUNTER()           bfin_read32(TIMER1_COUNTER)
    122. 

  122. #define bfin_write_TIMER1_COUNTER(val)       bfin_write32(TIMER1_COUNTER,val)
    123. 

  123. #define bfin_read_TIMER1_PERIOD()            bfin_read32(TIMER1_PERIOD)
    124. 

  124. #define bfin_write_TIMER1_PERIOD(val)        bfin_write32(TIMER1_PERIOD,val)
    125. 

  125. #define bfin_read_TIMER1_WIDTH()             bfin_read32(TIMER1_WIDTH)
    126. 

  126. #define bfin_write_TIMER1_WIDTH(val)         bfin_write32(TIMER1_WIDTH,val)
    127. 

  127. 

  128. #define bfin_read_TIMER2_CONFIG()            bfin_read16(TIMER2_CONFIG)
    129. 

  129. #define bfin_write_TIMER2_CONFIG(val)        bfin_write16(TIMER2_CONFIG,val)
    130.