rtuDataOperation.c 4.6 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/timer.c
  3. *
  4. * OMAP2 GP timer support.
  5. *
  6. * Copyright (C) 2009 Nokia Corporation
  7. *
  8. * Update to use new clocksource/clockevent layers
  9. * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
  10. * Copyright (C) 2007 MontaVista Software, Inc.
  11. *
  12. * Original driver:
  13. * Copyright (C) 2005 Nokia Corporation
  14. * Author: Paul Mundt <paul.mundt@nokia.com>
  15. * Juha Yrjölä <juha.yrjola@nokia.com>
  16. * OMAP Dual-mode timer framework support by Timo Teras
  17. *
  18. * Some parts based off of TI's 24xx code:
  19. *
  20. * Copyright (C) 2004-2009 Texas Instruments, Inc.
  21. *
  22. * Roughly modelled after the OMAP1 MPU timer code.
  23. * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  24. *
  25. * This file is subject to the terms and conditions of the GNU General Public
  26. * License. See the file "COPYING" in the main directory of this archive
  27. * for more details.
  28. */
  29. #include <linux/init.h>
  30. #include <linux/time.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/err.h>
  33. #include <linux/clk.h>
  34. #include <linux/delay.h>
  35. #include <linux/irq.h>
  36. #include <linux/clocksource.h>
  37. #include <linux/clockchips.h>
  38. #include <linux/slab.h>
  39. #include <linux/of.h>
  40. #include <linux/of_address.h>
  41. #include <linux/of_irq.h>
  42. #include <linux/platform_device.h>
  43. #include <linux/platform_data/dmtimer-omap.h>
  44. #include <asm/mach/time.h>
  45. #include <asm/smp_twd.h>
  46. #include <asm/sched_clock.h>
  47. #include <asm/arch_timer.h>
  48. #include "omap_hwmod.h"
  49. #include "omap_device.h"
  50. #include <plat/counter-32k.h>
  51. #include <plat/dmtimer.h>
  52. #include "omap-pm.h"
  53. #include "soc.h"
  54. #include "common.h"
  55. #include "powerdomain.h"
  56. /* Parent clocks, eventually these will come from the clock framework */
  57. #define OMAP2_MPU_SOURCE "sys_ck"
  58. #define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE
  59. #define OMAP4_MPU_SOURCE "sys_clkin_ck"
  60. #define OMAP2_32K_SOURCE "func_32k_ck"
  61. #define OMAP3_32K_SOURCE "omap_32k_fck"
  62. #define OMAP4_32K_SOURCE "sys_32k_ck"
  63. #define REALTIME_COUNTER_BASE 0x48243200
  64. #define INCREMENTER_NUMERATOR_OFFSET 0x10
  65. #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x14
  66. #define NUMERATOR_DENUMERATOR_MASK 0xfffff000
  67. /* Clockevent code */
  68. static struct omap_dm_timer clkev;
  69. static struct clock_event_device clockevent_gpt;
  70. static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
  71. {
  72. struct clock_event_device *evt = &clockevent_gpt;
  73. __omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW);
  74. evt->event_handler(evt);
  75. return IRQ_HANDLED;
  76. }
  77. static struct irqaction omap2_gp_timer_irq = {
  78. .name = "gp_timer",
  79. .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  80. .handler = omap2_gp_timer_interrupt,
  81. };
  82. static int omap2_gp_timer_set_next_event(unsigned long cycles,
  83. struct clock_event_device *evt)
  84. {
  85. __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST,
  86. 0xffffffff - cycles, OMAP_TIMER_POSTED);
  87. return 0;
  88. }
  89. static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
  90. struct clock_event_device *evt)
  91. {
  92. u32 period;
  93. __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate);
  94. switch (mode) {
  95. case CLOCK_EVT_MODE_PERIODIC:
  96. period = clkev.rate / HZ;
  97. period -= 1;
  98. /* Looks like we need to first set the load value separately */
  99. __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG,
  100. 0xffffffff - period, OMAP_TIMER_POSTED);
  101. __omap_dm_timer_load_start(&clkev,
  102. OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
  103. 0xffffffff - period, OMAP_TIMER_POSTED);
  104. break;
  105. case CLOCK_EVT_MODE_ONESHOT:
  106. break;
  107. case CLOCK_EVT_MODE_UNUSED:
  108. case CLOCK_EVT_MODE_SHUTDOWN:
  109. case CLOCK_EVT_MODE_RESUME:
  110. break;
  111. }
  112. }
  113. static struct clock_event_device clockevent_gpt = {
  114. .name = "gp_timer",
  115. .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
  116. .shift = 32,
  117. .rating = 300,
  118. .set_next_event = omap2_gp_timer_set_next_event,
  119. .set_mode = omap2_gp_timer_set_mode,
  120. };
  121. static struct property device_disabled = {
  122. .name = "status",
  123. .length = sizeof("disabled"),
  124. .value = "disabled",
  125. };
  126. static struct of_device_id omap_timer_match[] __initdata = {
  127. { .compatible = "ti,omap2-timer", },
  128. { }
  129. };
  130. /**
  131. * omap_get_timer_dt - get a timer using device-tree
  132. * @match - device-tree match structure for matching a device type
  133. * @property - optional timer property to match
  134. *
  135. * Helper function to get a timer during early boot using device-tree for use
  136. * as kernel system timer. Optionally, the property argument can be used to
  137. * select a timer with a specific property. Once a timer is found then mark
  138. * the timer node in device-tree as disabled, to prevent the kernel from
  139. * registering this timer as a platform device and so no one else can use it.
  140. */
  141. static struct device_node * __init omap_get_timer_dt(struct of_device_id *match,