statisticsMemoryDefinition.c 6.1 KB

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  1. /*
  2. * OMAP3 powerdomain definitions
  3. *
  4. * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc.
  5. * Copyright (C) 2007-2011 Nokia Corporation
  6. *
  7. * Paul Walmsley, Jouni Högander
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/bug.h>
  16. #include "soc.h"
  17. #include "powerdomain.h"
  18. #include "powerdomains2xxx_3xxx_data.h"
  19. #include "prcm-common.h"
  20. #include "prm2xxx_3xxx.h"
  21. #include "prm-regbits-34xx.h"
  22. #include "cm2xxx_3xxx.h"
  23. #include "cm-regbits-34xx.h"
  24. /*
  25. * 34XX-specific powerdomains, dependencies
  26. */
  27. /*
  28. * Powerdomains
  29. */
  30. static struct powerdomain iva2_pwrdm = {
  31. .name = "iva2_pwrdm",
  32. .prcm_offs = OMAP3430_IVA2_MOD,
  33. .pwrsts = PWRSTS_OFF_RET_ON,
  34. .pwrsts_logic_ret = PWRSTS_OFF_RET,
  35. .banks = 4,
  36. .pwrsts_mem_ret = {
  37. [0] = PWRSTS_OFF_RET,
  38. [1] = PWRSTS_OFF_RET,
  39. [2] = PWRSTS_OFF_RET,
  40. [3] = PWRSTS_OFF_RET,
  41. },
  42. .pwrsts_mem_on = {
  43. [0] = PWRSTS_ON,
  44. [1] = PWRSTS_ON,
  45. [2] = PWRSTS_OFF_ON,
  46. [3] = PWRSTS_ON,
  47. },
  48. .voltdm = { .name = "mpu_iva" },
  49. };
  50. static struct powerdomain mpu_3xxx_pwrdm = {
  51. .name = "mpu_pwrdm",
  52. .prcm_offs = MPU_MOD,
  53. .pwrsts = PWRSTS_OFF_RET_ON,
  54. .pwrsts_logic_ret = PWRSTS_OFF_RET,
  55. .flags = PWRDM_HAS_MPU_QUIRK,
  56. .banks = 1,
  57. .pwrsts_mem_ret = {
  58. [0] = PWRSTS_OFF_RET,
  59. },
  60. .pwrsts_mem_on = {
  61. [0] = PWRSTS_OFF_ON,
  62. },
  63. .voltdm = { .name = "mpu_iva" },
  64. };
  65. static struct powerdomain mpu_am35x_pwrdm = {
  66. .name = "mpu_pwrdm",
  67. .prcm_offs = MPU_MOD,
  68. .pwrsts = PWRSTS_ON,
  69. .pwrsts_logic_ret = PWRSTS_ON,
  70. .flags = PWRDM_HAS_MPU_QUIRK,
  71. .banks = 1,
  72. .pwrsts_mem_ret = {
  73. [0] = PWRSTS_ON,
  74. },
  75. .pwrsts_mem_on = {
  76. [0] = PWRSTS_ON,
  77. },
  78. .voltdm = { .name = "mpu_iva" },
  79. };
  80. /*
  81. * The USBTLL Save-and-Restore mechanism is broken on
  82. * 3430s up to ES3.0 and 3630ES1.0. Hence this feature
  83. * needs to be disabled on these chips.
  84. * Refer: 3430 errata ID i459 and 3630 errata ID i579
  85. *
  86. * Note: setting the SAR flag could help for errata ID i478
  87. * which applies to 3430 <= ES3.1, but since the SAR feature
  88. * is broken, do not use it.
  89. */
  90. static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
  91. .name = "core_pwrdm",
  92. .prcm_offs = CORE_MOD,
  93. .pwrsts = PWRSTS_OFF_RET_ON,
  94. .pwrsts_logic_ret = PWRSTS_OFF_RET,
  95. .banks = 2,
  96. .pwrsts_mem_ret = {
  97. [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */
  98. [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */
  99. },
  100. .pwrsts_mem_on = {
  101. [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
  102. [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
  103. },
  104. .voltdm = { .name = "core" },
  105. };
  106. static struct powerdomain core_3xxx_es3_1_pwrdm = {
  107. .name = "core_pwrdm",
  108. .prcm_offs = CORE_MOD,
  109. .pwrsts = PWRSTS_OFF_RET_ON,
  110. .pwrsts_logic_ret = PWRSTS_OFF_RET,
  111. /*
  112. * Setting the SAR flag for errata ID i478 which applies
  113. * to 3430 <= ES3.1
  114. */
  115. .flags = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
  116. .banks = 2,
  117. .pwrsts_mem_ret = {
  118. [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */
  119. [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */
  120. },
  121. .pwrsts_mem_on = {
  122. [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
  123. [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
  124. },
  125. .voltdm = { .name = "core" },
  126. };
  127. static struct powerdomain core_am35x_pwrdm = {
  128. .name = "core_pwrdm",
  129. .prcm_offs = CORE_MOD,
  130. .pwrsts = PWRSTS_ON,
  131. .pwrsts_logic_ret = PWRSTS_ON,
  132. .banks = 2,
  133. .pwrsts_mem_ret = {
  134. [0] = PWRSTS_ON, /* MEM1RETSTATE */
  135. [1] = PWRSTS_ON, /* MEM2RETSTATE */
  136. },
  137. .pwrsts_mem_on = {
  138. [0] = PWRSTS_ON, /* MEM1ONSTATE */
  139. [1] = PWRSTS_ON, /* MEM2ONSTATE */
  140. },
  141. .voltdm = { .name = "core" },
  142. };
  143. static struct powerdomain dss_pwrdm = {
  144. .name = "dss_pwrdm",
  145. .prcm_offs = OMAP3430_DSS_MOD,
  146. .pwrsts = PWRSTS_OFF_RET_ON,
  147. .pwrsts_logic_ret = PWRSTS_RET,
  148. .banks = 1,
  149. .pwrsts_mem_ret = {
  150. [0] = PWRSTS_RET, /* MEMRETSTATE */
  151. },
  152. .pwrsts_mem_on = {
  153. [0] = PWRSTS_ON, /* MEMONSTATE */
  154. },
  155. .voltdm = { .name = "core" },
  156. };
  157. static struct powerdomain dss_am35x_pwrdm = {
  158. .name = "dss_pwrdm",
  159. .prcm_offs = OMAP3430_DSS_MOD,
  160. .pwrsts = PWRSTS_ON,
  161. .pwrsts_logic_ret = PWRSTS_ON,
  162. .banks = 1,
  163. .pwrsts_mem_ret = {
  164. [0] = PWRSTS_ON, /* MEMRETSTATE */
  165. },
  166. .pwrsts_mem_on = {
  167. [0] = PWRSTS_ON, /* MEMONSTATE */
  168. },
  169. .voltdm = { .name = "core" },
  170. };
  171. /*
  172. * Although the 34XX TRM Rev K Table 4-371 notes that retention is a
  173. * possible SGX powerstate, the SGX device itself does not support
  174. * retention.
  175. */
  176. static struct powerdomain sgx_pwrdm = {
  177. .name = "sgx_pwrdm",
  178. .prcm_offs = OMAP3430ES2_SGX_MOD,
  179. /* XXX This is accurate for 3430 SGX, but what about GFX? */
  180. .pwrsts = PWRSTS_OFF_ON,
  181. .pwrsts_logic_ret = PWRSTS_RET,
  182. .banks = 1,
  183. .pwrsts_mem_ret = {
  184. [0] = PWRSTS_RET, /* MEMRETSTATE */
  185. },
  186. .pwrsts_mem_on = {
  187. [0] = PWRSTS_ON, /* MEMONSTATE */
  188. },
  189. .voltdm = { .name = "core" },
  190. };
  191. static struct powerdomain sgx_am35x_pwrdm = {
  192. .name = "sgx_pwrdm",
  193. .prcm_offs = OMAP3430ES2_SGX_MOD,
  194. .pwrsts = PWRSTS_ON,
  195. .pwrsts_logic_ret = PWRSTS_ON,
  196. .banks = 1,
  197. .pwrsts_mem_ret = {
  198. [0] = PWRSTS_ON, /* MEMRETSTATE */
  199. },
  200. .pwrsts_mem_on = {
  201. [0] = PWRSTS_ON, /* MEMONSTATE */
  202. },
  203. .voltdm = { .name = "core" },
  204. };
  205. static struct powerdomain cam_pwrdm = {
  206. .name = "cam_pwrdm",
  207. .prcm_offs = OMAP3430_CAM_MOD,
  208. .pwrsts = PWRSTS_OFF_RET_ON,
  209. .pwrsts_logic_ret = PWRSTS_RET,
  210. .banks = 1,
  211. .pwrsts_mem_ret = {
  212. [0] = PWRSTS_RET, /* MEMRETSTATE */
  213. },
  214. .pwrsts_mem_on = {
  215. [0] = PWRSTS_ON, /* MEMONSTATE */
  216. },
  217. .voltdm = { .name = "core" },
  218. };
  219. static struct powerdomain per_pwrdm = {
  220. .name = "per_pwrdm",
  221. .prcm_offs = OMAP3430_PER_MOD,
  222. .pwrsts = PWRSTS_OFF_RET_ON,
  223. .pwrsts_logic_ret = PWRSTS_OFF_RET,
  224. .banks = 1,
  225. .pwrsts_mem_ret = {
  226. [0] = PWRSTS_RET, /* MEMRETSTATE */
  227. },
  228. .pwrsts_mem_on = {
  229. [0] = PWRSTS_ON, /* MEMONSTATE */
  230. },
  231. .voltdm = { .name = "core" },
  232. };
  233. static struct powerdomain per_am35x_pwrdm = {
  234. .name = "per_pwrdm",
  235. .prcm_offs = OMAP3430_PER_MOD,