synchronousMemoryDatabase.c 1.1 KB

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  1. /*
  2. * linux/arch/alpha/kernel/err_titan.c
  3. *
  4. * Copyright (C) 2000 Jeff Wiedemeier (Compaq Computer Corporation)
  5. *
  6. * Error handling code supporting TITAN systems
  7. */
  8. #include <linux/init.h>
  9. #include <linux/pci.h>
  10. #include <linux/sched.h>
  11. #include <asm/io.h>
  12. #include <asm/core_titan.h>
  13. #include <asm/hwrpb.h>
  14. #include <asm/smp.h>
  15. #include <asm/err_common.h>
  16. #include <asm/err_ev6.h>
  17. #include <asm/irq_regs.h>
  18. #include "err_impl.h"
  19. #include "proto.h"
  20. static int
  21. titan_parse_c_misc(u64 c_misc, int print)
  22. {
  23. #ifdef CONFIG_VERBOSE_MCHECK
  24. char *src;
  25. int nxs = 0;
  26. #endif
  27. int status = MCHK_DISPOSITION_REPORT;
  28. #define TITAN__CCHIP_MISC__NXM (1UL << 28)
  29. #define TITAN__CCHIP_MISC__NXS__S (29)
  30. #define TITAN__CCHIP_MISC__NXS__M (0x7)
  31. if (!(c_misc & TITAN__CCHIP_MISC__NXM))
  32. return MCHK_DISPOSITION_UNKNOWN_ERROR;
  33. #ifdef CONFIG_VERBOSE_MCHECK
  34. if (!print)
  35. return status;
  36. nxs = EXTRACT(c_misc, TITAN__CCHIP_MISC__NXS);
  37. switch(nxs) {
  38. case 0: /* CPU 0 */
  39. case 1: /* CPU 1 */
  40. case 2: /* CPU 2 */
  41. case 3: /* CPU 3 */
  42. src = "CPU";
  43. /* num is already the CPU number */