| 12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091 | /* * arch/arm/mach-netx/include/mach/netx-regs.h * * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 * as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA */#ifndef __ASM_ARCH_NETX_REGS_H#define __ASM_ARCH_NETX_REGS_H/* offsets relative to the beginning of the io space */#define NETX_OFS_SYSTEM  0x00000#define NETX_OFS_MEMCR   0x00100#define NETX_OFS_DPMAS   0x03000#define NETX_OFS_GPIO    0x00800#define NETX_OFS_PIO     0x00900#define NETX_OFS_UART0   0x00a00#define NETX_OFS_UART1   0x00a40#define NETX_OFS_UART2   0x00a80#define NETX_OF_MIIMU    0x00b00#define NETX_OFS_SPI     0x00c00#define NETX_OFS_I2C     0x00d00#define NETX_OFS_SYSTIME 0x01100#define NETX_OFS_RTC     0x01200#define NETX_OFS_EXTBUS  0x03600#define NETX_OFS_LCD     0x04000#define NETX_OFS_USB     0x20000#define NETX_OFS_XMAC0   0x60000#define NETX_OFS_XMAC1   0x61000#define NETX_OFS_XMAC2   0x62000#define NETX_OFS_XMAC3   0x63000#define NETX_OFS_XMAC(no) (0x60000 + (no) * 0x1000)#define NETX_OFS_PFIFO   0x64000#define NETX_OFS_XPEC0   0x70000#define NETX_OFS_XPEC1   0x74000#define NETX_OFS_XPEC2   0x78000#define NETX_OFS_XPEC3   0x7c000#define NETX_OFS_XPEC(no) (0x70000 + (no) * 0x4000)#define NETX_OFS_VIC     0xff000/* physical addresses */#define NETX_PA_SYSTEM   (NETX_IO_PHYS + NETX_OFS_SYSTEM)#define NETX_PA_MEMCR    (NETX_IO_PHYS + NETX_OFS_MEMCR)#define NETX_PA_DPMAS    (NETX_IO_PHYS + NETX_OFS_DPMAS)#define NETX_PA_GPIO     (NETX_IO_PHYS + NETX_OFS_GPIO)#define NETX_PA_PIO      (NETX_IO_PHYS + NETX_OFS_PIO)#define NETX_PA_UART0    (NETX_IO_PHYS + NETX_OFS_UART0)#define NETX_PA_UART1    (NETX_IO_PHYS + NETX_OFS_UART1)#define NETX_PA_UART2    (NETX_IO_PHYS + NETX_OFS_UART2)#define NETX_PA_MIIMU    (NETX_IO_PHYS + NETX_OF_MIIMU)#define NETX_PA_SPI      (NETX_IO_PHYS + NETX_OFS_SPI)#define NETX_PA_I2C      (NETX_IO_PHYS + NETX_OFS_I2C)#define NETX_PA_SYSTIME  (NETX_IO_PHYS + NETX_OFS_SYSTIME)#define NETX_PA_RTC      (NETX_IO_PHYS + NETX_OFS_RTC)#define NETX_PA_EXTBUS   (NETX_IO_PHYS + NETX_OFS_EXTBUS)#define NETX_PA_LCD      (NETX_IO_PHYS + NETX_OFS_LCD)#define NETX_PA_USB      (NETX_IO_PHYS + NETX_OFS_USB)#define NETX_PA_XMAC0    (NETX_IO_PHYS + NETX_OFS_XMAC0)#define NETX_PA_XMAC1    (NETX_IO_PHYS + NETX_OFS_XMAC1)#define NETX_PA_XMAC2    (NETX_IO_PHYS + NETX_OFS_XMAC2)#define NETX_PA_XMAC3    (NETX_IO_PHYS + NETX_OFS_XMAC3)#define NETX_PA_XMAC(no) (NETX_IO_PHYS + NETX_OFS_XMAC(no))#define NETX_PA_PFIFO    (NETX_IO_PHYS + NETX_OFS_PFIFO)#define NETX_PA_XPEC0    (NETX_IO_PHYS + NETX_OFS_XPEC0)#define NETX_PA_XPEC1    (NETX_IO_PHYS + NETX_OFS_XPEC1)#define NETX_PA_XPEC2    (NETX_IO_PHYS + NETX_OFS_XPEC2)#define NETX_PA_XPEC3    (NETX_IO_PHYS + NETX_OFS_XPEC3)#define NETX_PA_XPEC(no) (NETX_IO_PHYS + NETX_OFS_XPEC(no))#define NETX_PA_VIC      (NETX_IO_PHYS + NETX_OFS_VIC)/* virtual addresses */#define NETX_VA_SYSTEM   (NETX_IO_VIRT + NETX_OFS_SYSTEM)#define NETX_VA_MEMCR    (NETX_IO_VIRT + NETX_OFS_MEMCR)#define NETX_VA_DPMAS    (NETX_IO_VIRT + NETX_OFS_DPMAS)#define NETX_VA_GPIO     (NETX_IO_VIRT + NETX_OFS_GPIO)#define NETX_VA_PIO      (NETX_IO_VIRT + NETX_OFS_PIO)#define NETX_VA_UART0    (NETX_IO_VIRT + NETX_OFS_UART0)#define NETX_VA_UART1    (NETX_IO_VIRT + NETX_OFS_UART1)#define NETX_VA_UART2    (NETX_IO_VIRT + NETX_OFS_UART2)
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