hiddenDangerAnalysis.h 3.2 KB

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  1. /*
  2. * Copyright 2007-2010 Analog Devices Inc.
  3. *
  4. * Licensed under the GPL-2 or later.
  5. */
  6. #ifndef _CDEF_BF522_H
  7. #define _CDEF_BF522_H
  8. /* Clock and System Control (0xFFC00000 - 0xFFC000FF) */
  9. #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
  10. #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
  11. #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val)
  12. #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
  13. #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
  14. #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val)
  15. #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
  16. #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val)
  17. #define bfin_read_CHIPID() bfin_read32(CHIPID)
  18. #define bfin_write_CHIPID(val) bfin_write32(CHIPID, val)
  19. /* System Interrupt Controller (0xFFC00100 - 0xFFC001FF) */
  20. #define bfin_read_SWRST() bfin_read16(SWRST)
  21. #define bfin_write_SWRST(val) bfin_write16(SWRST, val)
  22. #define bfin_read_SYSCR() bfin_read16(SYSCR)
  23. #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val)
  24. #define bfin_read_SIC_RVECT() bfin_read32(SIC_RVECT)
  25. #define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT, val)
  26. #define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
  27. #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val)
  28. #define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + (x << 6))
  29. #define bfin_write_SIC_IMASK(x, val) bfin_write32((SIC_IMASK0 + (x << 6)), val)
  30. #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
  31. #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val)
  32. #define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1)
  33. #define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1, val)
  34. #define bfin_read_SIC_IAR2() bfin_read32(SIC_IAR2)
  35. #define bfin_write_SIC_IAR2(val) bfin_write32(SIC_IAR2, val)
  36. #define bfin_read_SIC_IAR3() bfin_read32(SIC_IAR3)
  37. #define bfin_write_SIC_IAR3(val) bfin_write32(SIC_IAR3, val)
  38. #define bfin_read_SIC_ISR0() bfin_read32(SIC_ISR0)
  39. #define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0, val)
  40. #define bfin_read_SIC_ISR(x) bfin_read32(SIC_ISR0 + (x << 6))
  41. #define bfin_write_SIC_ISR(x, val) bfin_write32((SIC_ISR0 + (x << 6)), val)
  42. #define bfin_read_SIC_IWR0() bfin_read32(SIC_IWR0)
  43. #define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0, val)
  44. #define bfin_read_SIC_IWR(x) bfin_read32(SIC_IWR0 + (x << 6))
  45. #define bfin_write_SIC_IWR(x, val) bfin_write32((SIC_IWR0 + (x << 6)), val)
  46. /* SIC Additions to ADSP-BF52x (0xFFC0014C - 0xFFC00162) */
  47. #define bfin_read_SIC_IMASK1() bfin_read32(SIC_IMASK1)
  48. #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val)
  49. #define bfin_read_SIC_IAR4() bfin_read32(SIC_IAR4)
  50. #define bfin_write_SIC_IAR4(val) bfin_write32(SIC_IAR4, val)
  51. #define bfin_read_SIC_IAR5() bfin_read32(SIC_IAR5)
  52. #define bfin_write_SIC_IAR5(val) bfin_write32(SIC_IAR5, val)
  53. #define bfin_read_SIC_IAR6() bfin_read32(SIC_IAR6)
  54. #define bfin_write_SIC_IAR6(val) bfin_write32(SIC_IAR6, val)
  55. #define bfin_read_SIC_IAR7() bfin_read32(SIC_IAR7)
  56. #define bfin_write_SIC_IAR7(val) bfin_write32(SIC_IAR7, val)
  57. #define bfin_read_SIC_ISR1() bfin_read32(SIC_ISR1)
  58. #define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1, val)
  59. #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
  60. #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)