memoryOperation.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455
  1. /* linux/arch/arm/plat-samsung/devs.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Base SAMSUNG platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/io.h>
  21. #include <linux/slab.h>
  22. #include <linux/string.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/fb.h>
  25. #include <linux/gfp.h>
  26. #include <linux/mtd/mtd.h>
  27. #include <linux/mtd/onenand.h>
  28. #include <linux/mtd/partitions.h>
  29. #include <linux/mmc/host.h>
  30. #include <linux/ioport.h>
  31. #include <linux/platform_data/s3c-hsudc.h>
  32. #include <linux/platform_data/s3c-hsotg.h>
  33. #include <media/s5p_hdmi.h>
  34. #include <asm/irq.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/map.h>
  37. #include <asm/mach/irq.h>
  38. #include <mach/hardware.h>
  39. #include <mach/dma.h>
  40. #include <mach/irqs.h>
  41. #include <mach/map.h>
  42. #include <plat/cpu.h>
  43. #include <plat/devs.h>
  44. #include <plat/adc.h>
  45. #include <linux/platform_data/ata-samsung_cf.h>
  46. #include <linux/platform_data/usb-ehci-s5p.h>
  47. #include <plat/fb.h>
  48. #include <plat/fb-s3c2410.h>
  49. #include <plat/hdmi.h>
  50. #include <linux/platform_data/hwmon-s3c.h>
  51. #include <linux/platform_data/i2c-s3c2410.h>
  52. #include <plat/keypad.h>
  53. #include <linux/platform_data/mmc-s3cmci.h>
  54. #include <linux/platform_data/mtd-nand-s3c2410.h>
  55. #include <plat/sdhci.h>
  56. #include <linux/platform_data/touchscreen-s3c2410.h>
  57. #include <linux/platform_data/usb-s3c2410_udc.h>
  58. #include <linux/platform_data/usb-ohci-s3c2410.h>
  59. #include <plat/usb-phy.h>
  60. #include <plat/regs-iic.h>
  61. #include <plat/regs-serial.h>
  62. #include <plat/regs-spi.h>
  63. #include <linux/platform_data/spi-s3c64xx.h>
  64. static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
  65. /* AC97 */
  66. #ifdef CONFIG_CPU_S3C2440
  67. static struct resource s3c_ac97_resource[] = {
  68. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  69. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  70. [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
  71. [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
  72. [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
  73. };
  74. struct platform_device s3c_device_ac97 = {
  75. .name = "samsung-ac97",
  76. .id = -1,
  77. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  78. .resource = s3c_ac97_resource,
  79. .dev = {
  80. .dma_mask = &samsung_device_dma_mask,
  81. .coherent_dma_mask = DMA_BIT_MASK(32),
  82. }
  83. };
  84. #endif /* CONFIG_CPU_S3C2440 */
  85. /* ADC */
  86. #ifdef CONFIG_PLAT_S3C24XX
  87. static struct resource s3c_adc_resource[] = {
  88. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  89. [1] = DEFINE_RES_IRQ(IRQ_TC),
  90. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  91. };
  92. struct platform_device s3c_device_adc = {
  93. .name = "s3c24xx-adc",
  94. .id = -1,
  95. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  96. .resource = s3c_adc_resource,
  97. };
  98. #endif /* CONFIG_PLAT_S3C24XX */
  99. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  100. static struct resource s3c_adc_resource[] = {
  101. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  102. [1] = DEFINE_RES_IRQ(IRQ_TC),
  103. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  104. };
  105. struct platform_device s3c_device_adc = {
  106. .name = "samsung-adc",
  107. .id = -1,
  108. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  109. .resource = s3c_adc_resource,
  110. };
  111. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  112. /* Camif Controller */
  113. #ifdef CONFIG_CPU_S3C2440
  114. static struct resource s3c_camif_resource[] = {
  115. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  116. [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
  117. [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
  118. };
  119. struct platform_device s3c_device_camif = {
  120. .name = "s3c2440-camif",
  121. .id = -1,
  122. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  123. .resource = s3c_camif_resource,
  124. .dev = {
  125. .dma_mask = &samsung_device_dma_mask,
  126. .coherent_dma_mask = DMA_BIT_MASK(32),
  127. }
  128. };
  129. #endif /* CONFIG_CPU_S3C2440 */
  130. /* ASOC DMA */
  131. struct platform_device samsung_asoc_idma = {
  132. .name = "samsung-idma",
  133. .id = -1,
  134. .dev = {
  135. .dma_mask = &samsung_device_dma_mask,
  136. .coherent_dma_mask = DMA_BIT_MASK(32),
  137. }
  138. };
  139. /* FB */
  140. #ifdef CONFIG_S3C_DEV_FB
  141. static struct resource s3c_fb_resource[] = {
  142. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  143. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  144. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  145. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  146. };
  147. struct platform_device s3c_device_fb = {
  148. .name = "s3c-fb",
  149. .id = -1,
  150. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  151. .resource = s3c_fb_resource,
  152. .dev = {
  153. .dma_mask = &samsung_device_dma_mask,
  154. .coherent_dma_mask = DMA_BIT_MASK(32),
  155. },
  156. };
  157. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  158. {
  159. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  160. &s3c_device_fb);
  161. }
  162. #endif /* CONFIG_S3C_DEV_FB */
  163. /* FIMC */
  164. #ifdef CONFIG_S5P_DEV_FIMC0
  165. static struct resource s5p_fimc0_resource[] = {
  166. [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
  167. [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
  168. };
  169. struct platform_device s5p_device_fimc0 = {
  170. .name = "s5p-fimc",
  171. .id = 0,
  172. .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
  173. .resource = s5p_fimc0_resource,
  174. .dev = {
  175. .dma_mask = &samsung_device_dma_mask,
  176. .coherent_dma_mask = DMA_BIT_MASK(32),
  177. },
  178. };
  179. struct platform_device s5p_device_fimc_md = {
  180. .name = "s5p-fimc-md",
  181. .id = -1,
  182. };
  183. #endif /* CONFIG_S5P_DEV_FIMC0 */
  184. #ifdef CONFIG_S5P_DEV_FIMC1
  185. static struct resource s5p_fimc1_resource[] = {
  186. [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
  187. [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
  188. };
  189. struct platform_device s5p_device_fimc1 = {
  190. .name = "s5p-fimc",
  191. .id = 1,
  192. .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
  193. .resource = s5p_fimc1_resource,
  194. .dev = {
  195. .dma_mask = &samsung_device_dma_mask,
  196. .coherent_dma_mask = DMA_BIT_MASK(32),
  197. },
  198. };
  199. #endif /* CONFIG_S5P_DEV_FIMC1 */
  200. #ifdef CONFIG_S5P_DEV_FIMC2
  201. static struct resource s5p_fimc2_resource[] = {
  202. [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
  203. [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
  204. };
  205. struct platform_device s5p_device_fimc2 = {
  206. .name = "s5p-fimc",
  207. .id = 2,
  208. .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
  209. .resource = s5p_fimc2_resource,
  210. .dev = {
  211. .dma_mask = &samsung_device_dma_mask,
  212. .coherent_dma_mask = DMA_BIT_MASK(32),
  213. },
  214. };
  215. #endif /* CONFIG_S5P_DEV_FIMC2 */
  216. #ifdef CONFIG_S5P_DEV_FIMC3
  217. static struct resource s5p_fimc3_resource[] = {
  218. [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
  219. [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
  220. };
  221. struct platform_device s5p_device_fimc3 = {
  222. .name = "s5p-fimc",
  223. .id = 3,
  224. .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
  225. .resource = s5p_fimc3_resource,
  226. .dev = {
  227. .dma_mask = &samsung_device_dma_mask,
  228. .coherent_dma_mask = DMA_BIT_MASK(32),
  229. },
  230. };
  231. #endif /* CONFIG_S5P_DEV_FIMC3 */
  232. /* G2D */
  233. #ifdef CONFIG_S5P_DEV_G2D
  234. static struct resource s5p_g2d_resource[] = {
  235. [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
  236. [1] = DEFINE_RES_IRQ(IRQ_2D),
  237. };
  238. struct platform_device s5p_device_g2d = {
  239. .name = "s5p-g2d",
  240. .id = 0,
  241. .num_resources = ARRAY_SIZE(s5p_g2d_resource),
  242. .resource = s5p_g2d_resource,
  243. .dev = {
  244. .dma_mask = &samsung_device_dma_mask,
  245. .coherent_dma_mask = DMA_BIT_MASK(32),
  246. },
  247. };
  248. #endif /* CONFIG_S5P_DEV_G2D */
  249. #ifdef CONFIG_S5P_DEV_JPEG
  250. static struct resource s5p_jpeg_resource[] = {
  251. [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
  252. [1] = DEFINE_RES_IRQ(IRQ_JPEG),
  253. };
  254. struct platform_device s5p_device_jpeg = {
  255. .name = "s5p-jpeg",
  256. .id = 0,
  257. .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
  258. .resource = s5p_jpeg_resource,
  259. .dev = {
  260. .dma_mask = &samsung_device_dma_mask,
  261. .coherent_dma_mask = DMA_BIT_MASK(32),
  262. },
  263. };
  264. #endif /* CONFIG_S5P_DEV_JPEG */
  265. /* FIMD0 */
  266. #ifdef CONFIG_S5P_DEV_FIMD0
  267. static struct resource s5p_fimd0_resource[] = {
  268. [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
  269. [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
  270. [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
  271. [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
  272. };
  273. struct platform_device s5p_device_fimd0 = {
  274. .name = "s5p-fb",
  275. .id = 0,
  276. .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
  277. .resource = s5p_fimd0_resource,
  278. .dev = {
  279. .dma_mask = &samsung_device_dma_mask,
  280. .coherent_dma_mask = DMA_BIT_MASK(32),
  281. },
  282. };
  283. void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
  284. {
  285. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  286. &s5p_device_fimd0);
  287. }
  288. #endif /* CONFIG_S5P_DEV_FIMD0 */
  289. /* HWMON */
  290. #ifdef CONFIG_S3C_DEV_HWMON
  291. struct platform_device s3c_device_hwmon = {
  292. .name = "s3c-hwmon",
  293. .id = -1,
  294. .dev.parent = &s3c_device_adc.dev,
  295. };
  296. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  297. {
  298. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  299. &s3c_device_hwmon);
  300. }
  301. #endif /* CONFIG_S3C_DEV_HWMON */
  302. /* HSMMC */
  303. #ifdef CONFIG_S3C_DEV_HSMMC
  304. static struct resource s3c_hsmmc_resource[] = {
  305. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  306. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  307. };
  308. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  309. .max_width = 4,
  310. .host_caps = (MMC_CAP_4_BIT_DATA |
  311. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  312. };
  313. struct platform_device s3c_device_hsmmc0 = {
  314. .name = "s3c-sdhci",
  315. .id = 0,
  316. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  317. .resource = s3c_hsmmc_resource,
  318. .dev = {
  319. .dma_mask = &samsung_device_dma_mask,
  320. .coherent_dma_mask = DMA_BIT_MASK(32),
  321. .platform_data = &s3c_hsmmc0_def_platdata,
  322. },
  323. };
  324. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  325. {
  326. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  327. }
  328. #endif /* CONFIG_S3C_DEV_HSMMC */
  329. #ifdef CONFIG_S3C_DEV_HSMMC1
  330. static struct resource s3c_hsmmc1_resource[] = {
  331. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  332. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  333. };
  334. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  335. .max_width = 4,
  336. .host_caps = (MMC_CAP_4_BIT_DATA |
  337. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  338. };
  339. struct platform_device s3c_device_hsmmc1 = {
  340. .name = "s3c-sdhci",
  341. .id = 1,
  342. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  343. .resource = s3c_hsmmc1_resource,
  344. .dev = {
  345. .dma_mask = &samsung_device_dma_mask,
  346. .coherent_dma_mask = DMA_BIT_MASK(32),
  347. .platform_data = &s3c_hsmmc1_def_platdata,
  348. },
  349. };
  350. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  351. {
  352. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  353. }
  354. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  355. /* HSMMC2 */
  356. #ifdef CONFIG_S3C_DEV_HSMMC2
  357. static struct resource s3c_hsmmc2_resource[] = {
  358. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  359. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  360. };
  361. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  362. .max_width = 4,
  363. .host_caps = (MMC_CAP_4_BIT_DATA |
  364. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  365. };
  366. struct platform_device s3c_device_hsmmc2 = {
  367. .name = "s3c-sdhci",
  368. .id = 2,
  369. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  370. .resource = s3c_hsmmc2_resource,
  371. .dev = {
  372. .dma_mask = &samsung_device_dma_mask,
  373. .coherent_dma_mask = DMA_BIT_MASK(32),
  374. .platform_data = &s3c_hsmmc2_def_platdata,
  375. },
  376. };
  377. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  378. {
  379. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  380. }
  381. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  382. #ifdef CONFIG_S3C_DEV_HSMMC3
  383. static struct resource s3c_hsmmc3_resource[] = {
  384. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  385. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  386. };
  387. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  388. .max_width = 4,
  389. .host_caps = (MMC_CAP_4_BIT_DATA |
  390. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  391. };
  392. struct platform_device s3c_device_hsmmc3 = {
  393. .name = "s3c-sdhci",
  394. .id = 3,