definitionOfLeakageHazard.c 4.5 KB

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  1. /*
  2. * sh7372 processor support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/irq.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/of_platform.h>
  26. #include <linux/uio_driver.h>
  27. #include <linux/delay.h>
  28. #include <linux/input.h>
  29. #include <linux/io.h>
  30. #include <linux/serial_sci.h>
  31. #include <linux/sh_dma.h>
  32. #include <linux/sh_intc.h>
  33. #include <linux/sh_timer.h>
  34. #include <linux/pm_domain.h>
  35. #include <linux/dma-mapping.h>
  36. #include <mach/dma-register.h>
  37. #include <mach/hardware.h>
  38. #include <mach/irqs.h>
  39. #include <mach/sh7372.h>
  40. #include <mach/common.h>
  41. #include <asm/mach/map.h>
  42. #include <asm/mach-types.h>
  43. #include <asm/mach/arch.h>
  44. #include <asm/mach/time.h>
  45. static struct map_desc sh7372_io_desc[] __initdata = {
  46. /* create a 1:1 entity map for 0xe6xxxxxx
  47. * used by CPGA, INTC and PFC.
  48. */
  49. {
  50. .virtual = 0xe6000000,
  51. .pfn = __phys_to_pfn(0xe6000000),
  52. .length = 256 << 20,
  53. .type = MT_DEVICE_NONSHARED
  54. },
  55. };
  56. void __init sh7372_map_io(void)
  57. {
  58. iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc));
  59. }
  60. /* SCIFA0 */
  61. static struct plat_sci_port scif0_platform_data = {
  62. .mapbase = 0xe6c40000,
  63. .flags = UPF_BOOT_AUTOCONF,
  64. .scscr = SCSCR_RE | SCSCR_TE,
  65. .scbrr_algo_id = SCBRR_ALGO_4,
  66. .type = PORT_SCIFA,
  67. .irqs = { evt2irq(0x0c00), evt2irq(0x0c00),
  68. evt2irq(0x0c00), evt2irq(0x0c00) },
  69. };
  70. static struct platform_device scif0_device = {
  71. .name = "sh-sci",
  72. .id = 0,
  73. .dev = {
  74. .platform_data = &scif0_platform_data,
  75. },
  76. };
  77. /* SCIFA1 */
  78. static struct plat_sci_port scif1_platform_data = {
  79. .mapbase = 0xe6c50000,
  80. .flags = UPF_BOOT_AUTOCONF,
  81. .scscr = SCSCR_RE | SCSCR_TE,
  82. .scbrr_algo_id = SCBRR_ALGO_4,
  83. .type = PORT_SCIFA,
  84. .irqs = { evt2irq(0x0c20), evt2irq(0x0c20),
  85. evt2irq(0x0c20), evt2irq(0x0c20) },
  86. };
  87. static struct platform_device scif1_device = {
  88. .name = "sh-sci",
  89. .id = 1,
  90. .dev = {
  91. .platform_data = &scif1_platform_data,
  92. },
  93. };
  94. /* SCIFA2 */
  95. static struct plat_sci_port scif2_platform_data = {
  96. .mapbase = 0xe6c60000,
  97. .flags = UPF_BOOT_AUTOCONF,
  98. .scscr = SCSCR_RE | SCSCR_TE,
  99. .scbrr_algo_id = SCBRR_ALGO_4,
  100. .type = PORT_SCIFA,
  101. .irqs = { evt2irq(0x0c40), evt2irq(0x0c40),
  102. evt2irq(0x0c40), evt2irq(0x0c40) },
  103. };
  104. static struct platform_device scif2_device = {
  105. .name = "sh-sci",
  106. .id = 2,
  107. .dev = {
  108. .platform_data = &scif2_platform_data,
  109. },
  110. };
  111. /* SCIFA3 */
  112. static struct plat_sci_port scif3_platform_data = {
  113. .mapbase = 0xe6c70000,
  114. .flags = UPF_BOOT_AUTOCONF,
  115. .scscr = SCSCR_RE | SCSCR_TE,
  116. .scbrr_algo_id = SCBRR_ALGO_4,
  117. .type = PORT_SCIFA,
  118. .irqs = { evt2irq(0x0c60), evt2irq(0x0c60),
  119. evt2irq(0x0c60), evt2irq(0x0c60) },
  120. };
  121. static struct platform_device scif3_device = {
  122. .name = "sh-sci",
  123. .id = 3,
  124. .dev = {
  125. .platform_data = &scif3_platform_data,
  126. },
  127. };
  128. /* SCIFA4 */
  129. static struct plat_sci_port scif4_platform_data = {
  130. .mapbase = 0xe6c80000,
  131. .flags = UPF_BOOT_AUTOCONF,
  132. .scscr = SCSCR_RE | SCSCR_TE,
  133. .scbrr_algo_id = SCBRR_ALGO_4,
  134. .type = PORT_SCIFA,
  135. .irqs = { evt2irq(0x0d20), evt2irq(0x0d20),
  136. evt2irq(0x0d20), evt2irq(0x0d20) },
  137. };
  138. static struct platform_device scif4_device = {
  139. .name = "sh-sci",
  140. .id = 4,
  141. .dev = {
  142. .platform_data = &scif4_platform_data,
  143. },
  144. };
  145. /* SCIFA5 */
  146. static struct plat_sci_port scif5_platform_data = {
  147. .mapbase = 0xe6cb0000,
  148. .flags = UPF_BOOT_AUTOCONF,
  149. .scscr = SCSCR_RE | SCSCR_TE,
  150. .scbrr_algo_id = SCBRR_ALGO_4,
  151. .type = PORT_SCIFA,
  152. .irqs = { evt2irq(0x0d40), evt2irq(0x0d40),
  153. evt2irq(0x0d40), evt2irq(0x0d40) },
  154. };
  155. static struct platform_device scif5_device = {
  156. .name = "sh-sci",
  157. .id = 5,
  158. .dev = {
  159. .platform_data = &scif5_platform_data,
  160. },
  161. };
  162. /* SCIFB */
  163. static struct plat_sci_port scif6_platform_data = {
  164. .mapbase = 0xe6c30000,
  165. .flags = UPF_BOOT_AUTOCONF,
  166. .scscr = SCSCR_RE | SCSCR_TE,
  167. .scbrr_algo_id = SCBRR_ALGO_4,