normalDataOperation.c 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178
  1. /*
  2. * Chip-specific setup code for the AT91SAM9G45 family
  3. *
  4. * Copyright (C) 2009 Atmel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. */
  12. #include <linux/module.h>
  13. #include <linux/dma-mapping.h>
  14. #include <asm/irq.h>
  15. #include <asm/mach/arch.h>
  16. #include <asm/mach/map.h>
  17. #include <asm/system_misc.h>
  18. #include <mach/at91sam9g45.h>
  19. #include <mach/at91_pmc.h>
  20. #include <mach/cpu.h>
  21. #include "at91_aic.h"
  22. #include "soc.h"
  23. #include "generic.h"
  24. #include "clock.h"
  25. #include "sam9_smc.h"
  26. /* --------------------------------------------------------------------
  27. * Clocks
  28. * -------------------------------------------------------------------- */
  29. /*
  30. * The peripheral clocks.
  31. */
  32. static struct clk pioA_clk = {
  33. .name = "pioA_clk",
  34. .pmc_mask = 1 << AT91SAM9G45_ID_PIOA,
  35. .type = CLK_TYPE_PERIPHERAL,
  36. };
  37. static struct clk pioB_clk = {
  38. .name = "pioB_clk",
  39. .pmc_mask = 1 << AT91SAM9G45_ID_PIOB,
  40. .type = CLK_TYPE_PERIPHERAL,
  41. };
  42. static struct clk pioC_clk = {
  43. .name = "pioC_clk",
  44. .pmc_mask = 1 << AT91SAM9G45_ID_PIOC,
  45. .type = CLK_TYPE_PERIPHERAL,
  46. };
  47. static struct clk pioDE_clk = {
  48. .name = "pioDE_clk",
  49. .pmc_mask = 1 << AT91SAM9G45_ID_PIODE,
  50. .type = CLK_TYPE_PERIPHERAL,
  51. };
  52. static struct clk trng_clk = {
  53. .name = "trng_clk",
  54. .pmc_mask = 1 << AT91SAM9G45_ID_TRNG,
  55. .type = CLK_TYPE_PERIPHERAL,
  56. };
  57. static struct clk usart0_clk = {
  58. .name = "usart0_clk",
  59. .pmc_mask = 1 << AT91SAM9G45_ID_US0,
  60. .type = CLK_TYPE_PERIPHERAL,
  61. };
  62. static struct clk usart1_clk = {
  63. .name = "usart1_clk",
  64. .pmc_mask = 1 << AT91SAM9G45_ID_US1,
  65. .type = CLK_TYPE_PERIPHERAL,
  66. };
  67. static struct clk usart2_clk = {
  68. .name = "usart2_clk",
  69. .pmc_mask = 1 << AT91SAM9G45_ID_US2,
  70. .type = CLK_TYPE_PERIPHERAL,
  71. };
  72. static struct clk usart3_clk = {
  73. .name = "usart3_clk",
  74. .pmc_mask = 1 << AT91SAM9G45_ID_US3,
  75. .type = CLK_TYPE_PERIPHERAL,
  76. };
  77. static struct clk mmc0_clk = {
  78. .name = "mci0_clk",
  79. .pmc_mask = 1 << AT91SAM9G45_ID_MCI0,
  80. .type = CLK_TYPE_PERIPHERAL,
  81. };
  82. static struct clk twi0_clk = {
  83. .name = "twi0_clk",
  84. .pmc_mask = 1 << AT91SAM9G45_ID_TWI0,
  85. .type = CLK_TYPE_PERIPHERAL,
  86. };
  87. static struct clk twi1_clk = {
  88. .name = "twi1_clk",
  89. .pmc_mask = 1 << AT91SAM9G45_ID_TWI1,
  90. .type = CLK_TYPE_PERIPHERAL,
  91. };
  92. static struct clk spi0_clk = {
  93. .name = "spi0_clk",
  94. .pmc_mask = 1 << AT91SAM9G45_ID_SPI0,
  95. .type = CLK_TYPE_PERIPHERAL,
  96. };
  97. static struct clk spi1_clk = {
  98. .name = "spi1_clk",
  99. .pmc_mask = 1 << AT91SAM9G45_ID_SPI1,
  100. .type = CLK_TYPE_PERIPHERAL,
  101. };
  102. static struct clk ssc0_clk = {
  103. .name = "ssc0_clk",
  104. .pmc_mask = 1 << AT91SAM9G45_ID_SSC0,
  105. .type = CLK_TYPE_PERIPHERAL,
  106. };
  107. static struct clk ssc1_clk = {
  108. .name = "ssc1_clk",
  109. .pmc_mask = 1 << AT91SAM9G45_ID_SSC1,
  110. .type = CLK_TYPE_PERIPHERAL,
  111. };
  112. static struct clk tcb0_clk = {
  113. .name = "tcb0_clk",
  114. .pmc_mask = 1 << AT91SAM9G45_ID_TCB,
  115. .type = CLK_TYPE_PERIPHERAL,
  116. };
  117. static struct clk pwm_clk = {
  118. .name = "pwm_clk",
  119. .pmc_mask = 1 << AT91SAM9G45_ID_PWMC,
  120. .type = CLK_TYPE_PERIPHERAL,
  121. };
  122. static struct clk tsc_clk = {
  123. .name = "tsc_clk",
  124. .pmc_mask = 1 << AT91SAM9G45_ID_TSC,
  125. .type = CLK_TYPE_PERIPHERAL,
  126. };
  127. static struct clk dma_clk = {
  128. .name = "dma_clk",
  129. .pmc_mask = 1 << AT91SAM9G45_ID_DMA,
  130. .type = CLK_TYPE_PERIPHERAL,
  131. };
  132. static struct clk uhphs_clk = {
  133. .name = "uhphs_clk",
  134. .pmc_mask = 1 << AT91SAM9G45_ID_UHPHS,
  135. .type = CLK_TYPE_PERIPHERAL,
  136. };
  137. static struct clk lcdc_clk = {
  138. .name = "lcdc_clk",
  139. .pmc_mask = 1 << AT91SAM9G45_ID_LCDC,
  140. .type = CLK_TYPE_PERIPHERAL,
  141. };
  142. static struct clk ac97_clk = {
  143. .name = "ac97_clk",
  144. .pmc_mask = 1 << AT91SAM9G45_ID_AC97C,
  145. .type = CLK_TYPE_PERIPHERAL,
  146. };
  147. static struct clk macb_clk = {
  148. .name = "pclk",
  149. .pmc_mask = 1 << AT91SAM9G45_ID_EMAC,
  150. .type = CLK_TYPE_PERIPHERAL,
  151. };
  152. static struct clk isi_clk = {
  153. .name = "isi_clk",
  154. .pmc_mask = 1 << AT91SAM9G45_ID_ISI,
  155. .type = CLK_TYPE_PERIPHERAL,
  156. };
  157. static struct clk udphs_clk = {
  158. .name = "udphs_clk",
  159. .pmc_mask = 1 << AT91SAM9G45_ID_UDPHS,
  160. .type = CLK_TYPE_PERIPHERAL,
  161. };
  162. static struct clk mmc1_clk = {
  163. .name = "mci1_clk",
  164. .pmc_mask = 1 << AT91SAM9G45_ID_MCI1,
  165. .type = CLK_TYPE_PERIPHERAL,
  166. };
  167. /* Video decoder clock - Only for sam9m10/sam9m11 */
  168. static struct clk vdec_clk = {
  169. .name = "vdec_clk",
  170. .pmc_mask = 1 << AT91SAM9G45_ID_VDEC,
  171. .type = CLK_TYPE_PERIPHERAL,
  172. };