| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221 | /* * arch/arm/mach-at91/at91sam9263.c * *  Copyright (C) 2007 Atmel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * */#include <linux/module.h>#include <asm/proc-fns.h>#include <asm/irq.h>#include <asm/mach/arch.h>#include <asm/mach/map.h>#include <asm/system_misc.h>#include <mach/at91sam9263.h>#include <mach/at91_pmc.h>#include "at91_aic.h"#include "at91_rstc.h"#include "soc.h"#include "generic.h"#include "clock.h"#include "sam9_smc.h"/* -------------------------------------------------------------------- *  Clocks * -------------------------------------------------------------------- *//* * The peripheral clocks. */static struct clk pioA_clk = {	.name		= "pioA_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_PIOA,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk pioB_clk = {	.name		= "pioB_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_PIOB,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk pioCDE_clk = {	.name		= "pioCDE_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_PIOCDE,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk usart0_clk = {	.name		= "usart0_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_US0,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk usart1_clk = {	.name		= "usart1_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_US1,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk usart2_clk = {	.name		= "usart2_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_US2,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk mmc0_clk = {	.name		= "mci0_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_MCI0,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk mmc1_clk = {	.name		= "mci1_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_MCI1,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk can_clk = {	.name		= "can_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_CAN,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk twi_clk = {	.name		= "twi_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_TWI,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk spi0_clk = {	.name		= "spi0_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_SPI0,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk spi1_clk = {	.name		= "spi1_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_SPI1,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk ssc0_clk = {	.name		= "ssc0_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_SSC0,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk ssc1_clk = {	.name		= "ssc1_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_SSC1,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk ac97_clk = {	.name		= "ac97_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_AC97C,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk tcb_clk = {	.name		= "tcb_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_TCB,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk pwm_clk = {	.name		= "pwm_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_PWMC,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk macb_clk = {	.name		= "pclk",	.pmc_mask	= 1 << AT91SAM9263_ID_EMAC,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk dma_clk = {	.name		= "dma_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_DMA,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk twodge_clk = {	.name		= "2dge_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_2DGE,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk udc_clk = {	.name		= "udc_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_UDP,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk isi_clk = {	.name		= "isi_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_ISI,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk lcdc_clk = {	.name		= "lcdc_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_LCDC,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk ohci_clk = {	.name		= "ohci_clk",	.pmc_mask	= 1 << AT91SAM9263_ID_UHP,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk *periph_clocks[] __initdata = {	&pioA_clk,	&pioB_clk,	&pioCDE_clk,	&usart0_clk,	&usart1_clk,	&usart2_clk,	&mmc0_clk,	&mmc1_clk,	&can_clk,	&twi_clk,	&spi0_clk,	&spi1_clk,	&ssc0_clk,	&ssc1_clk,	&ac97_clk,	&tcb_clk,	&pwm_clk,	&macb_clk,	&twodge_clk,	&udc_clk,	&isi_clk,	&lcdc_clk,	&dma_clk,	&ohci_clk,	// irq0 .. irq1};static struct clk_lookup periph_clocks_lookups[] = {	/* One additional fake clock for macb_hclk */	CLKDEV_CON_ID("hclk", &macb_clk),	CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),	CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),	CLKDEV_CON_DEV_ID("pclk", "fff98000.ssc", &ssc0_clk),	CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc1_clk),	CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk),	CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk),	CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),	CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),	CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),	/* fake hclk clock */	CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),	CLKDEV_CON_ID("pioA", &pioA_clk),	CLKDEV_CON_ID("pioB", &pioB_clk),	CLKDEV_CON_ID("pioC", &pioCDE_clk),	CLKDEV_CON_ID("pioD", &pioCDE_clk),	CLKDEV_CON_ID("pioE", &pioCDE_clk),	/* more usart lookup table for DT entries */	CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),	CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),	CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),	CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),	/* more tc lookup table for DT entries */	CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb_clk),	CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),	CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),	CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),	CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),	CLKDEV_CON_DEV_ID("mci_clk", "fff84000.mmc", &mmc1_clk),	CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),	CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),	CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),	CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
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