| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122 | /* * GPIO Abstraction Layer * * Copyright 2006-2010 Analog Devices Inc. * * Licensed under the GPL-2 or later */#include <linux/delay.h>#include <linux/module.h>#include <linux/err.h>#include <linux/proc_fs.h>#include <linux/seq_file.h>#include <asm/blackfin.h>#include <asm/gpio.h>#include <asm/portmux.h>#include <linux/irq.h>#include <asm/irq_handler.h>#if ANOMALY_05000311 || ANOMALY_05000323enum {	AWA_data = SYSCR,	AWA_data_clear = SYSCR,	AWA_data_set = SYSCR,	AWA_toggle = SYSCR,	AWA_maska = BFIN_UART_SCR,	AWA_maska_clear = BFIN_UART_SCR,	AWA_maska_set = BFIN_UART_SCR,	AWA_maska_toggle = BFIN_UART_SCR,	AWA_maskb = BFIN_UART_GCTL,	AWA_maskb_clear = BFIN_UART_GCTL,	AWA_maskb_set = BFIN_UART_GCTL,	AWA_maskb_toggle = BFIN_UART_GCTL,	AWA_dir = SPORT1_STAT,	AWA_polar = SPORT1_STAT,	AWA_edge = SPORT1_STAT,	AWA_both = SPORT1_STAT,#if ANOMALY_05000311	AWA_inen = TIMER_ENABLE,#elif ANOMALY_05000323	AWA_inen = DMA1_1_CONFIG,#endif};	/* Anomaly Workaround */#define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)#else#define AWA_DUMMY_READ(...)  do { } while (0)#endifstatic struct gpio_port_t * const gpio_array[] = {#if defined(BF533_FAMILY) || defined(BF538_FAMILY)	(struct gpio_port_t *) FIO_FLAG_D,#elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)	(struct gpio_port_t *) PORTFIO,	(struct gpio_port_t *) PORTGIO,	(struct gpio_port_t *) PORTHIO,#elif defined(BF561_FAMILY)	(struct gpio_port_t *) FIO0_FLAG_D,	(struct gpio_port_t *) FIO1_FLAG_D,	(struct gpio_port_t *) FIO2_FLAG_D,#elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x) 	(struct gpio_port_t *)PORTA_FER,	(struct gpio_port_t *)PORTB_FER,	(struct gpio_port_t *)PORTC_FER,	(struct gpio_port_t *)PORTD_FER,	(struct gpio_port_t *)PORTE_FER,	(struct gpio_port_t *)PORTF_FER,	(struct gpio_port_t *)PORTG_FER,# if defined(CONFIG_BF54x)	(struct gpio_port_t *)PORTH_FER,	(struct gpio_port_t *)PORTI_FER,	(struct gpio_port_t *)PORTJ_FER,# endif#else# error no gpio arrays defined#endif};#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)static unsigned short * const port_fer[] = {	(unsigned short *) PORTF_FER,	(unsigned short *) PORTG_FER,	(unsigned short *) PORTH_FER,};# if !defined(BF537_FAMILY)static unsigned short * const port_mux[] = {	(unsigned short *) PORTF_MUX,	(unsigned short *) PORTG_MUX,	(unsigned short *) PORTH_MUX,};static constu8 pmux_offset[][16] = {#  if defined(CONFIG_BF52x)	{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */	{ 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */	{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */#  elif defined(CONFIG_BF51x)	{ 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */	{ 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */	{ 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */#  endif};# endif#elif defined(BF538_FAMILY)static unsigned short * const port_fer[] = {	(unsigned short *) PORTCIO_FER,	(unsigned short *) PORTDIO_FER,	(unsigned short *) PORTEIO_FER,};#endif#define RESOURCE_LABEL_SIZE	16static struct str_ident {	char name[RESOURCE_LABEL_SIZE];} str_ident[MAX_RESOURCES];#if defined(CONFIG_PM)static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
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