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waterHeterogeneousDataSynchronization
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monitoringDataProcessing
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preliminaryDataProcessing.h

preliminaryDataProcessing.h 75 KB
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  1. /*
    2. 

  2.  * Copyright 2005-2010 Analog Devices Inc.
    3. 

  3.  *
    4. 

  4.  * Licensed under the GPL-2 or later.
    5. 

  5.  */
    6. 

  6. 

  7. #ifndef _CDEF_BF561_H
    8. 

  8. #define _CDEF_BF561_H
    9. 

  9. 

  10. /*********************************************************************************** */
    11. 

  11. /* System MMR Register Map */
    12. 

  12. /*********************************************************************************** */
    13. 

  13. 

  14. /* Clock and System Control (0xFFC00000 - 0xFFC000FF) */
    15. 

  15. #define bfin_read_PLL_CTL()                  bfin_read16(PLL_CTL)
    16. 

  16. #define bfin_read_PLL_DIV()                  bfin_read16(PLL_DIV)
    17. 

  17. #define bfin_write_PLL_DIV(val)              bfin_write16(PLL_DIV,val)
    18. 

  18. #define bfin_read_VR_CTL()                   bfin_read16(VR_CTL)
    19. 

  19. #define bfin_read_PLL_STAT()                 bfin_read16(PLL_STAT)
    20. 

  20. #define bfin_write_PLL_STAT(val)             bfin_write16(PLL_STAT,val)
    21. 

  21. #define bfin_read_PLL_LOCKCNT()              bfin_read16(PLL_LOCKCNT)
    22. 

  22. #define bfin_write_PLL_LOCKCNT(val)          bfin_write16(PLL_LOCKCNT,val)
    23. 

  23. #define bfin_read_CHIPID()                   bfin_read32(CHIPID)
    24. 

  24. 

  25. /* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */
    26. 

  26. #define bfin_read_SWRST()                    bfin_read16(SWRST)
    27. 

  27. #define bfin_write_SWRST(val)                bfin_write16(SWRST,val)
    28. 

  28. #define bfin_read_SYSCR()                    bfin_read16(SYSCR)
    29. 

  29. #define bfin_write_SYSCR(val)                bfin_write16(SYSCR,val)
    30. 

  30. #define bfin_read_SIC_RVECT()                bfin_read16(SIC_RVECT)
    31. 

  31. #define bfin_write_SIC_RVECT(val)            bfin_write16(SIC_RVECT,val)
    32. 

  32. #define bfin_read_SIC_IMASK0()               bfin_read32(SIC_IMASK0)
    33. 

  33. #define bfin_write_SIC_IMASK0(val)           bfin_write32(SIC_IMASK0,val)
    34. 

  34. #define bfin_read_SIC_IMASK1()               bfin_read32(SIC_IMASK1)
    35. 

  35. #define bfin_write_SIC_IMASK1(val)           bfin_write32(SIC_IMASK1,val)
    36. 

  36. #define bfin_read_SIC_IAR0()                 bfin_read32(SIC_IAR0)
    37. 

  37. #define bfin_write_SIC_IAR0(val)             bfin_write32(SIC_IAR0,val)
    38. 

  38. #define bfin_read_SIC_IAR1()                 bfin_read32(SIC_IAR1)
    39. 

  39. #define bfin_write_SIC_IAR1(val)             bfin_write32(SIC_IAR1,val)
    40. 

  40. #define bfin_read_SIC_IAR2()                 bfin_read32(SIC_IAR2)
    41. 

  41. #define bfin_write_SIC_IAR2(val)             bfin_write32(SIC_IAR2,val)
    42. 

  42. #define bfin_read_SIC_IAR3()                 bfin_read32(SIC_IAR3)
    43. 

  43. #define bfin_write_SIC_IAR3(val)             bfin_write32(SIC_IAR3,val)
    44. 

  44. #define bfin_read_SIC_IAR4()                 bfin_read32(SIC_IAR4)
    45. 

  45. #define bfin_write_SIC_IAR4(val)             bfin_write32(SIC_IAR4,val)
    46. 

  46. #define bfin_read_SIC_IAR5()                 bfin_read32(SIC_IAR5)
    47. 

  47. #define bfin_write_SIC_IAR5(val)             bfin_write32(SIC_IAR5,val)
    48. 

  48. #define bfin_read_SIC_IAR6()                 bfin_read32(SIC_IAR6)
    49. 

  49. #define bfin_write_SIC_IAR6(val)             bfin_write32(SIC_IAR6,val)
    50. 

  50. #define bfin_read_SIC_IAR7()                 bfin_read32(SIC_IAR7)
    51. 

  51. #define bfin_write_SIC_IAR7(val)             bfin_write32(SIC_IAR7,val)
    52. 

  52. #define bfin_read_SIC_ISR0()                 bfin_read32(SIC_ISR0)
    53. 

  53. #define bfin_write_SIC_ISR0(val)             bfin_write32(SIC_ISR0,val)
    54. 

  54. #define bfin_read_SIC_ISR1()                 bfin_read32(SIC_ISR1)
    55. 

  55. #define bfin_write_SIC_ISR1(val)             bfin_write32(SIC_ISR1,val)
    56. 

  56. #define bfin_read_SIC_IWR0()                 bfin_read32(SIC_IWR0)
    57. 

  57. #define bfin_write_SIC_IWR0(val)             bfin_write32(SIC_IWR0,val)
    58. 

  58. #define bfin_read_SIC_IWR1()                 bfin_read32(SIC_IWR1)
    59. 

  59. #define bfin_write_SIC_IWR1(val)             bfin_write32(SIC_IWR1,val)
    60. 

  60. 

  61. /* System Reset and Interrupt Controller registers for Core B (0xFFC0 1100-0xFFC0 11FF) */
    62. 

  62. #define bfin_read_SICB_SWRST()               bfin_read16(SICB_SWRST)
    63. 

  63. #define bfin_write_SICB_SWRST(val)           bfin_write16(SICB_SWRST,val)
    64. 

  64. #define bfin_read_SICB_SYSCR()               bfin_read16(SICB_SYSCR)
    65. 

  65. #define bfin_write_SICB_SYSCR(val)           bfin_write16(SICB_SYSCR,val)
    66. 

  66. #define bfin_read_SICB_RVECT()               bfin_read16(SICB_RVECT)
    67. 

  67. #define bfin_write_SICB_RVECT(val)           bfin_write16(SICB_RVECT,val)
    68. 

  68. #define bfin_read_SICB_IMASK0()              bfin_read32(SICB_IMASK0)
    69. 

  69. #define bfin_write_SICB_IMASK0(val)          bfin_write32(SICB_IMASK0,val)
    70. 

  70. #define bfin_read_SICB_IMASK1()              bfin_read32(SICB_IMASK1)
    71. 

  71. #define bfin_write_SICB_IMASK1(val)          bfin_write32(SICB_IMASK1,val)
    72. 

  72. #define bfin_read_SICB_IAR0()                bfin_read32(SICB_IAR0)
    73. 

  73. #define bfin_write_SICB_IAR0(val)            bfin_write32(SICB_IAR0,val)
    74. 

  74. #define bfin_read_SICB_IAR1()                bfin_read32(SICB_IAR1)
    75. 

  75. #define bfin_write_SICB_IAR1(val)            bfin_write32(SICB_IAR1,val)
    76. 

  76. #define bfin_read_SICB_IAR2()                bfin_read32(SICB_IAR2)
    77. 

  77. #define bfin_write_SICB_IAR2(val)            bfin_write32(SICB_IAR2,val)
    78. 

  78. #define bfin_read_SICB_IAR3()                bfin_read32(SICB_IAR3)
    79. 

  79. #define bfin_write_SICB_IAR3(val)            bfin_write32(SICB_IAR3,val)
    80. 

  80. #define bfin_read_SICB_IAR4()                bfin_read32(SICB_IAR4)
    81. 

  81. #define bfin_write_SICB_IAR4(val)            bfin_write32(SICB_IAR4,val)
    82. 

  82. #define bfin_read_SICB_IAR5()                bfin_read32(SICB_IAR5)
    83. 

  83. #define bfin_write_SICB_IAR5(val)            bfin_write32(SICB_IAR5,val)
    84. 

  84. #define bfin_read_SICB_IAR6()                bfin_read32(SICB_IAR6)
    85. 

  85. #define bfin_write_SICB_IAR6(val)            bfin_write32(SICB_IAR6,val)
    86. 

  86. #define bfin_read_SICB_IAR7()                bfin_read32(SICB_IAR7)
    87. 

  87. #define bfin_write_SICB_IAR7(val)            bfin_write32(SICB_IAR7,val)
    88. 

  88. #define bfin_read_SICB_ISR0()                bfin_read32(SICB_ISR0)
    89. 

  89. #define bfin_write_SICB_ISR0(val)            bfin_write32(SICB_ISR0,val)
    90. 

  90. #define bfin_read_SICB_ISR1()                bfin_read32(SICB_ISR1)
    91. 

  91. #define bfin_write_SICB_ISR1(val)            bfin_write32(SICB_ISR1,val)
    92. 

  92. #define bfin_read_SICB_IWR0()                bfin_read32(SICB_IWR0)
    93. 

  93. #define bfin_write_SICB_IWR0(val)            bfin_write32(SICB_IWR0,val)
    94. 

  94. #define bfin_read_SICB_IWR1()                bfin_read32(SICB_IWR1)
    95. 

  95. #define bfin_write_SICB_IWR1(val)            bfin_write32(SICB_IWR1,val)
    96. 

  96. /* Watchdog Timer registers for Core A (0xFFC0 0200-0xFFC0 02FF) */
    97. 

  97. #define bfin_read_WDOGA_CTL()                bfin_read16(WDOGA_CTL)
    98. 

  98. #define bfin_write_WDOGA_CTL(val)            bfin_write16(WDOGA_CTL,val)
    99. 

  99. #define bfin_read_WDOGA_CNT()                bfin_read32(WDOGA_CNT)
    100. 

  100. #define bfin_write_WDOGA_CNT(val)            bfin_write32(WDOGA_CNT,val)
    101. 

  101. #define bfin_read_WDOGA_STAT()               bfin_read32(WDOGA_STAT)
    102. 

  102. #define bfin_write_WDOGA_STAT(val)           bfin_write32(WDOGA_STAT,val)
    103. 

  103. 

  104. /* Watchdog Timer registers for Core B (0xFFC0 1200-0xFFC0 12FF) */
    105. 

  105. #define bfin_read_WDOGB_CTL()                bfin_read16(WDOGB_CTL)
    106. 

  106. #define bfin_write_WDOGB_CTL(val)            bfin_write16(WDOGB_CTL,val)
    107. 

  107. #define bfin_read_WDOGB_CNT()                bfin_read32(WDOGB_CNT)
    108. 

  108. #define bfin_write_WDOGB_CNT(val)            bfin_write32(WDOGB_CNT,val)
    109. 

  109. #define bfin_read_WDOGB_STAT()               bfin_read32(WDOGB_STAT)
    110. 

  110. #define bfin_write_WDOGB_STAT(val)           bfin_write32(WDOGB_STAT,val)
    111. 

  111. 

  112. /* UART Controller (0xFFC00400 - 0xFFC004FF) */
    113. 

  113. #define bfin_read_UART_THR()                 bfin_read16(UART_THR)
    114. 

  114. #define bfin_write_UART_THR(val)             bfin_write16(UART_THR,val)
    115. 

  115. #define bfin_read_UART_RBR()                 bfin_read16(UART_RBR)
    116. 

  116. #define bfin_write_UART_RBR(val)             bfin_write16(UART_RBR,val)
    117. 

  117. #define bfin_read_UART_DLL()                 bfin_read16(UART_DLL)
    118. 

  118. #define bfin_write_UART_DLL(val)             bfin_write16(UART_DLL,val)
    119. 

  119. #define bfin_read_UART_IER()                 bfin_read16(UART_IER)
    120. 

  120. #define bfin_write_UART_IER(val)             bfin_write16(UART_IER,val)
    121. 

  121. #define bfin_read_UART_DLH()                 bfin_read16(UART_DLH)
    122. 

  122. #define bfin_write_UART_DLH(val)             bfin_write16(UART_DLH,val)
    123. 

  123. #define bfin_read_UART_IIR()                 bfin_read16(UART_IIR)
    124. 

  124. #define bfin_write_UART_IIR(val)             bfin_write16(UART_IIR,val)
    125. 

  125. #define bfin_read_UART_LCR()                 bfin_read16(UART_LCR)
    126. 

  126. #define bfin_write_UART_LCR(val)             bfin_write16(UART_LCR,val)
    127. 

  127. #define bfin_read_UART_MCR()                 bfin_read16(UART_MCR)
    128. 

  128. #define bfin_write_UART_MCR(val)             bfin_write16(UART_MCR,val)
    129. 

  129. #define bfin_read_UART_LSR()                 bfin_read16(UART_LSR)
    130. 

  130. #define bfin_write_UART_LSR(val)             bfin_write16(UART_LSR,val)
    131. 

  131. #define bfin_read_UART_MSR()                 bfin_read16(UART_MSR)
    132. 

  132. #define bfin_write_UART_MSR(val)             bfin_write16(UART_MSR,val)
    133. 

  133. #define bfin_read_UART_SCR()                 bfin_read16(UART_SCR)
    134. 

  134. #define bfin_write_UART_SCR(val)             bfin_write16(UART_SCR,val)
    135. 

  135. #define bfin_read_UART_GCTL()                bfin_read16(UART_GCTL)
    136. 

  136. #define bfin_write_UART_GCTL(val)            bfin_write16(UART_GCTL,val)
    137. 

  137. 

  138. /* SPI Controller (0xFFC00500 - 0xFFC005FF) */
    139. 

  139. #define bfin_read_SPI_CTL()                  bfin_read16(SPI_CTL)
    140. 

  140. #define bfin_write_SPI_CTL(val)              bfin_write16(SPI_CTL,val)
    141. 

  141. #define bfin_read_SPI_FLG()                  bfin_read16(SPI_FLG)
    142. 

  142. #define bfin_write_SPI_FLG(val)              bfin_write16(SPI_FLG,val)
    143. 

  143. #define bfin_read_SPI_STAT()                 bfin_read16(SPI_STAT)
    144. 

  144. #define bfin_write_SPI_STAT(val)             bfin_write16(SPI_STAT,val)
    145. 

  145. #define bfin_read_SPI_TDBR()                 bfin_read16(SPI_TDBR)
    146. 

  146. #define bfin_write_SPI_TDBR(val)             bfin_write16(SPI_TDBR,val)
    147. 

  147. #define bfin_read_SPI_RDBR()                 bfin_read16(SPI_RDBR)
    148. 

  148. #define bfin_write_SPI_RDBR(val)             bfin_write16(SPI_RDBR,val)
    149. 

  149. #define bfin_read_SPI_BAUD()                 bfin_read16(SPI_BAUD)
    150. 

  150. #define bfin_write_SPI_BAUD(val)             bfin_write16(SPI_BAUD,val)
    151. 

  151. #define bfin_read_SPI_SHADOW()               bfin_read16(SPI_SHADOW)
    152. 

  152. #define bfin_write_SPI_SHADOW(val)           bfin_write16(SPI_SHADOW,val)
    153. 

  153. 

  154. /* Timer 0-7 registers (0xFFC0 0600-0xFFC0 06FF) */
    155. 

  155. #define bfin_read_TIMER0_CONFIG()            bfin_read16(TIMER0_CONFIG)
    156. 

  156. #define bfin_write_TIMER0_CONFIG(val)        bfin_write16(TIMER0_CONFIG,val)
    157. 

  157. #define bfin_read_TIMER0_COUNTER()           bfin_read32(TIMER0_COUNTER)
    158. 

  158. #define bfin_write_TIMER0_COUNTER(val)       bfin_write32(TIMER0_COUNTER,val)
    159. 

  159. #define bfin_read_TIMER0_PERIOD()            bfin_read32(TIMER0_PERIOD)
    160. 

  160. #define bfin_write_TIMER0_PERIOD(val)        bfin_write32(TIMER0_PERIOD,val)
    161. 

  161. #define bfin_read_TIMER0_WIDTH()             bfin_read32(TIMER0_WIDTH)
    162. 

  162. #define bfin_write_TIMER0_WIDTH(val)         bfin_write32(TIMER0_WIDTH,val)
    163. 

  163. #define bfin_read_TIMER1_CONFIG()            bfin_read16(TIMER1_CONFIG)
    164. 

  164. #define bfin_write_TIMER1_CONFIG(val)        bfin_write16(TIMER1_CONFIG,val)
    165. 

  165. #define bfin_read_TIMER1_COUNTER()           bfin_read32(TIMER1_COUNTER)
    166. 

  166. #define bfin_write_TIMER1_COUNTER(val)       bfin_write32(TIMER1_COUNTER,val)
    167. 

  167. #define bfin_read_TIMER1_PERIOD()            bfin_read32(TIMER1_PERIOD)
    168. 

  168. #define bfin_write_TIMER1_PERIOD(val)        bfin_write32(TIMER1_PERIOD,val)
    169. 

  169. #define bfin_read_TIMER1_WIDTH()             bfin_read32(TIMER1_WIDTH)
    170. 

  170. #define bfin_write_TIMER1_WIDTH(val)         bfin_write32(TIMER1_WIDTH,val)
    171. 

  171. #define bfin_read_TIMER2_CONFIG()            bfin_read16(TIMER2_CONFIG)
    172. 

  172. #define bfin_write_TIMER2_CONFIG(val)        bfin_write16(TIMER2_CONFIG,val)
    173. 

  173. #define bfin_read_TIMER2_COUNTER()           bfin_read32(TIMER2_COUNTER)
    174. 

  174. #define bfin_write_TIMER2_COUNTER(val)       bfin_write32(TIMER2_COUNTER,val)
    175. 

  175. #define bfin_read_TIMER2_PERIOD()            bfin_read32(TIMER2_PERIOD)
    176. 

  176. #define bfin_write_TIMER2_PERIOD(val)        bfin_write32(TIMER2_PERIOD,val)
    177. 

  177. #define bfin_read_TIMER2_WIDTH()             bfin_read32(TIMER2_WIDTH)
    178. 

  178. #define bfin_write_TIMER2_WIDTH(val)         bfin_write32(TIMER2_WIDTH,val)
    179. 

  179. #define bfin_read_TIMER3_CONFIG()            bfin_read16(TIMER3_CONFIG)
    180. 

  180. #define bfin_write_TIMER3_CONFIG(val)        bfin_write16(TIMER3_CONFIG,val)
    181. 

  181. #define bfin_read_TIMER3_COUNTER()           bfin_read32(TIMER3_COUNTER)
    182. 

  182. #define bfin_write_TIMER3_COUNTER(val)       bfin_write32(TIMER3_COUNTER,val)
    183. 

  183. #define bfin_read_TIMER3_PERIOD()            bfin_read32(TIMER3_PERIOD)
    184. 

  184. #define bfin_write_TIMER3_PERIOD(val)        bfin_write32(TIMER3_PERIOD,val)
    185. 

  185. #define bfin_read_TIMER3_WIDTH()             bfin_read32(TIMER3_WIDTH)
    186. 

  186. #define bfin_write_TIMER3_WIDTH(val)         bfin_write32(TIMER3_WIDTH,val)
    187. 

  187. #define bfin_read_TIMER4_CONFIG()            bfin_read16(TIMER4_CONFIG)
    188. 

  188. #define bfin_write_TIMER4_CONFIG(val)        bfin_write16(TIMER4_CONFIG,val)
    189. 

  189. #define bfin_read_TIMER4_COUNTER()           bfin_read32(TIMER4_COUNTER)
    190. 

  190. #define bfin_write_TIMER4_COUNTER(val)       bfin_write32(TIMER4_COUNTER,val)
    191. 

  191. #define bfin_read_TIMER4_PERIOD()            bfin_read32(TIMER4_PERIOD)
    192. 

  192. #define bfin_write_TIMER4_PERIOD(val)        bfin_write32(TIMER4_PERIOD,val)
    193. 

  193. #define bfin_read_TIMER4_WIDTH()             bfin_read32(TIMER4_WIDTH)
    194. 

  194. #define bfin_write_TIMER4_WIDTH(val)         bfin_write32(TIMER4_WIDTH,val)
    195. 

  195. #define bfin_read_TIMER5_CONFIG()            bfin_read16(TIMER5_CONFIG)
    196. 

  196. #define bfin_write_TIMER5_CONFIG(val)        bfin_write16(TIMER5_CONFIG,val)
    197. 

  197. #define bfin_read_TIMER5_COUNTER()           bfin_read32(TIMER5_COUNTER)
    198. 

  198. #define bfin_write_TIMER5_COUNTER(val)       bfin_write32(TIMER5_COUNTER,val)
    199. 

  199. #define bfin_read_TIMER5_PERIOD()            bfin_read32(TIMER5_PERIOD)
    200. 

  200. #define bfin_write_TIMER5_PERIOD(val)        bfin_write32(TIMER5_PERIOD,val)
    201. 

  201. #define bfin_read_TIMER5_WIDTH()             bfin_read32(TIMER5_WIDTH)
    202. 

  202. #define bfin_write_TIMER5_WIDTH(val)         bfin_write32(TIMER5_WIDTH,val)
    203. 

  203. #define bfin_read_TIMER6_CONFIG()            bfin_read16(TIMER6_CONFIG)
    204. 

  204. #define bfin_write_TIMER6_CONFIG(val)        bfin_write16(TIMER6_CONFIG,val)
    205. 

  205. #define bfin_read_TIMER6_COUNTER()           bfin_read32(TIMER6_COUNTER)
    206. 

  206. #define bfin_write_TIMER6_COUNTER(val)       bfin_write32(TIMER6_COUNTER,val)
    207. 

  207. #define bfin_read_TIMER6_PERIOD()            bfin_read32(TIMER6_PERIOD)
    208. 

  208. #define bfin_write_TIMER6_PERIOD(val)        bfin_write32(TIMER6_PERIOD,val)
    209. 

  209. #define bfin_read_TIMER6_WIDTH()             bfin_read32(TIMER6_WIDTH)
    210. 

  210. #define bfin_write_TIMER6_WIDTH(val)         bfin_write32(TIMER6_WIDTH,val)
    211. 

  211. #define bfin_read_TIMER7_CONFIG()            bfin_read16(TIMER7_CONFIG)
    212. 

  212. #define bfin_write_TIMER7_CONFIG(val)        bfin_write16(TIMER7_CONFIG,val)
    213. 

  213. #define bfin_read_TIMER7_COUNTER()           bfin_read32(TIMER7_COUNTER)
    214. 

  214. #define bfin_write_TIMER7_COUNTER(val)       bfin_write32(TIMER7_COUNTER,val)
    215. 

  215. #define bfin_read_TIMER7_PERIOD()            bfin_read32(TIMER7_PERIOD)
    216. 

  216. #define bfin_write_TIMER7_PERIOD(val)        bfin_write32(TIMER7_PERIOD,val)
    217. 

  217. #define bfin_read_TIMER7_WIDTH()             bfin_read32(TIMER7_WIDTH)
    218. 

  218. #define bfin_write_TIMER7_WIDTH(val)         bfin_write32(TIMER7_WIDTH,val)
    219. 

  219. 

  220. /* Timer registers 8-11 (0xFFC0 1600-0xFFC0 16FF) */
    221. 

  221. #define bfin_read_TMRS8_ENABLE()             bfin_read16(TMRS8_ENABLE)
    222. 

  222. #define bfin_write_TMRS8_ENABLE(val)         bfin_write16(TMRS8_ENABLE,val)
    223. 

  223. #define bfin_read_TMRS8_DISABLE()            bfin_read16(TMRS8_DISABLE)
    224. 

  224. #define bfin_write_TMRS8_DISABLE(val)        bfin_write16(TMRS8_DISABLE,val)
    225. 

  225. #define bfin_read_TMRS8_STATUS()             bfin_read32(TMRS8_STATUS)
    226. 

  226. #define bfin_write_TMRS8_STATUS(val)         bfin_write32(TMRS8_STATUS,val)
    227. 

  227. #define bfin_read_TIMER8_CONFIG()            bfin_read16(TIMER8_CONFIG)
    228. 

  228. #define bfin_write_TIMER8_CONFIG(val)        bfin_write16(TIMER8_CONFIG,val)
    229. 

  229. #define bfin_read_TIMER8_COUNTER()           bfin_read32(TIMER8_COUNTER)
    230. 

  230. #define bfin_write_TIMER8_COUNTER(val)       bfin_write32(TIMER8_COUNTER,val)
    231. 

  231. #define bfin_read_TIMER8_PERIOD()            bfin_read32(TIMER8_PERIOD)
    232. 

  232. #define bfin_write_TIMER8_PERIOD(val)        bfin_write32(TIMER8_PERIOD,val)
    233. 

  233. #define bfin_read_TIMER8_WIDTH()             bfin_read32(TIMER8_WIDTH)
    234. 

  234. #define bfin_write_TIMER8_WIDTH(val)         bfin_write32(TIMER8_WIDTH,val)
    235. 

  235. #define bfin_read_TIMER9_CONFIG()            bfin_read16(TIMER9_CONFIG)
    236. 

  236. #define bfin_write_TIMER9_CONFIG(val)        bfin_write16(TIMER9_CONFIG,val)
    237. 

  237. #define bfin_read_TIMER9_COUNTER()           bfin_read32(TIMER9_COUNTER)
    238. 

  238. #define bfin_write_TIMER9_COUNTER(val)       bfin_write32(TIMER9_COUNTER,val)
    239. 

  239. #define bfin_read_TIMER9_PERIOD()            bfin_read32(TIMER9_PERIOD)
    240. 

  240. #define bfin_write_TIMER9_PERIOD(val)        bfin_write32(TIMER9_PERIOD,val)
    241. 

  241. #define bfin_read_TIMER9_WIDTH()             bfin_read32(TIMER9_WIDTH)
    242. 

  242. #define bfin_write_TIMER9_WIDTH(val)         bfin_write32(TIMER9_WIDTH,val)
    243. 

  243. #define bfin_read_TIMER10_CONFIG()           bfin_read16(TIMER10_CONFIG)
    244. 

  244. #define bfin_write_TIMER10_CONFIG(val)       bfin_write16(TIMER10_CONFIG,val)
    245. 

  245. #define bfin_read_TIMER10_COUNTER()          bfin_read32(TIMER10_COUNTER)
    246. 

  246. #define bfin_write_TIMER10_COUNTER(val)      bfin_write32(TIMER10_COUNTER,val)
    247. 

  247. #define bfin_read_TIMER10_PERIOD()           bfin_read32(TIMER10_PERIOD)
    248. 

  248. #define bfin_write_TIMER10_PERIOD(val)       bfin_write32(TIMER10_PERIOD,val)
    249. 

  249. #define bfin_read_TIMER10_WIDTH()            bfin_read32(TIMER10_WIDTH)
    250. 

  250. #define bfin_write_TIMER10_WIDTH(val)        bfin_write32(TIMER10_WIDTH,val)
    251. 

  251. #define bfin_read_TIMER11_CONFIG()           bfin_read16(TIMER11_CONFIG)
    252. 

  252. #define bfin_write_TIMER11_CONFIG(val)       bfin_write16(TIMER11_CONFIG,val)
    253. 

  253. #define bfin_read_TIMER11_COUNTER()          bfin_read32(TIMER11_COUNTER)
    254. 

  254. #define bfin_write_TIMER11_COUNTER(val)      bfin_write32(TIMER11_COUNTER,val)
    255. 

  255. #define bfin_read_TIMER11_PERIOD()           bfin_read32(TIMER11_PERIOD)
    256. 

  256. #define bfin_write_TIMER11_PERIOD(val)       bfin_write32(TIMER11_PERIOD,val)
    257. 

  257. #define bfin_read_TIMER11_WIDTH()            bfin_read32(TIMER11_WIDTH)
    258. 

  258. #define bfin_write_TIMER11_WIDTH(val)        bfin_write32(TIMER11_WIDTH,val)
    259. 

  259. #define bfin_read_TMRS4_ENABLE()             bfin_read16(TMRS4_ENABLE)
    260. 

  260. #define bfin_write_TMRS4_ENABLE(val)         bfin_write16(TMRS4_ENABLE,val)
    261. 

  261. #define bfin_read_TMRS4_DISABLE()            bfin_read16(TMRS4_DISABLE)
    262. 

  262. #define bfin_write_TMRS4_DISABLE(val)        bfin_write16(TMRS4_DISABLE,val)
    263. 

  263. #define bfin_read_TMRS4_STATUS()             bfin_read32(TMRS4_STATUS)
    264. 

  264. #define bfin_write_TMRS4_STATUS(val)         bfin_write32(TMRS4_STATUS,val)
    265. 

  265. 

  266. /* Programmable Flag 0 registers (0xFFC0 0700-0xFFC0 07FF) */
    267. 

  267. #define bfin_read_FIO0_FLAG_D()              bfin_read16(FIO0_FLAG_D)
    268. 

  268. #define bfin_write_FIO0_FLAG_D(val)          bfin_write16(FIO0_FLAG_D,val)
    269. 

  269. #define bfin_read_FIO0_FLAG_C()              bfin_read16(FIO0_FLAG_C)
    270. 

  270. #define bfin_write_FIO0_FLAG_C(val)          bfin_write16(FIO0_FLAG_C,val)
    271. 

  271. #define bfin_read_FIO0_FLAG_S()              bfin_read16(FIO0_FLAG_S)
    272. 

  272. #define bfin_write_FIO0_FLAG_S(val)          bfin_write16(FIO0_FLAG_S,val)
    273. 

  273. #define bfin_read_FIO0_FLAG_T()              bfin_read16(FIO0_FLAG_T)
    274. 

  274. #define bfin_write_FIO0_FLAG_T(val)          bfin_write16(FIO0_FLAG_T,val)
    275. 

  275. #define bfin_read_FIO0_MASKA_D()             bfin_read16(FIO0_MASKA_D)
    276. 

  276. #define bfin_write_FIO0_MASKA_D(val)         bfin_write16(FIO0_MASKA_D,val)
    277. 

  277. #define bfin_read_FIO0_MASKA_C()             bfin_read16(FIO0_MASKA_C)
    278. 

  278. #define bfin_write_FIO0_MASKA_C(val)         bfin_write16(FIO0_MASKA_C,val)
    279. 

  279. #define bfin_read_FIO0_MASKA_S()             bfin_read16(FIO0_MASKA_S)
    280. 

  280. #define bfin_write_FIO0_MASKA_S(val)         bfin_write16(FIO0_MASKA_S,val)
    281. 

  281. #define bfin_read_FIO0_MASKA_T()             bfin_read16(FIO0_MASKA_T)
    282. 

  282. #define bfin_write_FIO0_MASKA_T(val)         bfin_write16(FIO0_MASKA_T,val)
    283. 

  283. #define bfin_read_FIO0_MASKB_D()             bfin_read16(FIO0_MASKB_D)
    284. 

  284. #define bfin_write_FIO0_MASKB_D(val)         bfin_write16(FIO0_MASKB_D,val)
    285. 

  285. #define bfin_read_FIO0_MASKB_C()             bfin_read16(FIO0_MASKB_C)
    286. 

  286. #define bfin_write_FIO0_MASKB_C(val)         bfin_write16(FIO0_MASKB_C,val)
    287. 

  287. #define bfin_read_FIO0_MASKB_S()             bfin_read16(FIO0_MASKB_S)
    288. 

  288. #define bfin_write_FIO0_MASKB_S(val)         bfin_write16(FIO0_MASKB_S,val)
    289. 

  289. #define bfin_read_FIO0_MASKB_T()             bfin_read16(FIO0_MASKB_T)
    290. 

  290. #define bfin_write_FIO0_MASKB_T(val)         bfin_write16(FIO0_MASKB_T,val)
    291. 

  291. #define bfin_read_FIO0_DIR()                 bfin_read16(FIO0_DIR)
    292. 

  292. #define bfin_write_FIO0_DIR(val)             bfin_write16(FIO0_DIR,val)
    293. 

  293. #define bfin_read_FIO0_POLAR()               bfin_read16(FIO0_POLAR)
    294. 

  294. #define bfin_write_FIO0_POLAR(val)           bfin_write16(FIO0_POLAR,val)
    295. 

  295. #define bfin_read_FIO0_EDGE()                bfin_read16(FIO0_EDGE)
    296. 

  296. #define bfin_write_FIO0_EDGE(val)            bfin_write16(FIO0_EDGE,val)
    297. 

  297. #define bfin_read_FIO0_BOTH()                bfin_read16(FIO0_BOTH)
    298. 

  298. #define bfin_write_FIO0_BOTH(val)            bfin_write16(FIO0_BOTH,val)
    299. 

  299. #define bfin_read_FIO0_INEN()                bfin_read16(FIO0_INEN)
    300. 

  300. #define bfin_write_FIO0_INEN(val)            bfin_write16(FIO0_INEN,val)
    301. 

  301. /* Programmable Flag 1 registers (0xFFC0 1500-0xFFC0 15FF) */
    302. 

  302. #define bfin_read_FIO1_FLAG_D()              bfin_read16(FIO1_FLAG_D)
    303. 

  303. #define bfin_write_FIO1_FLAG_D(val)          bfin_write16(FIO1_FLAG_D,val)
    304. 

  304. #define bfin_read_FIO1_FLAG_C()              bfin_read16(FIO1_FLAG_C)
    305. 

  305. #define bfin_write_FIO1_FLAG_C(val)          bfin_write16(FIO1_FLAG_C,val)
    306. 

  306. #define bfin_read_FIO1_FLAG_S()              bfin_read16(FIO1_FLAG_S)
    307. 

  307. #define bfin_write_FIO1_FLAG_S(val)          bfin_write16(FIO1_FLAG_S,val)
    308. 

  308. #define bfin_read_FIO1_FLAG_T()              bfin_read16(FIO1_FLAG_T)
    309. 

  309. #define bfin_write_FIO1_FLAG_T(val)          bfin_write16(FIO1_FLAG_T,val)
    310. 

  310. #define bfin_read_FIO1_MASKA_D()             bfin_read16(FIO1_MASKA_D)
    311. 

  311. #define bfin_write_FIO1_MASKA_D(val)         bfin_write16(FIO1_MASKA_D,val)
    312. 

  312. #define bfin_read_FIO1_MASKA_C()             bfin_read16(FIO1_MASKA_C)
    313. 

  313. #define bfin_write_FIO1_MASKA_C(val)         bfin_write16(FIO1_MASKA_C,val)
    314. 

  314. #define bfin_read_FIO1_MASKA_S()             bfin_read16(FIO1_MASKA_S)
    315. 

  315. #define bfin_write_FIO1_MASKA_S(val)         bfin_write16(FIO1_MASKA_S,val)
    316. 

  316. #define bfin_read_FIO1_MASKA_T()             bfin_read16(FIO1_MASKA_T)
    317. 

  317. #define bfin_write_FIO1_MASKA_T(val)         bfin_write16(FIO1_MASKA_T,val)
    318. 

  318. #define bfin_read_FIO1_MASKB_D()             bfin_read16(FIO1_MASKB_D)
    319. 

  319. #define bfin_write_FIO1_MASKB_D(val)         bfin_write16(FIO1_MASKB_D,val)
    320. 

  320. #define bfin_read_FIO1_MASKB_C()             bfin_read16(FIO1_MASKB_C)
    321. 

  321. #define bfin_write_FIO1_MASKB_C(val)         bfin_write16(FIO1_MASKB_C,val)
    322. 

  322. #define bfin_read_FIO1_MASKB_S()             bfin_read16(FIO1_MASKB_S)
    323. 

  323. #define bfin_write_FIO1_MASKB_S(val)         bfin_write16(FIO1_MASKB_S,val)
    324. 

  324. #define bfin_read_FIO1_MASKB_T()             bfin_read16(FIO1_MASKB_T)
    325. 

  325. #define bfin_write_FIO1_MASKB_T(val)         bfin_write16(FIO1_MASKB_T,val)
    326. 

  326. #define bfin_read_FIO1_DIR()                 bfin_read16(FIO1_DIR)
    327. 

  327. #define bfin_write_FIO1_DIR(val)             bfin_write16(FIO1_DIR,val)
    328. 

  328. #define bfin_read_FIO1_POLAR()               bfin_read16(FIO1_POLAR)
    329. 

  329. #define bfin_write_FIO1_POLAR(val)           bfin_write16(FIO1_POLAR,val)
    330. 

  330. #define bfin_read_FIO1_EDGE()                bfin_read16(FIO1_EDGE)
    331. 

  331. #define bfin_write_FIO1_EDGE(val)            bfin_write16(FIO1_EDGE,val)
    332. 

  332. #define bfin_read_FIO1_BOTH()                bfin_read16(FIO1_BOTH)
    333. 

  333. #define bfin_write_FIO1_BOTH(val)            bfin_write16(FIO1_BOTH,val)
    334. 

  334. #define bfin_read_FIO1_INEN()                bfin_read16(FIO1_INEN)
    335. 

  335. #define bfin_write_FIO1_INEN(val)            bfin_write16(FIO1_INEN,val)
    336. 

  336. /* Programmable Flag registers (0xFFC0 1700-0xFFC0 17FF) */
    337. 

  337. #define bfin_read_FIO2_FLAG_D()              bfin_read16(FIO2_FLAG_D)
    338. 

  338. #define bfin_write_FIO2_FLAG_D(val)          bfin_write16(FIO2_FLAG_D,val)
    339. 

  339. #define bfin_read_FIO2_FLAG_C()              bfin_read16(FIO2_FLAG_C)
    340. 

  340. #define bfin_write_FIO2_FLAG_C(val)          bfin_write16(FIO2_FLAG_C,val)
    341. 

  341. #define bfin_read_FIO2_FLAG_S()              bfin_read16(FIO2_FLAG_S)
    342. 

  342. #define bfin_write_FIO2_FLAG_S(val)          bfin_write16(FIO2_FLAG_S,val)
    343. 

  343. #define bfin_read_FIO2_FLAG_T()              bfin_read16(FIO2_FLAG_T)
    344. 

  344. #define bfin_write_FIO2_FLAG_T(val)          bfin_write16(FIO2_FLAG_T,val)
    345. 

  345. #define bfin_read_FIO2_MASKA_D()             bfin_read16(FIO2_MASKA_D)
    346. 

  346. #define bfin_write_FIO2_MASKA_D(val)         bfin_write16(FIO2_MASKA_D,val)
    347. 

  347. #define bfin_read_FIO2_MASKA_C()             bfin_read16(FIO2_MASKA_C)
    348. 

  348. #define bfin_write_FIO2_MASKA_C(val)         bfin_write16(FIO2_MASKA_C,val)
    349. 

  349. #define bfin_read_FIO2_MASKA_S()             bfin_read16(FIO2_MASKA_S)
    350. 

  350. #define bfin_write_FIO2_MASKA_S(val)         bfin_write16(FIO2_MASKA_S,val)
    351. 

  351. #define bfin_read_FIO2_MASKA_T()             bfin_read16(FIO2_MASKA_T)
    352. 

  352. #define bfin_write_FIO2_MASKA_T(val)         bfin_write16(FIO2_MASKA_T,val)
    353. 

  353. #define bfin_read_FIO2_MASKB_D()             bfin_read16(FIO2_MASKB_D)
    354. 

  354. #define bfin_write_FIO2_MASKB_D(val)         bfin_write16(FIO2_MASKB_D,val)
    355. 

  355. #define bfin_read_FIO2_MASKB_C()             bfin_read16(FIO2_MASKB_C)
    356. 

  356. #define bfin_write_FIO2_MASKB_C(val)         bfin_write16(FIO2_MASKB_C,val)
    357. 

  357. #define bfin_read_FIO2_MASKB_S()             bfin_read16(FIO2_MASKB_S)
    358. 

  358. #define bfin_write_FIO2_MASKB_S(val)         bfin_write16(FIO2_MASKB_S,val)
    359. 

  359. #define bfin_read_FIO2_MASKB_T()             bfin_read16(FIO2_MASKB_T)
    360. 

  360. #define bfin_write_FIO2_MASKB_T(val)         bfin_write16(FIO2_MASKB_T,val)
    361. 

  361. #define bfin_read_FIO2_DIR()                 bfin_read16(FIO2_DIR)
    362. 

  362. #define bfin_write_FIO2_DIR(val)             bfin_write16(FIO2_DIR,val)
    363. 

  363. #define bfin_read_FIO2_POLAR()               bfin_read16(FIO2_POLAR)
    364. 

  364. #define bfin_write_FIO2_POLAR(val)           bfin_write16(FIO2_POLAR,val)
    365. 

  365. #define bfin_read_FIO2_EDGE()                bfin_read16(FIO2_EDGE)
    366. 

  366. #define bfin_write_FIO2_EDGE(val)            bfin_write16(FIO2_EDGE,val)
    367. 

  367. #define bfin_read_FIO2_BOTH()                bfin_read16(FIO2_BOTH)
    368. 

  368. #define bfin_write_FIO2_BOTH(val)            bfin_write16(FIO2_BOTH,val)
    369. 

  369. #define bfin_read_FIO2_INEN()                bfin_read16(FIO2_INEN)
    370. 

  370. #define bfin_write_FIO2_INEN(val)            bfin_write16(FIO2_INEN,val)
    371. 

  371. /* SPORT0 Controller (0xFFC00800 - 0xFFC008FF) */
    372. 

  372. #define bfin_read_SPORT0_TCR1()              bfin_read16(SPORT0_TCR1)
    373. 

  373. #define bfin_write_SPORT0_TCR1(val)          bfin_write16(SPORT0_TCR1,val)
    374. 

  374. #define bfin_read_SPORT0_TCR2()              bfin_read16(SPORT0_TCR2)
    375. 

  375. #define bfin_write_SPORT0_TCR2(val)          bfin_write16(SPORT0_TCR2,val)
    376. 

  376. #define bfin_read_SPORT0_TCLKDIV()           bfin_read16(SPORT0_TCLKDIV)
    377. 

  377. #define bfin_write_SPORT0_TCLKDIV(val)       bfin_write16(SPORT0_TCLKDIV,val)
    378. 

  378. #define bfin_read_SPORT0_TFSDIV()            bfin_read16(SPORT0_TFSDIV)
    379. 

  379. #define bfin_write_SPORT0_TFSDIV(val)        bfin_write16(SPORT0_TFSDIV,val)
    380. 

  380. #define bfin_read_SPORT0_TX()                bfin_read32(SPORT0_TX)
    381. 

  381. #define bfin_write_SPORT0_TX(val)            bfin_write32(SPORT0_TX,val)
    382. 

  382. #define bfin_read_SPORT0_RX()                bfin_read32(SPORT0_RX)
    383. 

  383. #define bfin_write_SPORT0_RX(val)            bfin_write32(SPORT0_RX,val)
    384. 

  384. #define bfin_read_SPORT0_TX32()              bfin_read32(SPORT0_TX)
    385. 

  385. #define bfin_write_SPORT0_TX32(val)          bfin_write32(SPORT0_TX,val)
    386. 

  386. #define bfin_read_SPORT0_RX32()              bfin_read32(SPORT0_RX)
    387. 

  387. #define bfin_write_SPORT0_RX32(val)          bfin_write32(SPORT0_RX,val)
    388. 

  388. #define bfin_read_SPORT0_TX16()              bfin_read16(SPORT0_TX)
    389. 

  389. #define bfin_write_SPORT0_TX16(val)          bfin_write16(SPORT0_TX,val)
    390. 

  390. #define bfin_read_SPORT0_RX16()              bfin_read16(SPORT0_RX)
    391. 

  391. #define bfin_write_SPORT0_RX16(val)          bfin_write16(SPORT0_RX,val)
    392. 

  392. #define bfin_read_SPORT0_RCR1()              bfin_read16(SPORT0_RCR1)
    393. 

  393. #define bfin_write_SPORT0_RCR1(val)          bfin_write16(SPORT0_RCR1,val)
    394. 

  394. #define bfin_read_SPORT0_RCR2()              bfin_read16(SPORT0_RCR2)
    395. 

  395. #define bfin_write_SPORT0_RCR2(val)          bfin_write16(SPORT0_RCR2,val)
    396. 

  396. #define bfin_read_SPORT0_RCLKDIV()           bfin_read16(SPORT0_RCLKDIV)
    397. 

  397. #define bfin_write_SPORT0_RCLKDIV(val)       bfin_write16(SPORT0_RCLKDIV,val)
    398. 

  398. #define bfin_read_SPORT0_RFSDIV()            bfin_read16(SPORT0_RFSDIV)
    399. 

  399. #define bfin_write_SPORT0_RFSDIV(val)        bfin_write16(SPORT0_RFSDIV,val)
    400. 

  400. #define bfin_read_SPORT0_STAT()              bfin_read16(SPORT0_STAT)
    401. 

  401. #define bfin_write_SPORT0_STAT(val)          bfin_write16(SPORT0_STAT,val)
    402. 

  402. #define bfin_read_SPORT0_CHNL()              bfin_read16(SPORT0_CHNL)
    403. 

  403. #define bfin_write_SPORT0_CHNL(val)          bfin_write16(SPORT0_CHNL,val)
    404. 

  404. #define bfin_read_SPORT0_MCMC1()             bfin_read16(SPORT0_MCMC1)
    405. 

  405. #define bfin_write_SPORT0_MCMC1(val)         bfin_write16(SPORT0_MCMC1,val)
    406. 

  406. #define bfin_read_SPORT0_MCMC2()             bfin_read16(SPORT0_MCMC2)
    407. 

  407. #define bfin_write_SPORT0_MCMC2(val)         bfin_write16(SPORT0_MCMC2,val)
    408. 

  408. #define bfin_read_SPORT0_MTCS0()             bfin_read32(SPORT0_MTCS0)
    409. 

  409. #define bfin_write_SPORT0_MTCS0(val)         bfin_write32(SPORT0_MTCS0,val)
    410. 

  410. #define bfin_read_SPORT0_MTCS1()             bfin_read32(SPORT0_MTCS1)
    411. 

  411. #define bfin_write_SPORT0_MTCS1(val)         bfin_write32(SPORT0_MTCS1,val)
    412. 

  412. #define bfin_read_SPORT0_MTCS2()             bfin_read32(SPORT0_MTCS2)
    413. 

  413. #define bfin_write_SPORT0_MTCS2(val)         bfin_write32(SPORT0_MTCS2,val)
    414. 

  414. #define bfin_read_SPORT0_MTCS3()             bfin_read32(SPORT0_MTCS3)
    415. 

  415. #define bfin_write_SPORT0_MTCS3(val)         bfin_write32(SPORT0_MTCS3,val)
    416. 

  416. #define bfin_read_SPORT0_MRCS0()             bfin_read32(SPORT0_MRCS0)
    417. 

  417. #define bfin_write_SPORT0_MRCS0(val)         bfin_write32(SPORT0_MRCS0,val)
    418. 

  418. #define bfin_read_SPORT0_MRCS1()             bfin_read32(SPORT0_MRCS1)
    419. 

  419. #define bfin_write_SPORT0_MRCS1(val)         bfin_write32(SPORT0_MRCS1,val)
    420. 

  420. #define bfin_read_SPORT0_MRCS2()             bfin_read32(SPORT0_MRCS2)
    421. 

  421. #define bfin_write_SPORT0_MRCS2(val)         bfin_write32(SPORT0_MRCS2,val)
    422. 

  422. #define bfin_read_SPORT0_MRCS3()             bfin_read32(SPORT0_MRCS3)
    423. 

  423. #define bfin_write_SPORT0_MRCS3(val)         bfin_write32(SPORT0_MRCS3,val)
    424. 

  424. /* SPORT1 Controller (0xFFC00900 - 0xFFC009FF) */
    425. 

  425. #define bfin_read_SPORT1_TCR1()              bfin_read16(SPORT1_TCR1)
    426. 

  426. #define bfin_write_SPORT1_TCR1(val)          bfin_write16(SPORT1_TCR1,val)
    427. 

  427. #define bfin_read_SPORT1_TCR2()              bfin_read16(SPORT1_TCR2)
    428. 

  428. #define bfin_write_SPORT1_TCR2(val)          bfin_write16(SPORT1_TCR2,val)
    429. 

  429. #define bfin_read_SPORT1_TCLKDIV()           bfin_read16(SPORT1_TCLKDIV)
    430. 

  430. #define bfin_write_SPORT1_TCLKDIV(val)       bfin_write16(SPORT1_TCLKDIV,val)
    431. 

  431. #define bfin_read_SPORT1_TFSDIV()            bfin_read16(SPORT1_TFSDIV)
    432. 

  432. #define bfin_write_SPORT1_TFSDIV(val)        bfin_write16(SPORT1_TFSDIV,val)
    433. 

  433. #define bfin_read_SPORT1_TX()                bfin_read32(SPORT1_TX)
    434. 

  434. #define bfin_write_SPORT1_TX(val)            bfin_write32(SPORT1_TX,val)
    435. 

  435. #define bfin_read_SPORT1_RX()                bfin_read32(SPORT1_RX)
    436. 

  436. #define bfin_write_SPORT1_RX(val)            bfin_write32(SPORT1_RX,val)
    437. 

  437. #define bfin_read_SPORT1_TX32()              bfin_read32(SPORT1_TX)
    438. 

  438. #define bfin_write_SPORT1_TX32(val)          bfin_write32(SPORT1_TX,val)
    439. 

  439. #define bfin_read_SPORT1_RX32()              bfin_read32(SPORT1_RX)
    440. 

  440. #define bfin_write_SPORT1_RX32(val)          bfin_write32(SPORT1_RX,val)
    441. 

  441. #define bfin_read_SPORT1_TX16()              bfin_read16(SPORT1_TX)
    442. 

  442. #define bfin_write_SPORT1_TX16(val)          bfin_write16(SPORT1_TX,val)
    443. 

  443. #define bfin_read_SPORT1_RX16()              bfin_read16(SPORT1_RX)
    444. 

  444. #define bfin_write_SPORT1_RX16(val)          bfin_write16(SPORT1_RX,val)
    445. 

  445. #define bfin_read_SPORT1_RCR1()              bfin_read16(SPORT1_RCR1)
    446. 

  446. #define bfin_write_SPORT1_RCR1(val)          bfin_write16(SPORT1_RCR1,val)
    447. 

  447. #define bfin_read_SPORT1_RCR2()              bfin_read16(SPORT1_RCR2)
    448. 

  448. #define bfin_write_SPORT1_RCR2(val)          bfin_write16(SPORT1_RCR2,val)
    449. 

  449. #define bfin_read_SPORT1_RCLKDIV()           bfin_read16(SPORT1_RCLKDIV)
    450. 

  450. #define bfin_write_SPORT1_RCLKDIV(val)       bfin_write16(SPORT1_RCLKDIV,val)
    451. 

  451. #define bfin_read_SPORT1_RFSDIV()            bfin_read16(SPORT1_RFSDIV)
    452. 

  452. #define bfin_write_SPORT1_RFSDIV(val)        bfin_write16(SPORT1_RFSDIV,val)
    453. 

  453. #define bfin_read_SPORT1_STAT()              bfin_read16(SPORT1_STAT)
    454. 

  454. #define bfin_write_SPORT1_STAT(val)          bfin_write16(SPORT1_STAT,val)
    455. 

  455. #define bfin_read_SPORT1_CHNL()              bfin_read16(SPORT1_CHNL)
    456. 

  456. #define bfin_write_SPORT1_CHNL(val)          bfin_write16(SPORT1_CHNL,val)
    457. 

  457. #define bfin_read_SPORT1_MCMC1()             bfin_read16(SPORT1_MCMC1)
    458. 

  458. #define bfin_write_SPORT1_MCMC1(val)         bfin_write16(SPORT1_MCMC1,val)
    459. 

  459. #define bfin_read_SPORT1_MCMC2()             bfin_read16(SPORT1_MCMC2)
    460. 

  460. #define bfin_write_SPORT1_MCMC2(val)         bfin_write16(SPORT1_MCMC2,val)
    461. 

  461. #define bfin_read_SPORT1_MTCS0()             bfin_read32(SPORT1_MTCS0)
    462. 

  462. #define bfin_write_SPORT1_MTCS0(val)         bfin_write32(SPORT1_MTCS0,val)
    463. 

  463. #define bfin_read_SPORT1_MTCS1()             bfin_read32(SPORT1_MTCS1)
    464. 

  464. #define bfin_write_SPORT1_MTCS1(val)         bfin_write32(SPORT1_MTCS1,val)
    465. 

  465. #define bfin_read_SPORT1_MTCS2()             bfin_read32(SPORT1_MTCS2)
    466. 

  466. #define bfin_write_SPORT1_MTCS2(val)         bfin_write32(SPORT1_MTCS2,val)
    467. 

  467. #define bfin_read_SPORT1_MTCS3()             bfin_read32(SPORT1_MTCS3)
    468. 

  468. #define bfin_write_SPORT1_MTCS3(val)         bfin_write32(SPORT1_MTCS3,val)
    469. 

  469. #define bfin_read_SPORT1_MRCS0()             bfin_read32(SPORT1_MRCS0)
    470. 

  470. #define bfin_write_SPORT1_MRCS0(val)         bfin_write32(SPORT1_MRCS0,val)
    471. 

  471. #define bfin_read_SPORT1_MRCS1()             bfin_read32(SPORT1_MRCS1)
    472. 

  472. #define bfin_write_SPORT1_MRCS1(val)         bfin_write32(SPORT1_MRCS1,val)
    473. 

  473. #define bfin_read_SPORT1_MRCS2()             bfin_read32(SPORT1_MRCS2)
    474. 

  474. #define bfin_write_SPORT1_MRCS2(val)         bfin_write32(SPORT1_MRCS2,val)
    475. 

  475. #define bfin_read_SPORT1_MRCS3()             bfin_read32(SPORT1_MRCS3)
    476. 

  476. #define bfin_write_SPORT1_MRCS3(val)         bfin_write32(SPORT1_MRCS3,val)
    477. 

  477. /* Asynchronous Memory Controller - External Bus Interface Unit */
    478. 

  478. #define bfin_read_EBIU_AMGCTL()              bfin_read16(EBIU_AMGCTL)
    479. 

  479. #define bfin_write_EBIU_AMGCTL(val)          bfin_write16(EBIU_AMGCTL,val)
    480. 

  480. #define bfin_read_EBIU_AMBCTL0()             bfin_read32(EBIU_AMBCTL0)
    481. 

  481. #define bfin_write_EBIU_AMBCTL0(val)         bfin_write32(EBIU_AMBCTL0,val)
    482. 

  482. #define bfin_read_EBIU_AMBCTL1()             bfin_read32(EBIU_AMBCTL1)
    483. 

  483. #define bfin_write_EBIU_AMBCTL1(val)         bfin_write32(EBIU_AMBCTL1,val)
    484. 

  484. /* SDRAM Controller External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF) */
    485. 

  485. #define bfin_read_EBIU_SDGCTL()              bfin_read32(EBIU_SDGCTL)
    486. 

  486. #define bfin_write_EBIU_SDGCTL(val)          bfin_write32(EBIU_SDGCTL,val)
    487. 

  487. #define bfin_read_EBIU_SDBCTL()              bfin_read32(EBIU_SDBCTL)
    488. 

  488. #define bfin_write_EBIU_SDBCTL(val)          bfin_write32(EBIU_SDBCTL,val)
    489. 

  489. #define bfin_read_EBIU_SDRRC()               bfin_read16(EBIU_SDRRC)
    490. 

  490. #define bfin_write_EBIU_SDRRC(val)           bfin_write16(EBIU_SDRRC,val)
    491. 

  491. #define bfin_read_EBIU_SDSTAT()              bfin_read16(EBIU_SDSTAT)
    492. 

  492. #define bfin_write_EBIU_SDSTAT(val)          bfin_write16(EBIU_SDSTAT,val)
    493. 

  493. /* Parallel Peripheral Interface (PPI) 0 registers (0xFFC0 1000-0xFFC0 10FF) */
    494. 

  494. #define bfin_read_PPI0_CONTROL()             bfin_read16(PPI0_CONTROL)
    495. 

  495. #define bfin_write_PPI0_CONTROL(val)         bfin_write16(PPI0_CONTROL,val)
    496. 

  496. #define bfin_read_PPI0_STATUS()              bfin_read16(PPI0_STATUS)
    497. 

  497. #define bfin_write_PPI0_STATUS(val)          bfin_write16(PPI0_STATUS,val)
    498. 

  498. #define bfin_clear_PPI0_STATUS()             bfin_read_PPI0_STATUS()
    499. 

  499. #define bfin_read_PPI0_COUNT()               bfin_read16(PPI0_COUNT)
    500. 

  500. #define bfin_write_PPI0_COUNT(val)           bfin_write16(PPI0_COUNT,val)
    501. 

  501. #define bfin_read_PPI0_DELAY()               bfin_read16(PPI0_DELAY)
    502. 

  502. #define bfin_write_PPI0_DELAY(val)           bfin_write16(PPI0_DELAY,val)
    503. 

  503. #define bfin_read_PPI0_FRAME()               bfin_read16(PPI0_FRAME)
    504. 

  504. #define bfin_write_PPI0_FRAME(val)           bfin_write16(PPI0_FRAME,val)
    505. 

  505. /* Parallel Peripheral Interface (PPI) 1 registers (0xFFC0 1300-0xFFC0 13FF) */
    506. 

  506. #define bfin_read_PPI1_CONTROL()             bfin_read16(PPI1_CONTROL)
    507. 

  507. #define bfin_write_PPI1_CONTROL(val)         bfin_write16(PPI1_CONTROL,val)
    508. 

  508. #define bfin_read_PPI1_STATUS()              bfin_read16(PPI1_STATUS)
    509. 

  509. #define bfin_write_PPI1_STATUS(val)          bfin_write16(PPI1_STATUS,val)
    510. 

  510. #define bfin_clear_PPI1_STATUS()             bfin_read_PPI1_STATUS()
    511. 

  511. #define bfin_read_PPI1_COUNT()               bfin_read16(PPI1_COUNT)
    512. 

  512. #define bfin_write_PPI1_COUNT(val)           bfin_write16(PPI1_COUNT,val)
    513. 

  513. #define bfin_read_PPI1_DELAY()               bfin_read16(PPI1_DELAY)
    514. 

  514. #define bfin_write_PPI1_DELAY(val)           bfin_write16(PPI1_DELAY,val)
    515. 

  515. #define bfin_read_PPI1_FRAME()               bfin_read16(PPI1_FRAME)
    516. 

  516. #define bfin_write_PPI1_FRAME(val)           bfin_write16(PPI1_FRAME,val)
    517. 

  517. /*DMA traffic control registers */
    518. 

  518. #define bfin_read_DMAC0_TC_PER()             bfin_read16(DMAC0_TC_PER)
    519. 

  519. #define bfin_write_DMAC0_TC_PER(val)         bfin_write16(DMAC0_TC_PER,val)
    520. 

  520. #define bfin_read_DMAC0_TC_CNT()             bfin_read16(DMAC0_TC_CNT)
    521. 

  521. #define bfin_write_DMAC0_TC_CNT(val)         bfin_write16(DMAC0_TC_CNT,val)
    522. 

  522. #define bfin_read_DMAC1_TC_PER()             bfin_read16(DMAC1_TC_PER)
    523. 

  523. #define bfin_write_DMAC1_TC_PER(val)         bfin_write16(DMAC1_TC_PER,val)
    524. 

  524. #define bfin_read_DMAC1_TC_CNT()             bfin_read16(DMAC1_TC_CNT)
    525. 

  525. #define bfin_write_DMAC1_TC_CNT(val)         bfin_write16(DMAC1_TC_CNT,val)
    526. 

  526. /* DMA1 Controller registers (0xFFC0 1C00-0xFFC0 1FFF) */
    527. 

  527. #define bfin_read_DMA1_0_CONFIG()            bfin_read16(DMA1_0_CONFIG)
    528. 

  528. #define bfin_write_DMA1_0_CONFIG(val)        bfin_write16(DMA1_0_CONFIG,val)
    529. 

  529. #define bfin_read_DMA1_0_NEXT_DESC_PTR()     bfin_read32(DMA1_0_NEXT_DESC_PTR)
    530. 

  530. #define bfin_write_DMA1_0_NEXT_DESC_PTR(val) bfin_write32(DMA1_0_NEXT_DESC_PTR,val)
    531. 

  531. #define bfin_read_DMA1_0_START_ADDR()        bfin_read32(DMA1_0_START_ADDR)
    532. 

  532. #define bfin_write_DMA1_0_START_ADDR(val)    bfin_write32(DMA1_0_START_ADDR,val)
    533. 

  533. #define bfin_read_DMA1_0_X_COUNT()           bfin_read16(DMA1_0_X_COUNT)
    534. 

  534. #define bfin_write_DMA1_0_X_COUNT(val)       bfin_write16(DMA1_0_X_COUNT,val)
    535. 

  535. #define bfin_read_DMA1_0_Y_COUNT()           bfin_read16(DMA1_0_Y_COUNT)
    536. 

  536. #define bfin_write_DMA1_0_Y_COUNT(val)       bfin_write16(DMA1_0_Y_COUNT,val)
    537. 

  537. #define bfin_read_DMA1_0_X_MODIFY()          bfin_read16(DMA1_0_X_MODIFY)
    538. 

  538. #define bfin_write_DMA1_0_X_MODIFY(val)      bfin_write16(DMA1_0_X_MODIFY,val)
    539. 

  539. #define bfin_read_DMA1_0_Y_MODIFY()          bfin_read16(DMA1_0_Y_MODIFY)
    540. 

  540. #define bfin_write_DMA1_0_Y_MODIFY(val)      bfin_write16(DMA1_0_Y_MODIFY,val)
    541. 

  541. #define bfin_read_DMA1_0_CURR_DESC_PTR()     bfin_read32(DMA1_0_CURR_DESC_PTR)
    542. 

  542. #define bfin_write_DMA1_0_CURR_DESC_PTR(val) bfin_write32(DMA1_0_CURR_DESC_PTR,val)
    543. 

  543. #define bfin_read_DMA1_0_CURR_ADDR()         bfin_read32(DMA1_0_CURR_ADDR)
    544. 

  544. #define bfin_write_DMA1_0_CURR_ADDR(val)     bfin_write32(DMA1_0_CURR_ADDR,val)
    545. 

  545. #define bfin_read_DMA1_0_CURR_X_COUNT()      bfin_read16(DMA1_0_CURR_X_COUNT)
    546. 

  546. #define bfin_write_DMA1_0_CURR_X_COUNT(val)  bfin_write16(DMA1_0_CURR_X_COUNT,val)
    547. 

  547. #define bfin_read_DMA1_0_CURR_Y_COUNT()      bfin_read16(DMA1_0_CURR_Y_COUNT)
    548. 

  548. #define bfin_write_DMA1_0_CURR_Y_COUNT(val)  bfin_write16(DMA1_0_CURR_Y_COUNT,val)
    549. 

  549. #define bfin_read_DMA1_0_IRQ_STATUS()        bfin_read16(DMA1_0_IRQ_STATUS)
    550. 

  550. #define bfin_write_DMA1_0_IRQ_STATUS(val)    bfin_write16(DMA1_0_IRQ_STATUS,val)
    551. 

  551. #define bfin_read_DMA1_0_PERIPHERAL_MAP()    bfin_read16(DMA1_0_PERIPHERAL_MAP)
    552. 

  552. #define bfin_write_DMA1_0_PERIPHERAL_MAP(val) bfin_write16(DMA1_0_PERIPHERAL_MAP,val)
    553. 

  553. #define bfin_read_DMA1_1_CONFIG()            bfin_read16(DMA1_1_CONFIG)
    554. 

  554. #define bfin_write_DMA1_1_CONFIG(val)        bfin_write16(DMA1_1_CONFIG,val)
    555. 

  555. #define bfin_read_DMA1_1_NEXT_DESC_PTR()     bfin_read32(DMA1_1_NEXT_DESC_PTR)
    556. 

  556. #define bfin_write_DMA1_1_NEXT_DESC_PTR(val) bfin_write32(DMA1_1_NEXT_DESC_PTR,val)
    557. 

  557. #define bfin_read_DMA1_1_START_ADDR()        bfin_read32(DMA1_1_START_ADDR)
    558. 

  558. #define bfin_write_DMA1_1_START_ADDR(val)    bfin_write32(DMA1_1_START_ADDR,val)
    559. 

  559. #define bfin_read_DMA1_1_X_COUNT()           bfin_read16(DMA1_1_X_COUNT)
    560. 

  560. #define bfin_write_DMA1_1_X_COUNT(val)       bfin_write16(DMA1_1_X_COUNT,val)
    561. 

  561. #define bfin_read_DMA1_1_Y_COUNT()           bfin_read16(DMA1_1_Y_COUNT)
    562. 

  562. #define bfin_write_DMA1_1_Y_COUNT(val)       bfin_write16(DMA1_1_Y_COUNT,val)
    563. 

  563. #define bfin_read_DMA1_1_X_MODIFY()          bfin_read16(DMA1_1_X_MODIFY)
    564. 

  564. #define bfin_write_DMA1_1_X_MODIFY(val)      bfin_write16(DMA1_1_X_MODIFY,val)
    565. 

  565. #define bfin_read_DMA1_1_Y_MODIFY()          bfin_read16(DMA1_1_Y_MODIFY)
    566. 

  566. #define bfin_write_DMA1_1_Y_MODIFY(val)      bfin_write16(DMA1_1_Y_MODIFY,val)
    567. 

  567. #define bfin_read_DMA1_1_CURR_DESC_PTR()     bfin_read32(DMA1_1_CURR_DESC_PTR)
    568. 

  568. #define bfin_write_DMA1_1_CURR_DESC_PTR(val) bfin_write32(DMA1_1_CURR_DESC_PTR,val)
    569. 

  569. #define bfin_read_DMA1_1_CURR_ADDR()         bfin_read32(DMA1_1_CURR_ADDR)
    570. 

  570. #define bfin_write_DMA1_1_CURR_ADDR(val)     bfin_write32(DMA1_1_CURR_ADDR,val)
    571. 

  571. #define bfin_read_DMA1_1_CURR_X_COUNT()      bfin_read16(DMA1_1_CURR_X_COUNT)
    572. 

  572. #define bfin_write_DMA1_1_CURR_X_COUNT(val)  bfin_write16(DMA1_1_CURR_X_COUNT,val)
    573. 

  573. #define bfin_read_DMA1_1_CURR_Y_COUNT()      bfin_read16(DMA1_1_CURR_Y_COUNT)
    574. 

  574. #define bfin_write_DMA1_1_CURR_Y_COUNT(val)  bfin_write16(DMA1_1_CURR_Y_COUNT,val)
    575. 

  575. #define bfin_read_DMA1_1_IRQ_STATUS()        bfin_read16(DMA1_1_IRQ_STATUS)
    576. 

  576. #define bfin_write_DMA1_1_IRQ_STATUS(val)    bfin_write16(DMA1_1_IRQ_STATUS,val)
    577. 

  577. #define bfin_read_DMA1_1_PERIPHERAL_MAP()    bfin_read16(DMA1_1_PERIPHERAL_MAP)
    578. 

  578. #define bfin_write_DMA1_1_PERIPHERAL_MAP(val) bfin_write16(DMA1_1_PERIPHERAL_MAP,val)
    579. 

  579. #define bfin_read_DMA1_2_CONFIG()            bfin_read16(DMA1_2_CONFIG)
    580. 

  580. #define bfin_write_DMA1_2_CONFIG(val)        bfin_write16(DMA1_2_CONFIG,val)
    581. 

  581. #define bfin_read_DMA1_2_NEXT_DESC_PTR()     bfin_read32(DMA1_2_NEXT_DESC_PTR)
    582. 

  582. #define bfin_write_DMA1_2_NEXT_DESC_PTR(val) bfin_write32(DMA1_2_NEXT_DESC_PTR,val)
    583. 

  583. #define bfin_read_DMA1_2_START_ADDR()        bfin_read32(DMA1_2_START_ADDR)
    584. 

  584. #define bfin_write_DMA1_2_START_ADDR(val)    bfin_write32(DMA1_2_START_ADDR,val)
    585. 

  585. #define bfin_read_DMA1_2_X_COUNT()           bfin_read16(DMA1_2_X_COUNT)
    586. 

  586. #define bfin_write_DMA1_2_X_COUNT(val)       bfin_write16(DMA1_2_X_COUNT,val)
    587. 

  587. #define bfin_read_DMA1_2_Y_COUNT()           bfin_read16(DMA1_2_Y_COUNT)
    588. 

  588. #define bfin_write_DMA1_2_Y_COUNT(val)       bfin_write16(DMA1_2_Y_COUNT,val)
    589. 

  589. #define bfin_read_DMA1_2_X_MODIFY()          bfin_read16(DMA1_2_X_MODIFY)
    590. 

  590. #define bfin_write_DMA1_2_X_MODIFY(val)      bfin_write16(DMA1_2_X_MODIFY,val)
    591. 

  591. #define bfin_read_DMA1_2_Y_MODIFY()          bfin_read16(DMA1_2_Y_MODIFY)
    592. 

  592. #define bfin_write_DMA1_2_Y_MODIFY(val)      bfin_write16(DMA1_2_Y_MODIFY,val)
    593. 

  593. #define bfin_read_DMA1_2_CURR_DESC_PTR()     bfin_read32(DMA1_2_CURR_DESC_PTR)
    594. 

  594. #define bfin_write_DMA1_2_CURR_DESC_PTR(val) bfin_write32(DMA1_2_CURR_DESC_PTR,val)
    595. 

  595. #define bfin_read_DMA1_2_CURR_ADDR()         bfin_read32(DMA1_2_CURR_ADDR)
    596. 

  596. #define bfin_write_DMA1_2_CURR_ADDR(val)     bfin_write32(DMA1_2_CURR_ADDR,val)
    597. 

  597. #define bfin_read_DMA1_2_CURR_X_COUNT()      bfin_read16(DMA1_2_CURR_X_COUNT)
    598. 

  598. #define bfin_write_DMA1_2_CURR_X_COUNT(val)  bfin_write16(DMA1_2_CURR_X_COUNT,val)
    599. 

  599. #define bfin_read_DMA1_2_CURR_Y_COUNT()      bfin_read16(DMA1_2_CURR_Y_COUNT)
    600. 

  600. #define bfin_write_DMA1_2_CURR_Y_COUNT(val)  bfin_write16(DMA1_2_CURR_Y_COUNT,val)
    601. 

  601. #define bfin_read_DMA1_2_IRQ_STATUS()        bfin_read16(DMA1_2_IRQ_STATUS)
    602. 

  602. #define bfin_write_DMA1_2_IRQ_STATUS(val)    bfin_write16(DMA1_2_IRQ_STATUS,val)
    603. 

  603. #define bfin_read_DMA1_2_PERIPHERAL_MAP()    bfin_read16(DMA1_2_PERIPHERAL_MAP)
    604. 

  604. #define bfin_write_DMA1_2_PERIPHERAL_MAP(val) bfin_write16(DMA1_2_PERIPHERAL_MAP,val)
    605. 

  605. #define bfin_read_DMA1_3_CONFIG()            bfin_read16(DMA1_3_CONFIG)
    606. 

  606. #define bfin_write_DMA1_3_CONFIG(val)        bfin_write16(DMA1_3_CONFIG,val)
    607. 

  607. #define bfin_read_DMA1_3_NEXT_DESC_PTR()     bfin_read32(DMA1_3_NEXT_DESC_PTR)
    608. 

  608. #define bfin_write_DMA1_3_NEXT_DESC_PTR(val) bfin_write32(DMA1_3_NEXT_DESC_PTR,val)
    609. 

  609. #define bfin_read_DMA1_3_START_ADDR()        bfin_read32(DMA1_3_START_ADDR)
    610. 

  610. #define bfin_write_DMA1_3_START_ADDR(val)    bfin_write32(DMA1_3_START_ADDR,val)
    611. 

  611. #define bfin_read_DMA1_3_X_COUNT()           bfin_read16(DMA1_3_X_COUNT)
    612. 

  612. #define bfin_write_DMA1_3_X_COUNT(val)       bfin_write16(DMA1_3_X_COUNT,val)
    613. 

  613. #define bfin_read_DMA1_3_Y_COUNT()           bfin_read16(DMA1_3_Y_COUNT)
    614. 

  614. #define bfin_write_DMA1_3_Y_COUNT(val)       bfin_write16(DMA1_3_Y_COUNT,val)
    615. 

  615. #define bfin_read_DMA1_3_X_MODIFY()          bfin_read16(DMA1_3_X_MODIFY)
    616. 

  616. #define bfin_write_DMA1_3_X_MODIFY(val)      bfin_write16(DMA1_3_X_MODIFY,val)
    617. 

  617. #define bfin_read_DMA1_3_Y_MODIFY()          bfin_read16(DMA1_3_Y_MODIFY)
    618. 

  618. #define bfin_write_DMA1_3_Y_MODIFY(val)      bfin_write16(DMA1_3_Y_MODIFY,val)
    619. 

  619. #define bfin_read_DMA1_3_CURR_DESC_PTR()     bfin_read32(DMA1_3_CURR_DESC_PTR)
    620. 

  620. #define bfin_write_DMA1_3_CURR_DESC_PTR(val) bfin_write32(DMA1_3_CURR_DESC_PTR,val)
    621. 

  621. #define bfin_read_DMA1_3_CURR_ADDR()         bfin_read32(DMA1_3_CURR_ADDR)
    622. 

  622. #define bfin_write_DMA1_3_CURR_ADDR(val)     bfin_write32(DMA1_3_CURR_ADDR,val)
    623. 

  623. #define bfin_read_DMA1_3_CURR_X_COUNT()      bfin_read16(DMA1_3_CURR_X_COUNT)
    624. 

  624. #define bfin_write_DMA1_3_CURR_X_COUNT(val)  bfin_write16(DMA1_3_CURR_X_COUNT,val)
    625. 

  625. #define bfin_read_DMA1_3_CURR_Y_COUNT()      bfin_read16(DMA1_3_CURR_Y_COUNT)
    626. 

  626. #define bfin_write_DMA1_3_CURR_Y_COUNT(val)  bfin_write16(DMA1_3_CURR_Y_COUNT,val)
    627. 

  627. #define bfin_read_DMA1_3_IRQ_STATUS()        bfin_read16(DMA1_3_IRQ_STATUS)
    628. 

  628. #define bfin_write_DMA1_3_IRQ_STATUS(val)    bfin_write16(DMA1_3_IRQ_STATUS,val)
    629. 

  629. #define bfin_read_DMA1_3_PERIPHERAL_MAP()    bfin_read16(DMA1_3_PERIPHERAL_MAP)
    630. 

  630. #define bfin_write_DMA1_3_PERIPHERAL_MAP(val) bfin_write16(DMA1_3_PERIPHERAL_MAP,val)
    631. 

  631. #define bfin_read_DMA1_4_CONFIG()            bfin_read16(DMA1_4_CONFIG)
    632. 

  632. #define bfin_write_DMA1_4_CONFIG(val)        bfin_write16(DMA1_4_CONFIG,val)
    633. 

  633. #define bfin_read_DMA1_4_NEXT_DESC_PTR()     bfin_read32(DMA1_4_NEXT_DESC_PTR)
    634. 

  634. #define bfin_write_DMA1_4_NEXT_DESC_PTR(val) bfin_write32(DMA1_4_NEXT_DESC_PTR,val)
    635. 

  635. #define bfin_read_DMA1_4_START_ADDR()        bfin_read32(DMA1_4_START_ADDR)
    636. 

  636. #define bfin_write_DMA1_4_START_ADDR(val)    bfin_write32(DMA1_4_START_ADDR,val)
    637. 

  637. #define bfin_read_DMA1_4_X_COUNT()           bfin_read16(DMA1_4_X_COUNT)
    638. 

  638. #define bfin_write_DMA1_4_X_COUNT(val)       bfin_write16(DMA1_4_X_COUNT,val)
    639. 

  639. #define bfin_read_DMA1_4_Y_COUNT()           bfin_read16(DMA1_4_Y_COUNT)
    640. 

  640. #define bfin_write_DMA1_4_Y_COUNT(val)       bfin_write16(DMA1_4_Y_COUNT,val)
    641. 

  641. #define bfin_read_DMA1_4_X_MODIFY()          bfin_read16(DMA1_4_X_MODIFY)
    642. 

  642. #define bfin_write_DMA1_4_X_MODIFY(val)      bfin_write16(DMA1_4_X_MODIFY,val)
    643. 

  643. #define bfin_read_DMA1_4_Y_MODIFY()          bfin_read16(DMA1_4_Y_MODIFY)
    644. 

  644. #define bfin_write_DMA1_4_Y_MODIFY(val)      bfin_write16(DMA1_4_Y_MODIFY,val)
    645. 

  645. #define bfin_read_DMA1_4_CURR_DESC_PTR()     bfin_read32(DMA1_4_CURR_DESC_PTR)
    646. 

  646. #define bfin_write_DMA1_4_CURR_DESC_PTR(val) bfin_write32(DMA1_4_CURR_DESC_PTR,val)
    647. 

  647. #define bfin_read_DMA1_4_CURR_ADDR()         bfin_read32(DMA1_4_CURR_ADDR)
    648. 

  648. #define bfin_write_DMA1_4_CURR_ADDR(val)     bfin_write32(DMA1_4_CURR_ADDR,val)
    649. 

  649. #define bfin_read_DMA1_4_CURR_X_COUNT()      bfin_read16(DMA1_4_CURR_X_COUNT)
    650. 

  650. #define bfin_write_DMA1_4_CURR_X_COUNT(val)  bfin_write16(DMA1_4_CURR_X_COUNT,val)
    651. 

  651. #define bfin_read_DMA1_4_CURR_Y_COUNT()      bfin_read16(DMA1_4_CURR_Y_COUNT)
    652. 

  652. #define bfin_write_DMA1_4_CURR_Y_COUNT(val)  bfin_write16(DMA1_4_CURR_Y_COUNT,val)
    653. 

  653. #define bfin_read_DMA1_4_IRQ_STATUS()        bfin_read16(DMA1_4_IRQ_STATUS)
    654. 

  654. #define bfin_write_DMA1_4_IRQ_STATUS(val)    bfin_write16(DMA1_4_IRQ_STATUS,val)
    655. 

  655. #define bfin_read_DMA1_4_PERIPHERAL_MAP()    bfin_read16(DMA1_4_PERIPHERAL_MAP)
    656. 

  656. #define bfin_write_DMA1_4_PERIPHERAL_MAP(val) bfin_write16(DMA1_4_PERIPHERAL_MAP,val)
    657. 

  657. #define bfin_read_DMA1_5_CONFIG()            bfin_read16(DMA1_5_CONFIG)
    658. 

  658. #define bfin_write_DMA1_5_CONFIG(val)        bfin_write16(DMA1_5_CONFIG,val)
    659. 

  659. #define bfin_read_DMA1_5_NEXT_DESC_PTR()     bfin_read32(DMA1_5_NEXT_DESC_PTR)
    660. 

  660. #define bfin_write_DMA1_5_NEXT_DESC_PTR(val) bfin_write32(DMA1_5_NEXT_DESC_PTR,val)
    661. 

  661. #define bfin_read_DMA1_5_START_ADDR()        bfin_read32(DMA1_5_START_ADDR)
    662. 

  662. #define bfin_write_DMA1_5_START_ADDR(val)    bfin_write32(DMA1_5_START_ADDR,val)
    663. 

  663. #define bfin_read_DMA1_5_X_COUNT()           bfin_read16(DMA1_5_X_COUNT)
    664. 

  664. #define bfin_write_DMA1_5_X_COUNT(val)       bfin_write16(DMA1_5_X_COUNT,val)
    665. 

  665. #define bfin_read_DMA1_5_Y_COUNT()           bfin_read16(DMA1_5_Y_COUNT)
    666. 

  666. #define bfin_write_DMA1_5_Y_COUNT(val)       bfin_write16(DMA1_5_Y_COUNT,val)
    667. 

  667. #define bfin_read_DMA1_5_X_MODIFY()          bfin_read16(DMA1_5_X_MODIFY)
    668. 

  668. #define bfin_write_DMA1_5_X_MODIFY(val)      bfin_write16(DMA1_5_X_MODIFY,val)
    669. 

  669. #define bfin_read_DMA1_5_Y_MODIFY()          bfin_read16(DMA1_5_Y_MODIFY)
    670. 

  670. #define bfin_write_DMA1_5_Y_MODIFY(val)      bfin_write16(DMA1_5_Y_MODIFY,val)
    671. 

  671. #define bfin_read_DMA1_5_CURR_DESC_PTR()     bfin_read32(DMA1_5_CURR_DESC_PTR)
    672. 

  672. #define bfin_write_DMA1_5_CURR_DESC_PTR(val) bfin_write32(DMA1_5_CURR_DESC_PTR,val)
    673. 

  673. #define bfin_read_DMA1_5_CURR_ADDR()         bfin_read32(DMA1_5_CURR_ADDR)
    674. 

  674. #define bfin_write_DMA1_5_CURR_ADDR(val)     bfin_write32(DMA1_5_CURR_ADDR,val)
    675. 

  675. #define bfin_read_DMA1_5_CURR_X_COUNT()      bfin_read16(DMA1_5_CURR_X_COUNT)
    676. 

  676. #define bfin_write_DMA1_5_CURR_X_COUNT(val)  bfin_write16(DMA1_5_CURR_X_COUNT,val)
    677. 

  677. #define bfin_read_DMA1_5_CURR_Y_COUNT()      bfin_read16(DMA1_5_CURR_Y_COUNT)
    678. 

  678. #define bfin_write_DMA1_5_CURR_Y_COUNT(val)  bfin_write16(DMA1_5_CURR_Y_COUNT,val)
    679. 

  679. #define bfin_read_DMA1_5_IRQ_STATUS()        bfin_read16(DMA1_5_IRQ_STATUS)
    680. 

  680. #define bfin_write_DMA1_5_IRQ_STATUS(val)    bfin_write16(DMA1_5_IRQ_STATUS,val)
    681. 

  681. #define bfin_read_DMA1_5_PERIPHERAL_MAP()    bfin_read16(DMA1_5_PERIPHERAL_MAP)
    682. 

  682. #define bfin_write_DMA1_5_PERIPHERAL_MAP(val) bfin_write16(DMA1_5_PERIPHERAL_MAP,val)
    683. 

  683. #define bfin_read_DMA1_6_CONFIG()            bfin_read16(DMA1_6_CONFIG)
    684. 

  684. #define bfin_write_DMA1_6_CONFIG(val)        bfin_write16(DMA1_6_CONFIG,val)
    685. 

  685. #define bfin_read_DMA1_6_NEXT_DESC_PTR()     bfin_read32(DMA1_6_NEXT_DESC_PTR)
    686. 

  686. #define bfin_write_DMA1_6_NEXT_DESC_PTR(val) bfin_write32(DMA1_6_NEXT_DESC_PTR,val)
    687. 

  687. #define bfin_read_DMA1_6_START_ADDR()        bfin_read32(DMA1_6_START_ADDR)
    688. 

  688. #define bfin_write_DMA1_6_START_ADDR(val)    bfin_write32(DMA1_6_START_ADDR,val)
    689. 

  689. #define bfin_read_DMA1_6_X_COUNT()           bfin_read16(DMA1_6_X_COUNT)
    690. 

  690. #define bfin_write_DMA1_6_X_COUNT(val)       bfin_write16(DMA1_6_X_COUNT,val)
    691. 

  691. #define bfin_read_DMA1_6_Y_COUNT()           bfin_read16(DMA1_6_Y_COUNT)
    692. 

  692. #define bfin_write_DMA1_6_Y_COUNT(val)       bfin_write16(DMA1_6_Y_COUNT,val)
    693. 

  693. #define bfin_read_DMA1_6_X_MODIFY()          bfin_read16(DMA1_6_X_MODIFY)
    694. 

  694. #define bfin_write_DMA1_6_X_MODIFY(val)      bfin_write16(DMA1_6_X_MODIFY,val)
    695. 

  695. #define bfin_read_DMA1_6_Y_MODIFY()          bfin_read16(DMA1_6_Y_MODIFY)
    696. 

  696. #define bfin_write_DMA1_6_Y_MODIFY(val)      bfin_write16(DMA1_6_Y_MODIFY,val)
    697. 

  697. #define bfin_read_DMA1_6_CURR_DESC_PTR()     bfin_read32(DMA1_6_CURR_DESC_PTR)
    698. 

  698. #define bfin_write_DMA1_6_CURR_DESC_PTR(val) bfin_write32(DMA1_6_CURR_DESC_PTR,val)
    699. 

  699. #define bfin_read_DMA1_6_CURR_ADDR()         bfin_read32(DMA1_6_CURR_ADDR)
    700. 

  700. #define bfin_write_DMA1_6_CURR_ADDR(val)     bfin_write32(DMA1_6_CURR_ADDR,val)
    701. 

  701. #define bfin_read_DMA1_6_CURR_X_COUNT()      bfin_read16(DMA1_6_CURR_X_COUNT)
    702. 

  702. #define bfin_write_DMA1_6_CURR_X_COUNT(val)  bfin_write16(DMA1_6_CURR_X_COUNT,val)
    703. 

  703. #define bfin_read_DMA1_6_CURR_Y_COUNT()      bfin_read16(DMA1_6_CURR_Y_COUNT)
    704. 

  704. #define bfin_write_DMA1_6_CURR_Y_COUNT(val)  bfin_write16(DMA1_6_CURR_Y_COUNT,val)
    705. 

  705. #define bfin_read_DMA1_6_IRQ_STATUS()        bfin_read16(DMA1_6_IRQ_STATUS)
    706. 

  706. #define bfin_write_DMA1_6_IRQ_STATUS(val)    bfin_write16(DMA1_6_IRQ_STATUS,val)
    707. 

  707. #define bfin_read_DMA1_6_PERIPHERAL_MAP()    bfin_read16(DMA1_6_PERIPHERAL_MAP)
    708. 

  708. #define bfin_write_DMA1_6_PERIPHERAL_MAP(val) bfin_write16(DMA1_6_PERIPHERAL_MAP,val)
    709. 

  709. #define bfin_read_DMA1_7_CONFIG()            bfin_read16(DMA1_7_CONFIG)
    710. 

  710. #define bfin_write_DMA1_7_CONFIG(val)        bfin_write16(DMA1_7_CONFIG,val)
    711. 

  711. #define bfin_read_DMA1_7_NEXT_DESC_PTR()     bfin_read32(DMA1_7_NEXT_DESC_PTR)
    712. 

  712. #define bfin_write_DMA1_7_NEXT_DESC_PTR(val) bfin_write32(DMA1_7_NEXT_DESC_PTR,val)
    713. 

  713. #define bfin_read_DMA1_7_START_ADDR()        bfin_read32(DMA1_7_START_ADDR)
    714. 

  714. #define bfin_write_DMA1_7_START_ADDR(val)    bfin_write32(DMA1_7_START_ADDR,val)
    715. 

  715. #define bfin_read_DMA1_7_X_COUNT()           bfin_read16(DMA1_7_X_COUNT)
    716. 

  716. #define bfin_write_DMA1_7_X_COUNT(val)       bfin_write16(DMA1_7_X_COUNT,val)
    717. 

  717. #define bfin_read_DMA1_7_Y_COUNT()           bfin_read16(DMA1_7_Y_COUNT)
    718. 

  718. #define bfin_write_DMA1_7_Y_COUNT(val)       bfin_write16(DMA1_7_Y_COUNT,val)
    719. 

  719. #define bfin_read_DMA1_7_X_MODIFY()          bfin_read16(DMA1_7_X_MODIFY)
    720. 

  720. #define bfin_write_DMA1_7_X_MODIFY(val)      bfin_write16(DMA1_7_X_MODIFY,val)
    721. 

  721. #define bfin_read_DMA1_7_Y_MODIFY()          bfin_read16(DMA1_7_Y_MODIFY)
    722. 

  722. #define bfin_write_DMA1_7_Y_MODIFY(val)      bfin_write16(DMA1_7_Y_MODIFY,val)
    723. 

  723. #define bfin_read_DMA1_7_CURR_DESC_PTR()     bfin_read32(DMA1_7_CURR_DESC_PTR)
    724. 

  724. #define bfin_write_DMA1_7_CURR_DESC_PTR(val) bfin_write32(DMA1_7_CURR_DESC_PTR,val)
    725. 

  725. #define bfin_read_DMA1_7_CURR_ADDR()         bfin_read32(DMA1_7_CURR_ADDR)
    726. 

  726. #define bfin_write_DMA1_7_CURR_ADDR(val)     bfin_write32(DMA1_7_CURR_ADDR,val)
    727. 

  727. #define bfin_read_DMA1_7_CURR_X_COUNT()      bfin_read16(DMA1_7_CURR_X_COUNT)
    728. 

  728. #define bfin_write_DMA1_7_CURR_X_COUNT(val)  bfin_write16(DMA1_7_CURR_X_COUNT,val)
    729. 

  729. #define bfin_read_DMA1_7_CURR_Y_COUNT()      bfin_read16(DMA1_7_CURR_Y_COUNT)
    730. 

  730. #define bfin_write_DMA1_7_CURR_Y_COUNT(val)  bfin_write16(DMA1_7_CURR_Y_COUNT,val)
    731. 

  731. #define bfin_read_DMA1_7_IRQ_STATUS()        bfin_read16(DMA1_7_IRQ_STATUS)
    732. 

  732. #define bfin_write_DMA1_7_IRQ_STATUS(val)    bfin_write16(DMA1_7_IRQ_STATUS,val)
    733. 

  733. #define bfin_read_DMA1_7_PERIPHERAL_MAP()    bfin_read16(DMA1_7_PERIPHERAL_MAP)
    734. 

  734. #define bfin_write_DMA1_7_PERIPHERAL_MAP(val) bfin_write16(DMA1_7_PERIPHERAL_MAP,val)
    735. 

  735. #define bfin_read_DMA1_8_CONFIG()            bfin_read16(DMA1_8_CONFIG)
    736. 

  736. #define bfin_write_DMA1_8_CONFIG(val)        bfin_write16(DMA1_8_CONFIG,val)
    737. 

  737. #define bfin_read_DMA1_8_NEXT_DESC_PTR()     bfin_read32(DMA1_8_NEXT_DESC_PTR)
    738. 

  738. #define bfin_write_DMA1_8_NEXT_DESC_PTR(val) bfin_write32(DMA1_8_NEXT_DESC_PTR,val)
    739. 

  739. #define bfin_read_DMA1_8_START_ADDR()        bfin_read32(DMA1_8_START_ADDR)
    740. 

  740. #define bfin_write_DMA1_8_START_ADDR(val)    bfin_write32(DMA1_8_START_ADDR,val)
    741. 

  741. #define bfin_read_DMA1_8_X_COUNT()           bfin_read16(DMA1_8_X_COUNT)
    742. 

  742. #define bfin_write_DMA1_8_X_COUNT(val)       bfin_write16(DMA1_8_X_COUNT,val)
    743. 

  743. #define bfin_read_DMA1_8_Y_COUNT()           bfin_read16(DMA1_8_Y_COUNT)
    744. 

  744. #define bfin_write_DMA1_8_Y_COUNT(val)       bfin_write16(DMA1_8_Y_COUNT,val)
    745. 

  745. #define bfin_read_DMA1_8_X_MODIFY()          bfin_read16(DMA1_8_X_MODIFY)
    746. 

  746. #define bfin_write_DMA1_8_X_MODIFY(val)      bfin_write16(DMA1_8_X_MODIFY,val)
    747. 

  747. #define bfin_read_DMA1_8_Y_MODIFY()          bfin_read16(DMA1_8_Y_MODIFY)
    748. 

  748. #define bfin_write_DMA1_8_Y_MODIFY(val)      bfin_write16(DMA1_8_Y_MODIFY,val)
    749. 

  749. #define bfin_read_DMA1_8_CURR_DESC_PTR()     bfin_read32(DMA1_8_CURR_DESC_PTR)
    750. 

  750. #define bfin_write_DMA1_8_CURR_DESC_PTR(val) bfin_write32(DMA1_8_CURR_DESC_PTR,val)
    751. 

  751. #define bfin_read_DMA1_8_CURR_ADDR()         bfin_read32(DMA1_8_CURR_ADDR)
    752. 

  752. #define bfin_write_DMA1_8_CURR_ADDR(val)     bfin_write32(DMA1_8_CURR_ADDR,val)
    753. 

  753. #define bfin_read_DMA1_8_CURR_X_COUNT()      bfin_read16(DMA1_8_CURR_X_COUNT)
    754. 

  754. #define bfin_write_DMA1_8_CURR_X_COUNT(val)  bfin_write16(DMA1_8_CURR_X_COUNT,val)
    755. 

  755. #define bfin_read_DMA1_8_CURR_Y_COUNT()      bfin_read16(DMA1_8_CURR_Y_COUNT)
    756. 

  756. #define bfin_write_DMA1_8_CURR_Y_COUNT(val)  bfin_write16(DMA1_8_CURR_Y_COUNT,val)
    757. 

  757. #define bfin_read_DMA1_8_IRQ_STATUS()        bfin_read16(DMA1_8_IRQ_STATUS)
    758. 

  758. #define bfin_write_DMA1_8_IRQ_STATUS(val)    bfin_write16(DMA1_8_IRQ_STATUS,val)
    759. 

  759. #define bfin_read_DMA1_8_PERIPHERAL_MAP()    bfin_read16(DMA1_8_PERIPHERAL_MAP)
    760. 

  760. #define bfin_write_DMA1_8_PERIPHERAL_MAP(val) bfin_write16(DMA1_8_PERIPHERAL_MAP,val)
    761. 

  761. #define bfin_read_DMA1_9_CONFIG()            bfin_read16(DMA1_9_CONFIG)
    762. 

  762. #define bfin_write_DMA1_9_CONFIG(val)        bfin_write16(DMA1_9_CONFIG,val)
    763. 

  763. #define bfin_read_DMA1_9_NEXT_DESC_PTR()     bfin_read32(DMA1_9_NEXT_DESC_PTR)
    764. 

  764. #define bfin_write_DMA1_9_NEXT_DESC_PTR(val) bfin_write32(DMA1_9_NEXT_DESC_PTR,val)
    765. 

  765. #define bfin_read_DMA1_9_START_ADDR()        bfin_read32(DMA1_9_START_ADDR)
    766. 

  766. #define bfin_write_DMA1_9_START_ADDR(val)    bfin_write32(DMA1_9_START_ADDR,val)
    767. 

  767. #define bfin_read_DMA1_9_X_COUNT()           bfin_read16(DMA1_9_X_COUNT)
    768. 

  768. #define bfin_write_DMA1_9_X_COUNT(val)       bfin_write16(DMA1_9_X_COUNT,val)
    769. 

  769. #define bfin_read_DMA1_9_Y_COUNT()           bfin_read16(DMA1_9_Y_COUNT)
    770. 

  770. #define bfin_write_DMA1_9_Y_COUNT(val)       bfin_write16(DMA1_9_Y_COUNT,val)
    771. 

  771. #define bfin_read_DMA1_9_X_MODIFY()          bfin_read16(DMA1_9_X_MODIFY)
    772. 

  772. #define bfin_write_DMA1_9_X_MODIFY(val)      bfin_write16(DMA1_9_X_MODIFY,val)
    773. 

  773. #define bfin_read_DMA1_9_Y_MODIFY()          bfin_read16(DMA1_9_Y_MODIFY)
    774. 

  774. #define bfin_write_DMA1_9_Y_MODIFY(val)      bfin_write16(DMA1_9_Y_MODIFY,val)
    775. 

  775. #define bfin_read_DMA1_9_CURR_DESC_PTR()     bfin_read32(DMA1_9_CURR_DESC_PTR)
    776. 

  776. #define bfin_write_DMA1_9_CURR_DESC_PTR(val) bfin_write32(DMA1_9_CURR_DESC_PTR,val)
    777. 

  777. #define bfin_read_DMA1_9_CURR_ADDR()         bfin_read32(DMA1_9_CURR_ADDR)
    778. 

  778. #define bfin_write_DMA1_9_CURR_ADDR(val)     bfin_write32(DMA1_9_CURR_ADDR,val)
    779. 

  779. #define bfin_read_DMA1_9_CURR_X_COUNT()      bfin_read16(DMA1_9_CURR_X_COUNT)
    780. 

  780. #define bfin_write_DMA1_9_CURR_X_COUNT(val)  bfin_write16(DMA1_9_CURR_X_COUNT,val)
    781. 

  781. #define bfin_read_DMA1_9_CURR_Y_COUNT()      bfin_read16(DMA1_9_CURR_Y_COUNT)
    782. 

  782. #define bfin_write_DMA1_9_CURR_Y_COUNT(val)  bfin_write16(DMA1_9_CURR_Y_COUNT,val)
    783. 

  783. #define bfin_read_DMA1_9_IRQ_STATUS()        bfin_read16(DMA1_9_IRQ_STATUS)
    784. 

  784. #define bfin_write_DMA1_9_IRQ_STATUS(val)    bfin_write16(DMA1_9_IRQ_STATUS,val)
    785. 

  785. #define bfin_read_DMA1_9_PERIPHERAL_MAP()    bfin_read16(DMA1_9_PERIPHERAL_MAP)
    786. 

  786. #define bfin_write_DMA1_9_PERIPHERAL_MAP(val) bfin_write16(DMA1_9_PERIPHERAL_MAP,val)
    787. 

  787. #define bfin_read_DMA1_10_CONFIG()           bfin_read16(DMA1_10_CONFIG)
    788. 

  788. #define bfin_write_DMA1_10_CONFIG(val)       bfin_write16(DMA1_10_CONFIG,val)
    789. 

  789. #define bfin_read_DMA1_10_NEXT_DESC_PTR()    bfin_read32(DMA1_10_NEXT_DESC_PTR)
    790. 

  790. #define bfin_write_DMA1_10_NEXT_DESC_PTR(val) bfin_write32(DMA1_10_NEXT_DESC_PTR,val)
    791. 

  791. #define bfin_read_DMA1_10_START_ADDR()       bfin_read32(DMA1_10_START_ADDR)
    792. 

  792. #define bfin_write_DMA1_10_START_ADDR(val)   bfin_write32(DMA1_10_START_ADDR,val)
    793. 

  793. #define bfin_read_DMA1_10_X_COUNT()          bfin_read16(DMA1_10_X_COUNT)
    794. 

  794. #define bfin_write_DMA1_10_X_COUNT(val)      bfin_write16(DMA1_10_X_COUNT,val)
    795. 

  795. #define bfin_read_DMA1_10_Y_COUNT()          bfin_read16(DMA1_10_Y_COUNT)
    796. 

  796. #define bfin_write_DMA1_10_Y_COUNT(val)      bfin_write16(DMA1_10_Y_COUNT,val)
    797. 

  797. #define bfin_read_DMA1_10_X_MODIFY()         bfin_read16(DMA1_10_X_MODIFY)
    798. 

  798. #define bfin_write_DMA1_10_X_MODIFY(val)     bfin_write16(DMA1_10_X_MODIFY,val)
    799. 

  799. #define bfin_read_DMA1_10_Y_MODIFY()         bfin_read16(DMA1_10_Y_MODIFY)
    800. 

  800. #define bfin_write_DMA1_10_Y_MODIFY(val)     bfin_write16(DMA1_10_Y_MODIFY,val)
    801. 

  801. #define bfin_read_DMA1_10_CURR_DESC_PTR()    bfin_read32(DMA1_10_CURR_DESC_PTR)
    802. 

  802. #define bfin_write_DMA1_10_CURR_DESC_PTR(val) bfin_write32(DMA1_10_CURR_DESC_PTR,val)
    803. 

  803. #define bfin_read_DMA1_10_CURR_ADDR()        bfin_read32(DMA1_10_CURR_ADDR)
    804. 

  804. #define bfin_write_DMA1_10_CURR_ADDR(val)    bfin_write32(DMA1_10_CURR_ADDR,val)
    805. 

  805. #define bfin_read_DMA1_10_CURR_X_COUNT()     bfin_read16(DMA1_10_CURR_X_COUNT)
    806. 

  806. #define bfin_write_DMA1_10_CURR_X_COUNT(val) bfin_write16(DMA1_10_CURR_X_COUNT,val)
    807. 

  807. #define bfin_read_DMA1_10_CURR_Y_COUNT()     bfin_read16(DMA1_10_CURR_Y_COUNT)
    808. 

  808. #define bfin_write_DMA1_10_CURR_Y_COUNT(val) bfin_write16(DMA1_10_CURR_Y_COUNT,val)
    809. 

  809. #define bfin_read_DMA1_10_IRQ_STATUS()       bfin_read16(DMA1_10_IRQ_STATUS)
    810. 

  810. #define bfin_write_DMA1_10_IRQ_STATUS(val)   bfin_write16(DMA1_10_IRQ_STATUS,val)
    811. 

  811. #define bfin_read_DMA1_10_PERIPHERAL_MAP()   bfin_read16(DMA1_10_PERIPHERAL_MAP)
    812. 

  812. #define bfin_write_DMA1_10_PERIPHERAL_MAP(val) bfin_write16(DMA1_10_PERIPHERAL_MAP,val)
    813. 

  813. #define bfin_read_DMA1_11_CONFIG()           bfin_read16(DMA1_11_CONFIG)
    814. 

  814. #define bfin_write_DMA1_11_CONFIG(val)       bfin_write16(DMA1_11_CONFIG,val)
    815. 

  815. #define bfin_read_DMA1_11_NEXT_DESC_PTR()    bfin_read32(DMA1_11_NEXT_DESC_PTR)
    816. 

  816. #define bfin_write_DMA1_11_NEXT_DESC_PTR(val) bfin_write32(DMA1_11_NEXT_DESC_PTR,val)
    817. 

  817. #define bfin_read_DMA1_11_START_ADDR()       bfin_read32(DMA1_11_START_ADDR)
    818. 

  818. #define bfin_write_DMA1_11_START_ADDR(val)   bfin_write32(DMA1_11_START_ADDR,val)
    819. 

  819. #define bfin_read_DMA1_11_X_COUNT()          bfin_read16(DMA1_11_X_COUNT)
    820. 

  820. #define bfin_write_DMA1_11_X_COUNT(val)      bfin_write16(DMA1_11_X_COUNT,val)
    821. 

  821. #define bfin_read_DMA1_11_Y_COUNT()          bfin_read16(DMA1_11_Y_COUNT)
    822. 

  822. #define bfin_write_DMA1_11_Y_COUNT(val)      bfin_write16(DMA1_11_Y_COUNT,val)
    823. 

  823. #define bfin_read_DMA1_11_X_MODIFY()         bfin_read16(DMA1_11_X_MODIFY)
    824. 

  824. #define bfin_write_DMA1_11_X_MODIFY(val)     bfin_write16(DMA1_11_X_MODIFY,val)
    825. 

  825. #define bfin_read_DMA1_11_Y_MODIFY()         bfin_read16(DMA1_11_Y_MODIFY)
    826. 

  826. #define bfin_write_DMA1_11_Y_MODIFY(val)     bfin_write16(DMA1_11_Y_MODIFY,val)
    827. 

  827. #define bfin_read_DMA1_11_CURR_DESC_PTR()    bfin_read32(DMA1_11_CURR_DESC_PTR)
    828. 

  828. #define bfin_write_DMA1_11_CURR_DESC_PTR(val) bfin_write32(DMA1_11_CURR_DESC_PTR,val)
    829. 

  829. #define bfin_read_DMA1_11_CURR_ADDR()        bfin_read32(DMA1_11_CURR_ADDR)
    830. 

  830. #define bfin_write_DMA1_11_CURR_ADDR(val)    bfin_write32(DMA1_11_CURR_ADDR,val)
    831. 

  831. #define bfin_read_DMA1_11_CURR_X_COUNT()     bfin_read16(DMA1_11_CURR_X_COUNT)
    832. 

  832. #define bfin_write_DMA1_11_CURR_X_COUNT(val) bfin_write16(DMA1_11_CURR_X_COUNT,val)
    833. 

  833. #define bfin_read_DMA1_11_CURR_Y_COUNT()     bfin_read16(DMA1_11_CURR_Y_COUNT)
    834. 

  834. #define bfin_write_DMA1_11_CURR_Y_COUNT(val) bfin_write16(DMA1_11_CURR_Y_COUNT,val)
    835. 

  835. #define bfin_read_DMA1_11_IRQ_STATUS()       bfin_read16(DMA1_11_IRQ_STATUS)
    836. 

  836. #define bfin_write_DMA1_11_IRQ_STATUS(val)   bfin_write16(DMA1_11_IRQ_STATUS,val)
    837. 

  837. #define bfin_read_DMA1_11_PERIPHERAL_MAP()   bfin_read16(DMA1_11_PERIPHERAL_MAP)
    838. 

  838. #define bfin_write_DMA1_11_PERIPHERAL_MAP(val) bfin_write16(DMA1_11_PERIPHERAL_MAP,val)
    839. 

  839. /* Memory DMA1 Controller registers (0xFFC0 1E80-0xFFC0 1FFF) */
    840. 

  840. #define bfin_read_MDMA_D2_CONFIG()          bfin_read16(MDMA_D2_CONFIG)
    841. 

  841. #define bfin_write_MDMA_D2_CONFIG(val)      bfin_write16(MDMA_D2_CONFIG,val)
    842. 

  842. #define bfin_read_MDMA_D2_NEXT_DESC_PTR()   bfin_read32(MDMA_D2_NEXT_DESC_PTR)
    843. 

  843. #define bfin_write_MDMA_D2_NEXT_DESC_PTR(val) bfin_write32(MDMA_D2_NEXT_DESC_PTR,val)
    844. 

  844. #define bfin_read_MDMA_D2_START_ADDR()      bfin_read32(MDMA_D2_START_ADDR)
    845. 

  845. #define bfin_write_MDMA_D2_START_ADDR(val)  bfin_write32(MDMA_D2_START_ADDR,val)
    846. 

  846. #define bfin_read_MDMA_D2_X_COUNT()         bfin_read16(MDMA_D2_X_COUNT)
    847. 

  847. #define bfin_write_MDMA_D2_X_COUNT(val)     bfin_write16(MDMA_D2_X_COUNT,val)
    848. 

  848. #define bfin_read_MDMA_D2_Y_COUNT()         bfin_read16(MDMA_D2_Y_COUNT)
    849. 

  849. #define bfin_write_MDMA_D2_Y_COUNT(val)     bfin_write16(MDMA_D2_Y_COUNT,val)
    850. 

  850. #define bfin_read_MDMA_D2_X_MODIFY()        bfin_read16(MDMA_D2_X_MODIFY)
    851. 

  851. #define bfin_write_MDMA_D2_X_MODIFY(val)    bfin_write16(MDMA_D2_X_MODIFY,val)
    852. 

  852. #define bfin_read_MDMA_D2_Y_MODIFY()        bfin_read16(MDMA_D2_Y_MODIFY)
    853. 

  853. #define bfin_write_MDMA_D2_Y_MODIFY(val)    bfin_write16(MDMA_D2_Y_MODIFY,val)
    854. 

  854. #define bfin_read_MDMA_D2_CURR_DESC_PTR()   bfin_read32(MDMA_D2_CURR_DESC_PTR)
    855. 

  855. #define bfin_write_MDMA_D2_CURR_DESC_PTR(val) bfin_write32(MDMA_D2_CURR_DESC_PTR,val)
    856. 

  856. #define bfin_read_MDMA_D2_CURR_ADDR()       bfin_read32(MDMA_D2_CURR_ADDR)
    857. 

  857. #define bfin_write_MDMA_D2_CURR_ADDR(val)   bfin_write32(MDMA_D2_CURR_ADDR,val)
    858. 

  858. #define bfin_read_MDMA_D2_CURR_X_COUNT()    bfin_read16(MDMA_D2_CURR_X_COUNT)
    859. 

  859. #define bfin_write_MDMA_D2_CURR_X_COUNT(val) bfin_write16(MDMA_D2_CURR_X_COUNT,val)
    860. 

  860. #define bfin_read_MDMA_D2_CURR_Y_COUNT()    bfin_read16(MDMA_D2_CURR_Y_COUNT)
    861. 

  861. #define bfin_write_MDMA_D2_CURR_Y_COUNT(val) bfin_write16(MDMA_D2_CURR_Y_COUNT,val)
    862. 

  862. #define bfin_read_MDMA_D2_IRQ_STATUS()      bfin_read16(MDMA_D2_IRQ_STATUS)
    863. 

  863. #define bfin_write_MDMA_D2_IRQ_STATUS(val)  bfin_write16(MDMA_D2_IRQ_STATUS,val)
    864. 

  864. #define bfin_read_MDMA_D2_PERIPHERAL_MAP()  bfin_read16(MDMA_D2_PERIPHERAL_MAP)
    865. 

  865. #define bfin_write_MDMA_D2_PERIPHERAL_MAP(val) bfin_write16(MDMA_D2_PERIPHERAL_MAP,val)
    866. 

  866. #define bfin_read_MDMA_S2_CONFIG()          bfin_read16(MDMA_S2_CONFIG)
    867. 

  867. #define bfin_write_MDMA_S2_CONFIG(val)      bfin_write16(MDMA_S2_CONFIG,val)
    868. 

  868. #define bfin_read_MDMA_S2_NEXT_DESC_PTR()   bfin_read32(MDMA_S2_NEXT_DESC_PTR)
    869. 

  869. #define bfin_write_MDMA_S2_NEXT_DESC_PTR(val) bfin_write32(MDMA_S2_NEXT_DESC_PTR,val)
    870. 

  870. #define bfin_read_MDMA_S2_START_ADDR()      bfin_read32(MDMA_S2_START_ADDR)
    871. 

  871. #define bfin_write_MDMA_S2_START_ADDR(val)  bfin_write32(MDMA_S2_START_ADDR,val)
    872. 

  872. #define bfin_read_MDMA_S2_X_COUNT()         bfin_read16(MDMA_S2_X_COUNT)
    873. 

  873. #define bfin_write_MDMA_S2_X_COUNT(val)     bfin_write16(MDMA_S2_X_COUNT,val)
    874. 

  874. #define bfin_read_MDMA_S2_Y_COUNT()         bfin_read16(MDMA_S2_Y_COUNT)
    875. 

  875. #define bfin_write_MDMA_S2_Y_COUNT(val)     bfin_write16(MDMA_S2_Y_COUNT,val)
    876. 

  876. #define bfin_read_MDMA_S2_X_MODIFY()        bfin_read16(MDMA_S2_X_MODIFY)
    877. 

  877. #define bfin_write_MDMA_S2_X_MODIFY(val)    bfin_write16(MDMA_S2_X_MODIFY,val)
    878. 

  878. #define bfin_read_MDMA_S2_Y_MODIFY()        bfin_read16(MDMA_S2_Y_MODIFY)
    879. 

  879. #define bfin_write_MDMA_S2_Y_MODIFY(val)    bfin_write16(MDMA_S2_Y_MODIFY,val)
    880. 

  880. #define bfin_read_MDMA_S2_CURR_DESC_PTR()   bfin_read32(MDMA_S2_CURR_DESC_PTR)
    881. 

  881. #define bfin_write_MDMA_S2_CURR_DESC_PTR(val) bfin_write32(MDMA_S2_CURR_DESC_PTR,val)
    882. 

  882. #define bfin_read_MDMA_S2_CURR_ADDR()       bfin_read32(MDMA_S2_CURR_ADDR)
    883. 

  883. #define bfin_write_MDMA_S2_CURR_ADDR(val)   bfin_write32(MDMA_S2_CURR_ADDR,val)
    884. 

  884. #define bfin_read_MDMA_S2_CURR_X_COUNT()    bfin_read16(MDMA_S2_CURR_X_COUNT)
    885. 

  885. #define bfin_write_MDMA_S2_CURR_X_COUNT(val) bfin_write16(MDMA_S2_CURR_X_COUNT,val)
    886. 

  886. #define bfin_read_MDMA_S2_CURR_Y_COUNT()    bfin_read16(MDMA_S2_CURR_Y_COUNT)
    887. 

  887. #define bfin_write_MDMA_S2_CURR_Y_COUNT(val) bfin_write16(MDMA_S2_CURR_Y_COUNT,val)
    888. 

  888. #define bfin_read_MDMA_S2_IRQ_STATUS()      bfin_read16(MDMA_S2_IRQ_STATUS)
    889. 

  889. #define bfin_write_MDMA_S2_IRQ_STATUS(val)  bfin_write16(MDMA_S2_IRQ_STATUS,val)
    890. 

  890. #define bfin_read_MDMA_S2_PERIPHERAL_MAP()  bfin_read16(MDMA_S2_PERIPHERAL_MAP)
    891. 

  891. #define bfin_write_MDMA_S2_PERIPHERAL_MAP(val) bfin_write16(MDMA_S2_PERIPHERAL_MAP,val)
    892. 

  892. #define bfin_read_MDMA_D3_CONFIG()          bfin_read16(MDMA_D3_CONFIG)
    893. 

  893. #define bfin_write_MDMA_D3_CONFIG(val)      bfin_write16(MDMA_D3_CONFIG,val)
    894. 

  894. #define bfin_read_MDMA_D3_NEXT_DESC_PTR()   bfin_read32(MDMA_D3_NEXT_DESC_PTR)
    895. 

  895. #define bfin_write_MDMA_D3_NEXT_DESC_PTR(val) bfin_write32(MDMA_D3_NEXT_DESC_PTR,val)
    896. 

  896. #define bfin_read_MDMA_D3_START_ADDR()      bfin_read32(MDMA_D3_START_ADDR)
    897. 

  897. #define bfin_write_MDMA_D3_START_ADDR(val)  bfin_write32(MDMA_D3_START_ADDR,val)
    898. 

  898. #define bfin_read_MDMA_D3_X_COUNT()         bfin_read16(MDMA_D3_X_COUNT)
    899. 

  899. #define bfin_write_MDMA_D3_X_COUNT(val)     bfin_write16(MDMA_D3_X_COUNT,val)
    900. 

  900. #define bfin_read_MDMA_D3_Y_COUNT()         bfin_read16(MDMA_D3_Y_COUNT)
    901. 

  901. #define bfin_write_MDMA_D3_Y_COUNT(val)     bfin_write16(MDMA_D3_Y_COUNT,val)
    902. 

  902. #define bfin_read_MDMA_D3_X_MODIFY()        bfin_read16(MDMA_D3_X_MODIFY)
    903. 

  903. #define bfin_write_MDMA_D3_X_MODIFY(val)    bfin_write16(MDMA_D3_X_MODIFY,val)
    904. 

  904. #define bfin_read_MDMA_D3_Y_MODIFY()        bfin_read16(MDMA_D3_Y_MODIFY)
    905. 

  905. #define bfin_write_MDMA_D3_Y_MODIFY(val)    bfin_write16(MDMA_D3_Y_MODIFY,val)
    906. 

  906. #define bfin_read_MDMA_D3_CURR_DESC_PTR()   bfin_read32(MDMA_D3_CURR_DESC_PTR)
    907. 

  907. #define bfin_write_MDMA_D3_CURR_DESC_PTR(val) bfin_write32(MDMA_D3_CURR_DESC_PTR,val)
    908. 

  908. #define bfin_read_MDMA_D3_CURR_ADDR()       bfin_read32(MDMA_D3_CURR_ADDR)
    909. 

  909. #define bfin_write_MDMA_D3_CURR_ADDR(val)   bfin_write32(MDMA_D3_CURR_ADDR,val)
    910. 

  910. #define bfin_read_MDMA_D3_CURR_X_COUNT()    bfin_read16(MDMA_D3_CURR_X_COUNT)
    911. 

  911. #define bfin_write_MDMA_D3_CURR_X_COUNT(val) bfin_write16(MDMA_D3_CURR_X_COUNT,val)
    912. 

  912. #define bfin_read_MDMA_D3_CURR_Y_COUNT()    bfin_read16(MDMA_D3_CURR_Y_COUNT)
    913. 

  913. #define bfin_write_MDMA_D3_CURR_Y_COUNT(val) bfin_write16(MDMA_D3_CURR_Y_COUNT,val)
    914. 

  914. #define bfin_read_MDMA_D3_IRQ_STATUS()      bfin_read16(MDMA_D3_IRQ_STATUS)
    915. 

  915. #define bfin_write_MDMA_D3_IRQ_STATUS(val)  bfin_write16(MDMA_D3_IRQ_STATUS,val)
    916. 

  916. #define bfin_read_MDMA_D3_PERIPHERAL_MAP()  bfin_read16(MDMA_D3_PERIPHERAL_MAP)
    917. 

  917. #define bfin_write_MDMA_D3_PERIPHERAL_MAP(val) bfin_write16(MDMA_D3_PERIPHERAL_MAP,val)
    918. 

  918. #define bfin_read_MDMA_S3_CONFIG()          bfin_read16(MDMA_S3_CONFIG)
    919. 

  919. #define bfin_write_MDMA_S3_CONFIG(val)      bfin_write16(MDMA_S3_CONFIG,val)
    920. 

  920. #define bfin_read_MDMA_S3_NEXT_DESC_PTR()   bfin_read32(MDMA_S3_NEXT_DESC_PTR)
    921. 

  921. #define bfin_write_MDMA_S3_NEXT_DESC_PTR(val) bfin_write32(MDMA_S3_NEXT_DESC_PTR,val)
    922. 

  922. #define bfin_read_MDMA_S3_START_ADDR()      bfin_read32(MDMA_S3_START_ADDR)
    923. 

  923. #define bfin_write_MDMA_S3_START_ADDR(val)  bfin_write32(MDMA_S3_START_ADDR,val)
    924. 

  924. #define bfin_read_MDMA_S3_X_COUNT()         bfin_read16(MDMA_S3_X_COUNT)
    925. 

  925. #define bfin_write_MDMA_S3_X_COUNT(val)     bfin_write16(MDMA_S3_X_COUNT,val)
    926. 

  926. #define bfin_read_MDMA_S3_Y_COUNT()         bfin_read16(MDMA_S3_Y_COUNT)
    927. 

  927. #define bfin_write_MDMA_S3_Y_COUNT(val)     bfin_write16(MDMA_S3_Y_COUNT,val)
    928. 

  928. #define bfin_read_MDMA_S3_X_MODIFY()        bfin_read16(MDMA_S3_X_MODIFY)
    929. 

  929. #define bfin_write_MDMA_S3_X_MODIFY(val)    bfin_write16(MDMA_S3_X_MODIFY,val)
    930. 

  930. #define bfin_read_MDMA_S3_Y_MODIFY()        bfin_read16(MDMA_S3_Y_MODIFY)
    931. 

  931. #define bfin_write_MDMA_S3_Y_MODIFY(val)    bfin_write16(MDMA_S3_Y_MODIFY,val)
    932. 

  932. #define bfin_read_MDMA_S3_CURR_DESC_PTR()   bfin_read32(MDMA_S3_CURR_DESC_PTR)
    933. 

  933. #define bfin_write_MDMA_S3_CURR_DESC_PTR(val) bfin_write32(MDMA_S3_CURR_DESC_PTR,val)
    934. 

  934. #define bfin_read_MDMA_S3_CURR_ADDR()       bfin_read32(MDMA_S3_CURR_ADDR)
    935. 

  935. #define bfin_write_MDMA_S3_CURR_ADDR(val)   bfin_write32(MDMA_S3_CURR_ADDR,val)
    936. 

  936. #define bfin_read_MDMA_S3_CURR_X_COUNT()    bfin_read16(MDMA_S3_CURR_X_COUNT)
    937. 

  937. #define bfin_write_MDMA_S3_CURR_X_COUNT(val) bfin_write16(MDMA_S3_CURR_X_COUNT,val)
    938. 

  938. #define bfin_read_MDMA_S3_CURR_Y_COUNT()    bfin_read16(MDMA_S3_CURR_Y_COUNT)
    939. 

  939. #define bfin_write_MDMA_S3_CURR_Y_COUNT(val) bfin_write16(MDMA_S3_CURR_Y_COUNT,val)
    940. 

  940. #define bfin_read_MDMA_S3_IRQ_STATUS()      bfin_read16(MDMA_S3_IRQ_STATUS)
    941. 

  941. #define bfin_write_MDMA_S3_IRQ_STATUS(val)  bfin_write16(MDMA_S3_IRQ_STATUS,val)
    942. 

  942. #define bfin_read_MDMA_S3_PERIPHERAL_MAP()  bfin_read16(MDMA_S3_PERIPHERAL_MAP)
    943. 

  943. #define bfin_write_MDMA_S3_PERIPHERAL_MAP(val) bfin_write16(MDMA_S3_PERIPHERAL_MAP,val)
    944. 

  944. /* DMA2 Controller registers (0xFFC0 0C00-0xFFC0 0DFF) */
    945. 

  945. #define bfin_read_DMA2_0_CONFIG()            bfin_read16(DMA2_0_CONFIG)
    946. 

  946. #define bfin_write_DMA2_0_CONFIG(val)        bfin_write16(DMA2_0_CONFIG,val)
    947. 

  947. #define bfin_read_DMA2_0_NEXT_DESC_PTR()     bfin_read32(DMA2_0_NEXT_DESC_PTR)
    948. 

  948. #define bfin_write_DMA2_0_NEXT_DESC_PTR(val) bfin_write32(DMA2_0_NEXT_DESC_PTR,val)
    949. 

  949. #define bfin_read_DMA2_0_START_ADDR()        bfin_read32(DMA2_0_START_ADDR)
    950. 

  950. #define bfin_write_DMA2_0_START_ADDR(val)    bfin_write32(DMA2_0_START_ADDR,val)
    951. 

  951. #define bfin_read_DMA2_0_X_COUNT()           bfin_read16(DMA2_0_X_COUNT)
    952. 

  952. #define bfin_write_DMA2_0_X_COUNT(val)       bfin_write16(DMA2_0_X_COUNT,val)
    953. 

  953. #define bfin_read_DMA2_0_Y_COUNT()           bfin_read16(DMA2_0_Y_COUNT)
    954. 

  954. #define bfin_write_DMA2_0_Y_COUNT(val)       bfin_write16(DMA2_0_Y_COUNT,val)
    955. 

  955. #define bfin_read_DMA2_0_X_MODIFY()          bfin_read16(DMA2_0_X_MODIFY)
    956. 

  956. #define bfin_write_DMA2_0_X_MODIFY(val)      bfin_write16(DMA2_0_X_MODIFY,val)
    957. 

  957. #define bfin_read_DMA2_0_Y_MODIFY()          bfin_read16(DMA2_0_Y_MODIFY)
    958. 

  958. #define bfin_write_DMA2_0_Y_MODIFY(val)      bfin_write16(DMA2_0_Y_MODIFY,val)
    959. 

  959. #define bfin_read_DMA2_0_CURR_DESC_PTR()     bfin_read32(DMA2_0_CURR_DESC_PTR)
    960. 

  960. #define bfin_write_DMA2_0_CURR_DESC_PTR(val) bfin_write32(DMA2_0_CURR_DESC_PTR,val)
    961. 

  961. #define bfin_read_DMA2_0_CURR_ADDR()         bfin_read32(DMA2_0_CURR_ADDR)
    962. 

  962. #define bfin_write_DMA2_0_CURR_ADDR(val)     bfin_write32(DMA2_0_CURR_ADDR,val)
    963. 

  963. #define bfin_read_DMA2_0_CURR_X_COUNT()      bfin_read16(DMA2_0_CURR_X_COUNT)
    964. 

  964. #define bfin_write_DMA2_0_CURR_X_COUNT(val)  bfin_write16(DMA2_0_CURR_X_COUNT,val)
    965. 

  965. #define bfin_read_DMA2_0_CURR_Y_COUNT()      bfin_read16(DMA2_0_CURR_Y_COUNT)
    966. 

  966. #define bfin_write_DMA2_0_CURR_Y_COUNT(val)  bfin_write16(DMA2_0_CURR_Y_COUNT,val)
    967. 

  967. #define bfin_read_DMA2_0_IRQ_STATUS()        bfin_read16(DMA2_0_IRQ_STATUS)
    968. 

  968. #define bfin_write_DMA2_0_IRQ_STATUS(val)    bfin_write16(DMA2_0_IRQ_STATUS,val)
    969. 

  969. #define bfin_read_DMA2_0_PERIPHERAL_MAP()    bfin_read16(DMA2_0_PERIPHERAL_MAP)
    970. 

  970. #define bfin_write_DMA2_0_PERIPHERAL_MAP(val) bfin_write16(DMA2_0_PERIPHERAL_MAP,val)
    971. 

  971. #define bfin_read_DMA2_1_CONFIG()            bfin_read16(DMA2_1_CONFIG)
    972. 

  972. #define bfin_write_DMA2_1_CONFIG(val)        bfin_write16(DMA2_1_CONFIG,val)
    973. 

  973. #define bfin_read_DMA2_1_NEXT_DESC_PTR()     bfin_read32(DMA2_1_NEXT_DESC_PTR)
    974. 

  974. #define bfin_write_DMA2_1_NEXT_DESC_PTR(val) bfin_write32(DMA2_1_NEXT_DESC_PTR,val)
    975. 

  975. #define bfin_read_DMA2_1_START_ADDR()        bfin_read32(DMA2_1_START_ADDR)
    976. 

  976. #define bfin_write_DMA2_1_START_ADDR(val)    bfin_write32(DMA2_1_START_ADDR,val)
    977. 

  977. #define bfin_read_DMA2_1_X_COUNT()           bfin_read16(DMA2_1_X_COUNT)
    978. 

  978. #define bfin_write_DMA2_1_X_COUNT(val)       bfin_write16(DMA2_1_X_COUNT,val)
    979. 

  979. #define bfin_read_DMA2_1_Y_COUNT()           bfin_read16(DMA2_1_Y_COUNT)
    980. 

  980. #define bfin_write_DMA2_1_Y_COUNT(val)       bfin_write16(DMA2_1_Y_COUNT,val)
    981. 

  981. #define bfin_read_DMA2_1_X_MODIFY()          bfin_read16(DMA2_1_X_MODIFY)
    982. 

  982. #define bfin_write_DMA2_1_X_MODIFY(val)      bfin_write16(DMA2_1_X_MODIFY,val)
    983. 

  983. #define bfin_read_DMA2_1_Y_MODIFY()          bfin_read16(DMA2_1_Y_MODIFY)
    984. 

  984. #define bfin_write_DMA2_1_Y_MODIFY(val)      bfin_write16(DMA2_1_Y_MODIFY,val)
    985. 

  985. #define bfin_read_DMA2_1_CURR_DESC_PTR()     bfin_read32(DMA2_1_CURR_DESC_PTR)
    986. 

  986. #define bfin_write_DMA2_1_CURR_DESC_PTR(val) bfin_write32(DMA2_1_CURR_DESC_PTR,val)
    987. 

  987. #define bfin_read_DMA2_1_CURR_ADDR()         bfin_read32(DMA2_1_CURR_ADDR)
    988. 

  988. #define bfin_write_DMA2_1_CURR_ADDR(val)     bfin_write32(DMA2_1_CURR_ADDR,val)
    989. 

  989. #define bfin_read_DMA2_1_CURR_X_COUNT()      bfin_read16(DMA2_1_CURR_X_COUNT)
    990. 

  990. #define bfin_write_DMA2_1_CURR_X_COUNT(val)  bfin_write16(DMA2_1_CURR_X_COUNT,val)
    991. 

  991. #define bfin_read_DMA2_1_CURR_Y_COUNT()      bfin_read16(DMA2_1_CURR_Y_COUNT)
    992. 

  992. #define bfin_write_DMA2_1_CURR_Y_COUNT(val)  bfin_write16(DMA2_1_CURR_Y_COUNT,val)
    993. 

  993. #define bfin_read_DMA2_1_IRQ_STATUS()        bfin_read16(DMA2_1_IRQ_STATUS)
    994. 

  994. #define bfin_write_DMA2_1_IRQ_STATUS(val)    bfin_write16(DMA2_1_IRQ_STATUS,val)
    995. 

  995. #define bfin_read_DMA2_1_PERIPHERAL_MAP()    bfin_read16(DMA2_1_PERIPHERAL_MAP)
    996. 

  996. #define bfin_write_DMA2_1_PERIPHERAL_MAP(val) bfin_write16(DMA2_1_PERIPHERAL_MAP,val)
    997. 

  997. #define bfin_read_DMA2_2_CONFIG()            bfin_read16(DMA2_2_CONFIG)
    998. 

  998. #define bfin_write_DMA2_2_CONFIG(val)        bfin_write16(DMA2_2_CONFIG,val)
    999. 

  999. #define bfin_read_DMA2_2_NEXT_DESC_PTR()     bfin_read32(DMA2_2_NEXT_DESC_PTR)
    1000. 

  1000. #define bfin_write_DMA2_2_NEXT_DESC_PTR(val) bfin_write32(DMA2_2_NEXT_DESC_PTR,val)
    1001. 

  1001. #define bfin_read_DMA2_2_START_ADDR()        bfin_read32(DMA2_2_START_ADDR)
    1002. 

  1002. #define bfin_write_DMA2_2_START_ADDR(val)    bfin_write32(DMA2_2_START_ADDR,val)
    1003. 

  1003. #define bfin_read_DMA2_2_X_COUNT()           bfin_read16(DMA2_2_X_COUNT)
    1004. 

  1004. #define bfin_write_DMA2_2_X_COUNT(val)       bfin_write16(DMA2_2_X_COUNT,val)
    1005. 

  1005. #define bfin_read_DMA2_2_Y_COUNT()           bfin_read16(DMA2_2_Y_COUNT)
    1006. 

  1006. #define bfin_write_DMA2_2_Y_COUNT(val)       bfin_write16(DMA2_2_Y_COUNT,val)
    1007. 

  1007. #define bfin_read_DMA2_2_X_MODIFY()          bfin_read16(DMA2_2_X_MODIFY)
    1008. 

  1008. #define bfin_write_DMA2_2_X_MODIFY(val)      bfin_write16(DMA2_2_X_MODIFY,val)
    1009. 

  1009. #define bfin_read_DMA2_2_Y_MODIFY()          bfin_read16(DMA2_2_Y_MODIFY)
    1010. 

  1010. #define bfin_write_DMA2_2_Y_MODIFY(val)      bfin_write16(DMA2_2_Y_MODIFY,val)
    1011. 

  1011. #define bfin_read_DMA2_2_CURR_DESC_PTR()     bfin_read32(DMA2_2_CURR_DESC_PTR)
    1012. 

  1012. #define bfin_write_DMA2_2_CURR_DESC_PTR(val) bfin_write32(DMA2_2_CURR_DESC_PTR,val)
    1013. 

  1013. #define bfin_read_DMA2_2_CURR_ADDR()         bfin_read32(DMA2_2_CURR_ADDR)
    1014. 

  1014. #define bfin_write_DMA2_2_CURR_ADDR(val)     bfin_write32(DMA2_2_CURR_ADDR,val)
    1015. 

  1015. #define bfin_read_DMA2_2_CURR_X_COUNT()      bfin_read16(DMA2_2_CURR_X_COUNT)
    1016. 

  1016. #define bfin_write_DMA2_2_CURR_X_COUNT(val)  bfin_write16(DMA2_2_CURR_X_COUNT,val)
    1017. 

  1017. #define bfin_read_DMA2_2_CURR_Y_COUNT()      bfin_read16(DMA2_2_CURR_Y_COUNT)
    1018. 

  1018. #define bfin_write_DMA2_2_CURR_Y_COUNT(val)  bfin_write16(DMA2_2_CURR_Y_COUNT,val)
    1019. 

  1019. #define bfin_read_DMA2_2_IRQ_STATUS()        bfin_read16(DMA2_2_IRQ_STATUS)
    1020. 

  1020. #define bfin_write_DMA2_2_IRQ_STATUS(val)    bfin_write16(DMA2_2_IRQ_STATUS,val)
    1021. 

  1021. #define bfin_read_DMA2_2_PERIPHERAL_MAP()    bfin_read16(DMA2_2_PERIPHERAL_MAP)
    1022. 

  1022. #define bfin_write_DMA2_2_PERIPHERAL_MAP(val) bfin_write16(DMA2_2_PERIPHERAL_MAP,val)
    1023. 

  1023. #define bfin_read_DMA2_3_CONFIG()            bfin_read16(DMA2_3_CONFIG)
    1024. 

  1024. #define bfin_write_DMA2_3_CONFIG(val)        bfin_write16(DMA2_3_CONFIG,val)
    1025. 

  1025. #define bfin_read_DMA2_3_NEXT_DESC_PTR()     bfin_read32(DMA2_3_NEXT_DESC_PTR)
    1026. 

  1026. #define bfin_write_DMA2_3_NEXT_DESC_PTR(val) bfin_write32(DMA2_3_NEXT_DESC_PTR,val)
    1027. 

  1027. #define bfin_read_DMA2_3_START_ADDR()        bfin_read32(DMA2_3_START_ADDR)
    1028. 

  1028. #define bfin_write_DMA2_3_START_ADDR(val)    bfin_write32(DMA2_3_START_ADDR,val)
    1029. 

  1029. #define bfin_read_DMA2_3_X_COUNT()           bfin_read16(DMA2_3_X_COUNT)
    1030. 

  1030. #define bfin_write_DMA2_3_X_COUNT(val)       bfin_write16(DMA2_3_X_COUNT,val)
    1031. 

  1031. #define bfin_read_DMA2_3_Y_COUNT()           bfin_read16(DMA2_3_Y_COUNT)
    1032. 

  1032. #define bfin_write_DMA2_3_Y_COUNT(val)       bfin_write16(DMA2_3_Y_COUNT,val)
    1033. 

  1033. #define bfin_read_DMA2_3_X_MODIFY()          bfin_read16(DMA2_3_X_MODIFY)
    1034.