| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120 | /* * arch/arm/mach-orion5x/db88f5281-setup.c * * Marvell Orion-2 Development Board Setup * * Maintainer: Tzachi Perelstein <tzachi@marvell.com> * * This file is licensed under the terms of the GNU General Public * License version 2.  This program is licensed "as is" without any * warranty of any kind, whether express or implied. */#include <linux/gpio.h>#include <linux/kernel.h>#include <linux/init.h>#include <linux/platform_device.h>#include <linux/pci.h>#include <linux/irq.h>#include <linux/mtd/physmap.h>#include <linux/mtd/nand.h>#include <linux/timer.h>#include <linux/mv643xx_eth.h>#include <linux/i2c.h>#include <asm/mach-types.h>#include <asm/mach/arch.h>#include <asm/mach/pci.h>#include <mach/orion5x.h>#include <linux/platform_data/mtd-orion_nand.h>#include "common.h"#include "mpp.h"/***************************************************************************** * DB-88F5281 on board devices ****************************************************************************//* * 512K NOR flash Device bus boot chip select */#define DB88F5281_NOR_BOOT_BASE		0xf4000000#define DB88F5281_NOR_BOOT_SIZE		SZ_512K/* * 7-Segment on Device bus chip select 0 */#define DB88F5281_7SEG_BASE		0xfa000000#define DB88F5281_7SEG_SIZE		SZ_1K/* * 32M NOR flash on Device bus chip select 1 */#define DB88F5281_NOR_BASE		0xfc000000#define DB88F5281_NOR_SIZE		SZ_32M/* * 32M NAND flash on Device bus chip select 2 */#define DB88F5281_NAND_BASE		0xfa800000#define DB88F5281_NAND_SIZE		SZ_1K/* * PCI */#define DB88F5281_PCI_SLOT0_OFFS		7#define DB88F5281_PCI_SLOT0_IRQ_PIN		12#define DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN	13/***************************************************************************** * 512M NOR Flash on Device bus Boot CS ****************************************************************************/static struct physmap_flash_data db88f5281_boot_flash_data = {	.width		= 1,	/* 8 bit bus width */};static struct resource db88f5281_boot_flash_resource = {	.flags		= IORESOURCE_MEM,	.start		= DB88F5281_NOR_BOOT_BASE,	.end		= DB88F5281_NOR_BOOT_BASE + DB88F5281_NOR_BOOT_SIZE - 1,};static struct platform_device db88f5281_boot_flash = {	.name		= "physmap-flash",	.id		= 0,	.dev		= {		.platform_data	= &db88f5281_boot_flash_data,	},	.num_resources	= 1,	.resource	= &db88f5281_boot_flash_resource,};/***************************************************************************** * 32M NOR Flash on Device bus CS1 ****************************************************************************/static struct physmap_flash_data db88f5281_nor_flash_data = {	.width		= 4,	/* 32 bit bus width */};static struct resource db88f5281_nor_flash_resource = {	.flags		= IORESOURCE_MEM,	.start		= DB88F5281_NOR_BASE,	.end		= DB88F5281_NOR_BASE + DB88F5281_NOR_SIZE - 1,};static struct platform_device db88f5281_nor_flash = {	.name		= "physmap-flash",	.id		= 1,	.dev		= {		.platform_data	= &db88f5281_nor_flash_data,	},	.num_resources	= 1,	.resource	= &db88f5281_nor_flash_resource,};/***************************************************************************** * 32M NAND Flash on Device bus CS2
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