tcpConnectionMonitoring.c 42 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/export.h>
  10. #include <linux/kernel.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/io.h>
  13. #include <linux/mtd/mtd.h>
  14. #include <linux/mtd/nand.h>
  15. #include <linux/mtd/partitions.h>
  16. #include <linux/mtd/plat-ram.h>
  17. #include <linux/mtd/physmap.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/spi/flash.h>
  20. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  21. #include <linux/usb/isp1362.h>
  22. #endif
  23. #include <linux/i2c.h>
  24. #include <linux/i2c/adp5588.h>
  25. #include <linux/etherdevice.h>
  26. #include <linux/ata_platform.h>
  27. #include <linux/irq.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/usb/sl811.h>
  30. #include <linux/spi/mmc_spi.h>
  31. #include <linux/leds.h>
  32. #include <linux/input.h>
  33. #include <asm/dma.h>
  34. #include <asm/bfin5xx_spi.h>
  35. #include <asm/reboot.h>
  36. #include <asm/portmux.h>
  37. #include <asm/dpmc.h>
  38. #include <asm/bfin_sport.h>
  39. #ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
  40. #include <linux/regulator/fixed.h>
  41. #endif
  42. #include <linux/regulator/machine.h>
  43. #include <linux/regulator/consumer.h>
  44. #include <linux/regulator/userspace-consumer.h>
  45. /*
  46. * Name the Board for the /proc/cpuinfo
  47. */
  48. const char bfin_board_name[] = "ADI BF537-STAMP";
  49. /*
  50. * Driver needs to know address, irq and flag pin.
  51. */
  52. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  53. #include <linux/usb/isp1760.h>
  54. static struct resource bfin_isp1760_resources[] = {
  55. [0] = {
  56. .start = 0x203C0000,
  57. .end = 0x203C0000 + 0x000fffff,
  58. .flags = IORESOURCE_MEM,
  59. },
  60. [1] = {
  61. .start = IRQ_PF7,
  62. .end = IRQ_PF7,
  63. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  64. },
  65. };
  66. static struct isp1760_platform_data isp1760_priv = {
  67. .is_isp1761 = 0,
  68. .bus_width_16 = 1,
  69. .port1_otg = 0,
  70. .analog_oc = 0,
  71. .dack_polarity_high = 0,
  72. .dreq_polarity_high = 0,
  73. };
  74. static struct platform_device bfin_isp1760_device = {
  75. .name = "isp1760",
  76. .id = 0,
  77. .dev = {
  78. .platform_data = &isp1760_priv,
  79. },
  80. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  81. .resource = bfin_isp1760_resources,
  82. };
  83. #endif
  84. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  85. #include <linux/gpio_keys.h>
  86. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  87. {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
  88. {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
  89. {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
  90. {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
  91. };
  92. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  93. .buttons = bfin_gpio_keys_table,
  94. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  95. };
  96. static struct platform_device bfin_device_gpiokeys = {
  97. .name = "gpio-keys",
  98. .dev = {
  99. .platform_data = &bfin_gpio_keys_data,
  100. },
  101. };
  102. #endif
  103. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  104. static struct resource bfin_pcmcia_cf_resources[] = {
  105. {
  106. .start = 0x20310000, /* IO PORT */
  107. .end = 0x20312000,
  108. .flags = IORESOURCE_MEM,
  109. }, {
  110. .start = 0x20311000, /* Attribute Memory */
  111. .end = 0x20311FFF,
  112. .flags = IORESOURCE_MEM,
  113. }, {
  114. .start = IRQ_PF4,
  115. .end = IRQ_PF4,
  116. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  117. }, {
  118. .start = 6, /* Card Detect PF6 */
  119. .end = 6,
  120. .flags = IORESOURCE_IRQ,
  121. },
  122. };
  123. static struct platform_device bfin_pcmcia_cf_device = {
  124. .name = "bfin_cf_pcmcia",
  125. .id = -1,
  126. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  127. .resource = bfin_pcmcia_cf_resources,
  128. };
  129. #endif
  130. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  131. static struct platform_device rtc_device = {
  132. .name = "rtc-bfin",
  133. .id = -1,
  134. };
  135. #endif
  136. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  137. #include <linux/smc91x.h>
  138. static struct smc91x_platdata smc91x_info = {
  139. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  140. .leda = RPC_LED_100_10,
  141. .ledb = RPC_LED_TX_RX,
  142. };
  143. static struct resource smc91x_resources[] = {
  144. {
  145. .name = "smc91x-regs",
  146. .start = 0x20300300,
  147. .end = 0x20300300 + 16,
  148. .flags = IORESOURCE_MEM,
  149. }, {
  150. .start = IRQ_PF7,
  151. .end = IRQ_PF7,
  152. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  153. },
  154. };
  155. static struct platform_device smc91x_device = {
  156. .name = "smc91x",
  157. .id = 0,
  158. .num_resources = ARRAY_SIZE(smc91x_resources),
  159. .resource = smc91x_resources,
  160. .dev = {
  161. .platform_data = &smc91x_info,
  162. },
  163. };
  164. #endif
  165. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  166. static struct resource dm9000_resources[] = {
  167. [0] = {
  168. .start = 0x203FB800,
  169. .end = 0x203FB800 + 1,
  170. .flags = IORESOURCE_MEM,
  171. },
  172. [1] = {
  173. .start = 0x203FB804,
  174. .end = 0x203FB804 + 1,
  175. .flags = IORESOURCE_MEM,
  176. },
  177. [2] = {
  178. .start = IRQ_PF9,
  179. .end = IRQ_PF9,
  180. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  181. },
  182. };
  183. static struct platform_device dm9000_device = {
  184. .name = "dm9000",
  185. .id = -1,
  186. .num_resources = ARRAY_SIZE(dm9000_resources),
  187. .resource = dm9000_resources,
  188. };
  189. #endif
  190. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  191. static struct resource sl811_hcd_resources[] = {
  192. {
  193. .start = 0x20340000,
  194. .end = 0x20340000,
  195. .flags = IORESOURCE_MEM,
  196. }, {
  197. .start = 0x20340004,
  198. .end = 0x20340004,
  199. .flags = IORESOURCE_MEM,
  200. }, {
  201. .start = IRQ_PF4,
  202. .end = IRQ_PF4,
  203. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  204. },
  205. };
  206. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  207. void sl811_port_power(struct device *dev, int is_on)
  208. {
  209. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  210. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  211. }
  212. #endif
  213. static struct sl811_platform_data sl811_priv = {
  214. .potpg = 10,
  215. .power = 250, /* == 500mA */
  216. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  217. .port_power = &sl811_port_power,
  218. #endif
  219. };
  220. static struct platform_device sl811_hcd_device = {
  221. .name = "sl811-hcd",
  222. .id = 0,
  223. .dev = {
  224. .platform_data = &sl811_priv,
  225. },
  226. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  227. .resource = sl811_hcd_resources,
  228. };
  229. #endif
  230. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  231. static struct resource isp1362_hcd_resources[] = {
  232. {
  233. .start = 0x20360000,
  234. .end = 0x20360000,
  235. .flags = IORESOURCE_MEM,
  236. }, {
  237. .start = 0x20360004,
  238. .end = 0x20360004,
  239. .flags = IORESOURCE_MEM,
  240. }, {
  241. .start = IRQ_PF3,
  242. .end = IRQ_PF3,
  243. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  244. },
  245. };
  246. static struct isp1362_platform_data isp1362_priv = {
  247. .sel15Kres = 1,
  248. .clknotstop = 0,
  249. .oc_enable = 0,
  250. .int_act_high = 0,
  251. .int_edge_triggered = 0,
  252. .remote_wakeup_connected = 0,
  253. .no_power_switching = 1,
  254. .power_switching_mode = 0,
  255. };
  256. static struct platform_device isp1362_hcd_device = {
  257. .name = "isp1362-hcd",
  258. .id = 0,
  259. .dev = {
  260. .platform_data = &isp1362_priv,
  261. },
  262. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  263. .resource = isp1362_hcd_resources,
  264. };
  265. #endif
  266. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  267. static unsigned short bfin_can_peripherals[] = {
  268. P_CAN0_RX, P_CAN0_TX, 0
  269. };
  270. static struct resource bfin_can_resources[] = {
  271. {
  272. .start = 0xFFC02A00,
  273. .end = 0xFFC02FFF,
  274. .flags = IORESOURCE_MEM,
  275. },
  276. {
  277. .start = IRQ_CAN_RX,
  278. .end = IRQ_CAN_RX,
  279. .flags = IORESOURCE_IRQ,
  280. },
  281. {
  282. .start = IRQ_CAN_TX,
  283. .end = IRQ_CAN_TX,
  284. .flags = IORESOURCE_IRQ,
  285. },
  286. {
  287. .start = IRQ_CAN_ERROR,
  288. .end = IRQ_CAN_ERROR,
  289. .flags = IORESOURCE_IRQ,
  290. },
  291. };
  292. static struct platform_device bfin_can_device = {
  293. .name = "bfin_can",
  294. .num_resources = ARRAY_SIZE(bfin_can_resources),
  295. .resource = bfin_can_resources,
  296. .dev = {
  297. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  298. },
  299. };
  300. #endif
  301. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  302. #include <linux/bfin_mac.h>
  303. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  304. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  305. {
  306. .addr = 1,
  307. .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
  308. },
  309. };
  310. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  311. .phydev_number = 1,
  312. .phydev_data = bfin_phydev_data,
  313. .phy_mode = PHY_INTERFACE_MODE_MII,
  314. .mac_peripherals = bfin_mac_peripherals,
  315. };
  316. static struct platform_device bfin_mii_bus = {
  317. .name = "bfin_mii_bus",
  318. .dev = {
  319. .platform_data = &bfin_mii_bus_data,
  320. }
  321. };
  322. static struct platform_device bfin_mac_device = {
  323. .name = "bfin_mac",
  324. .dev = {
  325. .platform_data = &bfin_mii_bus,
  326. }
  327. };
  328. #endif
  329. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  330. static struct resource net2272_bfin_resources[] = {
  331. {
  332. .start = 0x20300000,
  333. .end = 0x20300000 + 0x100,
  334. .flags = IORESOURCE_MEM,
  335. }, {
  336. .start = 1,
  337. .flags = IORESOURCE_BUS,
  338. }, {
  339. .start = IRQ_PF7,
  340. .end = IRQ_PF7,
  341. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  342. },
  343. };
  344. static struct platform_device net2272_bfin_device = {
  345. .name = "net2272",
  346. .id = -1,
  347. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  348. .resource = net2272_bfin_resources,
  349. };
  350. #endif
  351. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  352. const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
  353. static struct mtd_partition bfin_plat_nand_partitions[] = {
  354. {
  355. .name = "linux kernel(nand)",
  356. .size = 0x400000,
  357. .offset = 0,
  358. }, {
  359. .name = "file system(nand)",
  360. .size = MTDPART_SIZ_FULL,
  361. .offset = MTDPART_OFS_APPEND,
  362. },
  363. };
  364. #define BFIN_NAND_PLAT_CLE 2
  365. #define BFIN_NAND_PLAT_ALE 1
  366. static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  367. {
  368. struct nand_chip *this = mtd->priv;
  369. if (cmd == NAND_CMD_NONE)
  370. return;
  371. if (ctrl & NAND_CLE)
  372. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
  373. else
  374. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
  375. }
  376. #define BFIN_NAND_PLAT_READY GPIO_PF3
  377. static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
  378. {
  379. return gpio_get_value(BFIN_NAND_PLAT_READY);
  380. }
  381. static struct platform_nand_data bfin_plat_nand_data = {
  382. .chip = {
  383. .nr_chips = 1,
  384. .chip_delay = 30,
  385. .part_probe_types = part_probes,
  386. .partitions = bfin_plat_nand_partitions,
  387. .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
  388. },
  389. .ctrl = {
  390. .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
  391. .dev_ready = bfin_plat_nand_dev_ready,
  392. },
  393. };
  394. #define MAX(x, y) (x > y ? x : y)
  395. static struct resource bfin_plat_nand_resources = {
  396. .start = 0x20212000,
  397. .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
  398. .flags = IORESOURCE_MEM,
  399. };
  400. static struct platform_device bfin_async_nand_device = {
  401. .name = "gen_nand",
  402. .id = -1,
  403. .num_resources = 1,
  404. .resource = &bfin_plat_nand_resources,
  405. .dev = {
  406. .platform_data = &bfin_plat_nand_data,
  407. },
  408. };
  409. static void bfin_plat_nand_init(void)
  410. {
  411. gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
  412. }
  413. #else
  414. static void bfin_plat_nand_init(void) {}
  415. #endif
  416. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  417. static struct mtd_partition stamp_partitions[] = {
  418. {
  419. .name = "bootloader(nor)",
  420. .size = 0x40000,
  421. .offset = 0,
  422. }, {
  423. .name = "linux kernel(nor)",
  424. .size = 0x180000,
  425. .offset = MTDPART_OFS_APPEND,
  426. }, {
  427. .name = "file system(nor)",
  428. .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
  429. .offset = MTDPART_OFS_APPEND,
  430. }, {
  431. .name = "MAC Address(nor)",
  432. .size = MTDPART_SIZ_FULL,
  433. .offset = 0x3F0000,
  434. .mask_flags = MTD_WRITEABLE,
  435. }
  436. };
  437. static struct physmap_flash_data stamp_flash_data = {
  438. .width = 2,
  439. .parts = stamp_partitions,
  440. .nr_parts = ARRAY_SIZE(stamp_partitions),
  441. #ifdef CONFIG_ROMKERNEL
  442. .probe_type = "map_rom",
  443. #endif
  444. };
  445. static struct resource stamp_flash_resource = {
  446. .start = 0x20000000,
  447. .end = 0x203fffff,
  448. .flags = IORESOURCE_MEM,
  449. };
  450. static struct platform_device stamp_flash_device = {
  451. .name = "physmap-flash",
  452. .id = 0,
  453. .dev = {
  454. .platform_data = &stamp_flash_data,
  455. },
  456. .num_resources = 1,
  457. .resource = &stamp_flash_resource,
  458. };
  459. #endif
  460. #if defined(CONFIG_MTD_M25P80) \
  461. || defined(CONFIG_MTD_M25P80_MODULE)
  462. static struct mtd_partition bfin_spi_flash_partitions[] = {
  463. {
  464. .name = "bootloader(spi)",
  465. .size = 0x00040000,
  466. .offset = 0,
  467. .mask_flags = MTD_CAP_ROM
  468. }, {
  469. .name = "linux kernel(spi)",
  470. .size = 0x180000,
  471. .offset = MTDPART_OFS_APPEND,
  472. }, {
  473. .name = "file system(spi)",
  474. .size = MTDPART_SIZ_FULL,
  475. .offset = MTDPART_OFS_APPEND,
  476. }
  477. };
  478. static struct flash_platform_data bfin_spi_flash_data = {
  479. .name = "m25p80",
  480. .parts = bfin_spi_flash_partitions,
  481. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  482. /* .type = "m25p64", */
  483. };
  484. /* SPI flash chip (m25p64) */
  485. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  486. .enable_dma = 0, /* use dma transfer with this chip*/
  487. };
  488. #endif
  489. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  490. #include <linux/input/ad714x.h>
  491. static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
  492. {
  493. .start_stage = 0,
  494. .end_stage = 7,
  495. .max_coord = 128,
  496. },
  497. };
  498. static struct ad714x_button_plat ad7147_spi_button_plat[] = {
  499. {
  500. .keycode = BTN_FORWARD,
  501. .l_mask = 0,
  502. .h_mask = 0x600,
  503. },
  504. {
  505. .keycode = BTN_LEFT,
  506. .l_mask = 0,
  507. .h_mask = 0x500,
  508. },
  509. {
  510. .keycode = BTN_MIDDLE,
  511. .l_mask = 0,
  512. .h_mask = 0x800,
  513. },
  514. {
  515. .keycode = BTN_RIGHT,
  516. .l_mask = 0x100,
  517. .h_mask = 0x400,
  518. },
  519. {
  520. .keycode = BTN_BACK,
  521. .l_mask = 0x200,
  522. .h_mask = 0x400,
  523. },
  524. };
  525. static struct ad714x_platform_data ad7147_spi_platform_data = {
  526. .slider_num = 1,
  527. .button_num = 5,
  528. .slider = ad7147_spi_slider_plat,
  529. .button = ad7147_spi_button_plat,
  530. .stage_cfg_reg = {
  531. {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  532. {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  533. {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
  534. {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
  535. {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
  536. {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
  537. {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  538. {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  539. {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
  540. {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
  541. {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
  542. {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
  543. },
  544. .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
  545. };
  546. #endif
  547. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  548. #include <linux/input/ad714x.h>
  549. static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
  550. {
  551. .keycode = BTN_1,
  552. .l_mask = 0,
  553. .h_mask = 0x1,
  554. },
  555. {
  556. .keycode = BTN_2,
  557. .l_mask = 0,
  558. .h_mask = 0x2,
  559. },
  560. {
  561. .keycode = BTN_3,
  562. .l_mask = 0,
  563. .h_mask = 0x4,
  564. },
  565. {
  566. .keycode = BTN_4,
  567. .l_mask = 0x0,
  568. .h_mask = 0x8,
  569. },
  570. };
  571. static struct ad714x_platform_data ad7142_i2c_platform_data = {
  572. .button_num = 4,
  573. .button = ad7142_i2c_button_plat,
  574. .stage_cfg_reg = {
  575. /* fixme: figure out right setting for all comoponent according
  576. * to hardware feature of EVAL-AD7142EB board */
  577. {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  578. {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  579. {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  580. {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  581. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  582. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  583. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  584. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  585. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  586. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  587. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  588. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  589. },
  590. .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
  591. };
  592. #endif
  593. #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
  594. static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
  595. .enable_dma = 0,
  596. };
  597. #endif
  598. #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
  599. static unsigned short ad2s120x_platform_data[] = {
  600. /* used as SAMPLE and RDVEL */
  601. GPIO_PF5, GPIO_PF6, 0
  602. };
  603. static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
  604. .enable_dma = 0,
  605. };
  606. #endif
  607. #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
  608. static unsigned short ad2s1210_platform_data[] = {
  609. /* use as SAMPLE, A0, A1 */
  610. GPIO_PF7, GPIO_PF8, GPIO_PF9,
  611. # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
  612. /* the RES0 and RES1 pins */
  613. GPIO_PF4, GPIO_PF5,
  614. # endif
  615. 0,
  616. };
  617. static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
  618. .enable_dma = 0,
  619. };
  620. #endif
  621. #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
  622. static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
  623. .enable_dma = 0,
  624. };
  625. #endif
  626. #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
  627. static unsigned short ad7816_platform_data[] = {
  628. GPIO_PF4, /* rdwr_pin */
  629. GPIO_PF5, /* convert_pin */
  630. GPIO_PF7, /* busy_pin */
  631. 0,
  632. };
  633. static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
  634. .enable_dma = 0,
  635. };
  636. #endif
  637. #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
  638. static unsigned long adt7310_platform_data[3] = {
  639. /* INT bound temperature alarm event. line 1 */
  640. IRQ_PG4, IRQF_TRIGGER_LOW,
  641. /* CT bound temperature alarm event irq_flags. line 0 */
  642. IRQF_TRIGGER_LOW,
  643. };
  644. static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
  645. .enable_dma = 0,
  646. };
  647. #endif
  648. #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
  649. static unsigned short ad7298_platform_data[] = {
  650. GPIO_PF7, /* busy_pin */
  651. 0,
  652. };
  653. #endif
  654. #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
  655. static unsigned long adt7316_spi_data[2] = {
  656. IRQF_TRIGGER_LOW, /* interrupt flags */
  657. GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  658. };
  659. static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
  660. .enable_dma = 0,
  661. };
  662. #endif
  663. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  664. #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
  665. static int bfin_mmc_spi_init(struct device *dev,
  666. irqreturn_t (*detect_int)(int, void *), void *data)
  667. {
  668. return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
  669. IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
  670. }
  671. static void bfin_mmc_spi_exit(struct device *dev, void *data)
  672. {
  673. free_irq(MMC_SPI_CARD_DETECT_INT, data);
  674. }
  675. static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
  676. .init = bfin_mmc_spi_init,
  677. .exit = bfin_mmc_spi_exit,
  678. .detect_delay = 100, /* msecs */
  679. };
  680. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  681. .enable_dma = 0,
  682. .pio_interrupt = 0,
  683. };
  684. #endif
  685. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  686. #include <linux/spi/ad7877.h>
  687. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  688. .model = 7877,
  689. .vref_delay_usecs = 50, /* internal, no capacitor */
  690. .x_plate_ohms = 419,
  691. .y_plate_ohms = 486,
  692. .pressure_max = 1000,
  693. .pressure_min = 0,
  694. .stopacq_polarity = 1,
  695. .first_conversion_delay = 3,
  696. .acquisition_time = 1,
  697. .averaging = 1,
  698. .pen_down_acc_interval = 1,
  699. };
  700. #endif
  701. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  702. #include <linux/spi/ad7879.h>
  703. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  704. .model = 7879, /* Model = AD7879 */
  705. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  706. .pressure_max = 10000,
  707. .pressure_min = 0,
  708. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  709. .acquisition_time = 1, /* 4us acquisition time per sample */
  710. .median = 2, /* do 8 measurements */
  711. .averaging = 1, /* take the average of 4 middle samples */
  712. .pen_down_acc_interval = 255, /* 9.4 ms */
  713. .gpio_export = 1, /* Export GPIO to gpiolib */
  714. .gpio_base = -1, /* Dynamic allocation */
  715. };
  716. #endif
  717. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  718. #include <linux/input/adxl34x.h>
  719. static const struct adxl34x_platform_data adxl34x_info = {
  720. .x_axis_offset = 0,
  721. .y_axis_offset = 0,
  722. .z_axis_offset = 0,
  723. .tap_threshold = 0x31,
  724. .tap_duration = 0x10,
  725. .tap_latency = 0x60,
  726. .tap_window = 0xF0,
  727. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  728. .act_axis_control = 0xFF,
  729. .activity_threshold = 5,
  730. .inactivity_threshold = 3,
  731. .inactivity_time = 4,
  732. .free_fall_threshold = 0x7,
  733. .free_fall_time = 0x20,
  734. .data_rate = 0x8,
  735. .data_range = ADXL_FULL_RES,
  736. .ev_type = EV_ABS,
  737. .ev_code_x = ABS_X, /* EV_REL */
  738. .ev_code_y = ABS_Y, /* EV_REL */
  739. .ev_code_z = ABS_Z, /* EV_REL */
  740. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  741. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  742. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  743. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  744. .fifo_mode = ADXL_FIFO_STREAM,
  745. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  746. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  747. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  748. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  749. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  750. };
  751. #endif
  752. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  753. static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
  754. .enable_dma = 1,
  755. };
  756. #endif
  757. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  758. #include <linux/spi/adf702x.h>
  759. #define TXREG 0x0160A470
  760. static const u32 adf7021_regs[] = {
  761. 0x09608FA0,
  762. 0x00575011,
  763. 0x00A7F092,
  764. 0x2B141563,
  765. 0x81F29E94,
  766. 0x00003155,
  767. 0x050A4F66,
  768. 0x00000007,
  769. 0x00000008,
  770. 0x000231E9,
  771. 0x3296354A,
  772. 0x891A2B3B,
  773. 0x00000D9C,
  774. 0x0000000D,
  775. 0x0000000E,
  776. 0x0000000F,
  777. };
  778. static struct adf702x_platform_data adf7021_platform_data = {
  779. .regs_base = (void *)SPORT1_TCR1,
  780. .dma_ch_rx = CH_SPORT1_RX,
  781. .dma_ch_tx = CH_SPORT1_TX,
  782. .irq_sport_err = IRQ_SPORT1_ERROR,
  783. .gpio_int_rfs = GPIO_PF8,
  784. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
  785. P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
  786. .adf702x_model = MODEL_ADF7021,
  787. .adf702x_regs = adf7021_regs,
  788. .tx_reg = TXREG,
  789. };
  790. static inline void adf702x_mac_init(void)
  791. {
  792. eth_random_addr(adf7021_platform_data.mac_addr);
  793. }
  794. #else
  795. static inline void adf702x_mac_init(void) {}
  796. #endif
  797. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  798. #include <linux/spi/ads7846.h>
  799. static int ads7873_get_pendown_state(void)
  800. {
  801. return gpio_get_value(GPIO_PF6);
  802. }
  803. static struct ads7846_platform_data __initdata ad7873_pdata = {
  804. .model = 7873, /* AD7873 */
  805. .x_max = 0xfff,
  806. .y_max = 0xfff,
  807. .x_plate_ohms = 620,
  808. .debounce_max = 1,
  809. .debounce_rep = 0,
  810. .debounce_tol = (~0),
  811. .get_pendown_state = ads7873_get_pendown_state,
  812. };
  813. #endif
  814. #if defined(CONFIG_MTD_DATAFLASH) \
  815. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  816. static struct mtd_partition bfin_spi_dataflash_partitions[] = {
  817. {
  818. .name = "bootloader(spi)",
  819. .size = 0x00040000,
  820. .offset = 0,
  821. .mask_flags = MTD_CAP_ROM
  822. }, {
  823. .name = "linux kernel(spi)",
  824. .size = 0x180000,
  825. .offset = MTDPART_OFS_APPEND,
  826. }, {
  827. .name = "file system(spi)",
  828. .size = MTDPART_SIZ_FULL,
  829. .offset = MTDPART_OFS_APPEND,
  830. }
  831. };
  832. static struct flash_platform_data bfin_spi_dataflash_data = {
  833. .name = "SPI Dataflash",
  834. .parts = bfin_spi_dataflash_partitions,
  835. .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
  836. };
  837. /* DataFlash chip */
  838. static struct bfin5xx_spi_chip data_flash_chip_info = {
  839. .enable_dma = 0, /* use dma transfer with this chip*/
  840. };
  841. #endif
  842. #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
  843. static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
  844. .enable_dma = 0, /* use dma transfer with this chip*/
  845. };
  846. #endif
  847. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  848. #if defined(CONFIG_MTD_M25P80) \
  849. || defined(CONFIG_MTD_M25P80_MODULE)
  850. {
  851. /* the modalias must be the same as spi device driver name */
  852. .modalias = "m25p80", /* Name of spi_driver for this device */
  853. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  854. .bus_num = 0, /* Framework bus number */
  855. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  856. .platform_data = &bfin_spi_flash_data,
  857. .controller_data = &spi_flash_chip_info,
  858. .mode = SPI_MODE_3,
  859. },
  860. #endif
  861. #if defined(CONFIG_MTD_DATAFLASH) \
  862. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  863. { /* DataFlash chip */
  864. .modalias = "mtd_dataflash",
  865. .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
  866. .bus_num = 0, /* Framework bus number */
  867. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  868. .platform_data = &bfin_spi_dataflash_data,
  869. .controller_data = &data_flash_chip_info,
  870. .mode = SPI_MODE_3,
  871. },
  872. #endif
  873. #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
  874. || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
  875. {
  876. .modalias = "ad1836",
  877. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  878. .bus_num = 0,
  879. .chip_select = 4,
  880. .platform_data = "ad1836", /* only includes chip name for the moment */
  881. .mode = SPI_MODE_3,
  882. },
  883. #endif
  884. #ifdef CONFIG_SND_SOC_AD193X_SPI
  885. {
  886. .modalias = "ad193x",
  887. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  888. .bus_num = 0,
  889. .chip_select = 5,
  890. .mode = SPI_MODE_3,
  891. },
  892. #endif
  893. #if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADV80X_MODULE)
  894. {
  895. .modalias = "adav801",
  896. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  897. .bus_num = 0,
  898. .chip_select = 1,
  899. .mode = SPI_MODE_3,
  900. },
  901. #endif
  902. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  903. {
  904. .modalias = "ad714x_captouch",
  905. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  906. .irq = IRQ_PF4,
  907. .bus_num = 0,
  908. .chip_select = 5,
  909. .mode = SPI_MODE_3,
  910. .platform_data = &ad7147_spi_platform_data,
  911. },
  912. #endif
  913. #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
  914. {
  915. .modalias = "ad2s90",
  916. .bus_num = 0,
  917. .chip_select = 3, /* change it for your board */
  918. .mode = SPI_MODE_3,
  919. .platform_data = NULL,
  920. .controller_data = &ad2s90_spi_chip_info,
  921. },
  922. #endif
  923. #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
  924. {
  925. .modalias = "ad2s120x",
  926. .bus_num = 0,
  927. .chip_select = 4, /* CS, change it for your board */
  928. .platform_data = ad2s120x_platform_data,
  929. .controller_data = &ad2s120x_spi_chip_info,
  930. },
  931. #endif
  932. #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
  933. {
  934. .modalias = "ad2s1210",
  935. .max_speed_hz = 8192000,
  936. .bus_num = 0,
  937. .chip_select = 4, /* CS, change it for your board */
  938. .platform_data = ad2s1210_platform_data,
  939. .controller_data = &ad2s1210_spi_chip_info,
  940. },
  941. #endif
  942. #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
  943. {
  944. .modalias = "ad7314",
  945. .max_speed_hz = 1000000,
  946. .bus_num = 0,
  947. .chip_select = 4, /* CS, change it for your board */
  948. .controller_data = &ad7314_spi_chip_info,
  949. .mode = SPI_MODE_1,
  950. },
  951. #endif
  952. #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
  953. {
  954. .modalias = "ad7818",
  955. .max_speed_hz = 1000000,
  956. .bus_num = 0,
  957. .chip_select = 4, /* CS, change it for your board */
  958. .platform_data = ad7816_platform_data,
  959. .controller_data = &ad7816_spi_chip_info,
  960. .mode = SPI_MODE_3,
  961. },
  962. #endif
  963. #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
  964. {
  965. .modalias = "adt7310",
  966. .max_speed_hz = 1000000,
  967. .irq = IRQ_PG5, /* CT alarm event. Line 0 */
  968. .bus_num = 0,
  969. .chip_select = 4, /* CS, change it for your board */
  970. .platform_data = adt7310_platform_data,
  971. .controller_data = &adt7310_spi_chip_info,
  972. .mode = SPI_MODE_3,
  973. },
  974. #endif
  975. #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
  976. {
  977. .modalias = "ad7298",
  978. .max_speed_hz = 1000000,
  979. .bus_num = 0,
  980. .chip_select = 4, /* CS, change it for your board */
  981. .platform_data = ad7298_platform_data,
  982. .mode = SPI_MODE_3,
  983. },
  984. #endif
  985. #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
  986. {
  987. .modalias = "adt7316",
  988. .max_speed_hz = 1000000,
  989. .irq = IRQ_PG5, /* interrupt line */
  990. .bus_num = 0,
  991. .chip_select = 4, /* CS, change it for your board */
  992. .platform_data = adt7316_spi_data,
  993. .controller_data = &adt7316_spi_chip_info,
  994. .mode = SPI_MODE_3,
  995. },
  996. #endif
  997. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  998. {
  999. .modalias = "mmc_spi",
  1000. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1001. .bus_num = 0,
  1002. .chip_select = 4,
  1003. .platform_data = &bfin_mmc_spi_pdata,
  1004. .controller_data = &mmc_spi_chip_info,
  1005. .mode = SPI_MODE_3,
  1006. },
  1007. #endif
  1008. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  1009. {
  1010. .modalias = "ad7877",
  1011. .platform_data = &bfin_ad7877_ts_info,
  1012. .irq = IRQ_PF6,
  1013. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  1014. .bus_num = 0,
  1015. .chip_select = 1,
  1016. },
  1017. #endif
  1018. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  1019. {
  1020. .modalias = "ad7879",
  1021. .platform_data = &bfin_ad7879_ts_info,
  1022. .irq = IRQ_PF7,
  1023. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1024. .bus_num = 0,
  1025. .chip_select = 1,
  1026. .mode = SPI_CPHA | SPI_CPOL,
  1027. },
  1028. #endif
  1029. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  1030. {
  1031. .modalias = "spidev",
  1032. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1033. .bus_num = 0,
  1034. .chip_select = 1,
  1035. },
  1036. #endif
  1037. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1038. {
  1039. .modalias = "bfin-lq035q1-spi",
  1040. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1041. .bus_num = 0,
  1042. .chip_select = 2,
  1043. .mode = SPI_CPHA | SPI_CPOL,
  1044. },
  1045. #endif
  1046. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  1047. {
  1048. .modalias = "enc28j60",
  1049. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1050. .irq = IRQ_PF6,
  1051. .bus_num = 0,
  1052. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1053. .controller_data = &enc28j60_spi_chip_info,
  1054. .mode = SPI_MODE_0,
  1055. },
  1056. #endif
  1057. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  1058. {
  1059. .modalias = "adxl34x",
  1060. .platform_data = &adxl34x_info,
  1061. .irq = IRQ_PF6,
  1062. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1063. .bus_num = 0,
  1064. .chip_select = 2,
  1065. .mode = SPI_MODE_3,
  1066. },
  1067. #endif
  1068. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  1069. {
  1070. .modalias = "adf702x",
  1071. .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
  1072. .bus_num = 0,
  1073. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1074. .platform_data = &adf7021_platform_data,
  1075. .mode = SPI_MODE_0,
  1076. },
  1077. #endif
  1078. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  1079. {
  1080. .modalias = "ads7846",
  1081. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1082. .bus_num = 0,
  1083. .irq = IRQ_PF6,
  1084. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1085. .platform_data = &ad7873_pdata,
  1086. .mode = SPI_MODE_0,
  1087. },
  1088. #endif
  1089. #if defined(CONFIG_AD7476) \
  1090. || defined(CONFIG_AD7476_MODULE)
  1091. {
  1092. .modalias = "ad7476", /* Name of spi_driver for this device */
  1093. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  1094. .bus_num = 0, /* Framework bus number */
  1095. .chip_select = 1, /* Framework chip select. */
  1096. .platform_data = NULL, /* No spi_driver specific config */
  1097. .controller_data = &spi_ad7476_chip_info,
  1098. .mode = SPI_MODE_3,
  1099. },
  1100. #endif
  1101. #if defined(CONFIG_ADE7753) \
  1102. || defined(CONFIG_ADE7753_MODULE)
  1103. {
  1104. .modalias = "ade7753",
  1105. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1106. .bus_num = 0,
  1107. .chip_select = 1, /* CS, change it for your board */
  1108. .platform_data = NULL, /* No spi_driver specific config */
  1109. .mode = SPI_MODE_1,
  1110. },
  1111. #endif
  1112. #if defined(CONFIG_ADE7754) \
  1113. || defined(CONFIG_ADE7754_MODULE)
  1114. {
  1115. .modalias = "ade7754",
  1116. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1117. .bus_num = 0,
  1118. .chip_select = 1, /* CS, change it for your board */
  1119. .platform_data = NULL, /* No spi_driver specific config */
  1120. .mode = SPI_MODE_1,
  1121. },
  1122. #endif
  1123. #if defined(CONFIG_ADE7758) \
  1124. || defined(CONFIG_ADE7758_MODULE)
  1125. {
  1126. .modalias = "ade7758",
  1127. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1128. .bus_num = 0,
  1129. .chip_select = 1, /* CS, change it for your board */
  1130. .platform_data = NULL, /* No spi_driver specific config */
  1131. .mode = SPI_MODE_1,
  1132. },
  1133. #endif
  1134. #if defined(CONFIG_ADE7759) \
  1135. || defined(CONFIG_ADE7759_MODULE)
  1136. {
  1137. .modalias = "ade7759",
  1138. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1139. .bus_num = 0,
  1140. .chip_select = 1, /* CS, change it for your board */
  1141. .platform_data = NULL, /* No spi_driver specific config */
  1142. .mode = SPI_MODE_1,
  1143. },
  1144. #endif
  1145. #if defined(CONFIG_ADE7854_SPI) \
  1146. || defined(CONFIG_ADE7854_SPI_MODULE)
  1147. {
  1148. .modalias = "ade7854",
  1149. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1150. .bus_num = 0,
  1151. .chip_select = 1, /* CS, change it for your board */
  1152. .platform_data = NULL, /* No spi_driver specific config */
  1153. .mode = SPI_MODE_3,
  1154. },
  1155. #endif
  1156. #if defined(CONFIG_ADIS16060) \
  1157. || defined(CONFIG_ADIS16060_MODULE)
  1158. {
  1159. .modalias = "adis16060_r",
  1160. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1161. .bus_num = 0,
  1162. .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
  1163. .platform_data = NULL, /* No spi_driver specific config */
  1164. .mode = SPI_MODE_0,
  1165. },
  1166. {
  1167. .modalias = "adis16060_w",
  1168. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1169. .bus_num = 0,
  1170. .chip_select = 2, /* CS for write, change it for your board */
  1171. .platform_data = NULL, /* No spi_driver specific config */
  1172. .mode = SPI_MODE_1,
  1173. },
  1174. #endif
  1175. #if defined(CONFIG_ADIS16130) \
  1176. || defined(CONFIG_ADIS16130_MODULE)
  1177. {
  1178. .modalias = "adis16130",
  1179. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1180. .bus_num = 0,
  1181. .chip_select = 1, /* CS for read, change it for your board */
  1182. .platform_data = NULL, /* No spi_driver specific config */
  1183. .mode = SPI_MODE_3,
  1184. },
  1185. #endif
  1186. #if defined(CONFIG_ADIS16201) \
  1187. || defined(CONFIG_ADIS16201_MODULE)
  1188. {
  1189. .modalias = "adis16201",
  1190. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1191. .bus_num = 0,
  1192. .chip_select = 5, /* CS, change it for your board */
  1193. .platform_data = NULL, /* No spi_driver specific config */
  1194. .mode = SPI_MODE_3,
  1195. .irq = IRQ_PF4,
  1196. },
  1197. #endif
  1198. #if defined(CONFIG_ADIS16203) \
  1199. || defined(CONFIG_ADIS16203_MODULE)
  1200. {
  1201. .modalias = "adis16203",
  1202. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1203. .bus_num = 0,
  1204. .chip_select = 5, /* CS, change it for your board */
  1205. .platform_data = NULL, /* No spi_driver specific config */
  1206. .mode = SPI_MODE_3,
  1207. .irq = IRQ_PF4,
  1208. },
  1209. #endif
  1210. #if defined(CONFIG_ADIS16204) \
  1211. || defined(CONFIG_ADIS16204_MODULE)
  1212. {
  1213. .modalias = "adis16204",
  1214. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1215. .bus_num = 0,
  1216. .chip_select = 5, /* CS, change it for your board */
  1217. .platform_data = NULL, /* No spi_driver specific config */
  1218. .mode = SPI_MODE_3,
  1219. .irq = IRQ_PF4,
  1220. },
  1221. #endif
  1222. #if defined(CONFIG_ADIS16209) \
  1223. || defined(CONFIG_ADIS16209_MODULE)
  1224. {
  1225. .modalias = "adis16209",
  1226. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1227. .bus_num = 0,
  1228. .chip_select = 5, /* CS, change it for your board */
  1229. .platform_data = NULL, /* No spi_driver specific config */
  1230. .mode = SPI_MODE_3,
  1231. .irq = IRQ_PF4,
  1232. },
  1233. #endif
  1234. #if defined(CONFIG_ADIS16220) \
  1235. || defined(CONFIG_ADIS16220_MODULE)
  1236. {
  1237. .modalias = "adis16220",
  1238. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1239. .bus_num = 0,
  1240. .chip_select = 5, /* CS, change it for your board */
  1241. .platform_data = NULL, /* No spi_driver specific config */
  1242. .mode = SPI_MODE_3,
  1243. .irq = IRQ_PF4,
  1244. },
  1245. #endif
  1246. #if defined(CONFIG_ADIS16240) \
  1247. || defined(CONFIG_ADIS16240_MODULE)
  1248. {
  1249. .modalias = "adis16240",
  1250. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1251. .bus_num = 0,
  1252. .chip_select = 5, /* CS, change it for your board */
  1253. .platform_data = NULL, /* No spi_driver specific config */
  1254. .mode = SPI_MODE_3,
  1255. .irq = IRQ_PF4,
  1256. },
  1257. #endif
  1258. #if defined(CONFIG_ADIS16260) \
  1259. || defined(CONFIG_ADIS16260_MODULE)
  1260. {
  1261. .modalias = "adis16260",
  1262. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1263. .bus_num = 0,
  1264. .chip_select = 5, /* CS, change it for your board */
  1265. .platform_data = NULL, /* No spi_driver specific config */
  1266. .mode = SPI_MODE_3,
  1267. .irq = IRQ_PF4,
  1268. },
  1269. #endif
  1270. #if defined(CONFIG_ADIS16261) \
  1271. || defined(CONFIG_ADIS16261_MODULE)
  1272. {
  1273. .modalias = "adis16261",
  1274. .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
  1275. .bus_num = 0,
  1276. .chip_select = 1, /* CS, change it for your board */
  1277. .platform_data = NULL, /* No spi_driver specific config */
  1278. .mode = SPI_MODE_3,
  1279. },
  1280. #endif
  1281. #if defined(CONFIG_ADIS16300) \
  1282. || defined(CONFIG_ADIS16300_MODULE)
  1283. {
  1284. .modalias = "adis16300",
  1285. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1286. .bus_num = 0,
  1287. .chip_select = 5, /* CS, change it for your board */
  1288. .platform_data = NULL, /* No spi_driver specific config */
  1289. .mode = SPI_MODE_3,
  1290. .irq = IRQ_PF4,
  1291. },
  1292. #endif
  1293. #if defined(CONFIG_ADIS16350) \
  1294. || defined(CONFIG_ADIS16350_MODULE)
  1295. {
  1296. .modalias = "adis16364",
  1297. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1298. .bus_num = 0,
  1299. .chip_select = 5, /* CS, change it for your board */
  1300. .platform_data = NULL, /* No spi_driver specific config */
  1301. .mode = SPI_MODE_3,
  1302. .irq = IRQ_PF4,
  1303. },
  1304. #endif
  1305. #if defined(CONFIG_ADIS16400) \
  1306. || defined(CONFIG_ADIS16400_MODULE)
  1307. {
  1308. .modalias = "adis16400",
  1309. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1310. .bus_num = 0,
  1311. .chip_select = 1, /* CS, change it for your board */
  1312. .platform_data = NULL, /* No spi_driver specific config */
  1313. .mode = SPI_MODE_3,
  1314. },
  1315. #endif
  1316. };
  1317. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  1318. /* SPI controller data */
  1319. static struct bfin5xx_spi_master bfin_spi0_info = {
  1320. .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
  1321. .enable_dma = 1, /* master has the ability to do dma transfer */
  1322. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  1323. };
  1324. /* SPI (0) */
  1325. static struct resource bfin_spi0_resource[] = {
  1326. [0] = {
  1327. .start = SPI0_REGBASE,
  1328. .end = SPI0_REGBASE + 0xFF,
  1329. .flags = IORESOURCE_MEM,
  1330. },
  1331. [1] = {
  1332. .start = CH_SPI,
  1333. .end = CH_SPI,
  1334. .flags = IORESOURCE_DMA,
  1335. },
  1336. [2] = {
  1337. .start = IRQ_SPI,
  1338. .end = IRQ_SPI,
  1339. .flags = IORESOURCE_IRQ,
  1340. },
  1341. };
  1342. static struct platform_device bfin_spi0_device = {
  1343. .name = "bfin-spi",
  1344. .id = 0, /* Bus number */
  1345. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  1346. .resource = bfin_spi0_resource,
  1347. .dev = {
  1348. .platform_data = &bfin_spi0_info, /* Passed to driver */
  1349. },
  1350. };
  1351. #endif /* spi master and devices */
  1352. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  1353. /* SPORT SPI controller data */
  1354. static struct bfin5xx_spi_master bfin_sport_spi0_info = {
  1355. .num_chipselect = MAX_BLACKFIN_GPIOS,
  1356. .enable_dma = 0, /* master don't support DMA */
  1357. .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
  1358. P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
  1359. };
  1360. static struct resource bfin_sport_spi0_resource[] = {
  1361. [0] = {
  1362. .start = SPORT0_TCR1,
  1363. .end = SPORT0_TCR1 + 0xFF,
  1364. .flags = IORESOURCE_MEM,
  1365. },
  1366. [1] = {
  1367. .start = IRQ_SPORT0_ERROR,
  1368. .end = IRQ_SPORT0_ERROR,
  1369. .flags = IORESOURCE_IRQ,
  1370. },
  1371. };
  1372. static struct platform_device bfin_sport_spi0_device = {
  1373. .name = "bfin-sport-spi",
  1374. .id = 1, /* Bus number */
  1375. .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
  1376. .resource = bfin_sport_spi0_resource,
  1377. .dev = {
  1378. .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
  1379. },
  1380. };
  1381. static struct bfin5xx_spi_master bfin_sport_spi1_info = {
  1382. .num_chipselect = MAX_BLACKFIN_GPIOS,
  1383. .enable_dma = 0, /* master don't support DMA */
  1384. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
  1385. P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
  1386. };
  1387. static struct resource bfin_sport_spi1_resource[] = {
  1388. [0] = {
  1389. .start = SPORT1_TCR1,
  1390. .end = SPORT1_TCR1 + 0xFF,
  1391. .flags = IORESOURCE_MEM,
  1392. },
  1393. [1] = {
  1394. .start = IRQ_SPORT1_ERROR,
  1395. .end = IRQ_SPORT1_ERROR,
  1396. .flags = IORESOURCE_IRQ,
  1397. },
  1398. };
  1399. static struct platform_device bfin_sport_spi1_device = {
  1400. .name = "bfin-sport-spi",
  1401. .id = 2, /* Bus number */
  1402. .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
  1403. .resource = bfin_sport_spi1_resource,
  1404. .dev = {
  1405. .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
  1406. },
  1407. };
  1408. #endif /* sport spi master and devices */
  1409. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  1410. static struct platform_device bfin_fb_device = {
  1411. .name = "bf537_lq035",
  1412. };
  1413. #endif
  1414. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1415. #include <asm/bfin-lq035q1.h>
  1416. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  1417. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  1418. .ppi_mode = USE_RGB565_16_BIT_PPI,
  1419. .use_bl = 0, /* let something else control the LCD Blacklight */
  1420. .gpio_bl = GPIO_PF7,
  1421. };
  1422. static struct resource bfin_lq035q1_resources[] = {
  1423. {
  1424. .start = IRQ_PPI_ERROR,
  1425. .end = IRQ_PPI_ERROR,
  1426. .flags = IORESOURCE_IRQ,
  1427. },
  1428. };
  1429. static struct platform_device bfin_lq035q1_device = {
  1430. .name = "bfin-lq035q1",
  1431. .id = -1,
  1432. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  1433. .resource = bfin_lq035q1_resources,
  1434. .dev = {
  1435. .platform_data = &bfin_lq035q1_data,
  1436. },
  1437. };
  1438. #endif
  1439. #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
  1440. || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
  1441. #include <linux/videodev2.h>
  1442. #include <media/blackfin/bfin_capture.h>
  1443. #include <media/blackfin/ppi.h>
  1444. static const unsigned short ppi_req[] = {
  1445. P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
  1446. P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
  1447. P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
  1448. 0,
  1449. };
  1450. static const struct ppi_info ppi_info = {
  1451. .type = PPI_TYPE_PPI,
  1452. .dma_ch = CH_PPI,
  1453. .irq_err = IRQ_PPI_ERROR,
  1454. .base = (void __iomem *)PPI_CONTROL,
  1455. .pin_req = ppi_req,
  1456. };
  1457. #if defined(CONFIG_VIDEO_VS6624) \
  1458. || defined(CONFIG_VIDEO_VS6624_MODULE)
  1459. static struct v4l2_input vs6624_inputs[] = {
  1460. {
  1461. .index = 0,
  1462. .name = "Camera",
  1463. .type = V4L2_INPUT_TYPE_CAMERA,
  1464. .std = V4L2_STD_UNKNOWN,
  1465. },
  1466. };
  1467. static struct bcap_route vs6624_routes[] = {
  1468. {
  1469. .input = 0,
  1470. .output = 0,
  1471. },
  1472. };
  1473. static const unsigned vs6624_ce_pin = GPIO_PF10;
  1474. static struct bfin_capture_config bfin_capture_data = {
  1475. .card_name = "BF537",
  1476. .inputs = vs6624_inputs,
  1477. .num_inputs = ARRAY_SIZE(vs6624_inputs),
  1478. .routes = vs6624_routes,
  1479. .i2c_adapter_id = 0,
  1480. .board_info = {
  1481. .type = "vs6624",
  1482. .addr = 0x10,
  1483. .platform_data = (void *)&vs6624_ce_pin,
  1484. },
  1485. .ppi_info = &ppi_info,
  1486. .ppi_control = (PACK_EN | DLEN_8 | XFR_TYPE | 0x0020),
  1487. };
  1488. #endif
  1489. static struct platform_device bfin_capture_device = {
  1490. .name = "bfin_capture",
  1491. .dev = {
  1492. .platform_data = &bfin_capture_data,
  1493. },
  1494. };
  1495. #endif
  1496. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1497. #ifdef CONFIG_SERIAL_BFIN_UART0
  1498. static struct resource bfin_uart0_resources[] = {
  1499. {
  1500. .start = UART0_THR,