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- /*
- * Copyright 2007-2010 Analog Devices Inc.
- *
- * Licensed under the Clear BSD license or the GPL-2 (or later)
- */
- #ifndef _DEF_BF54X_H
- #define _DEF_BF54X_H
- /* ************************************************************** */
- /* SYSTEM & MMR ADDRESS DEFINITIONS COMMON TO ALL ADSP-BF54x */
- /* ************************************************************** */
- /* PLL Registers */
- #define PLL_CTL 0xffc00000 /* PLL Control Register */
- #define PLL_DIV 0xffc00004 /* PLL Divisor Register */
- #define VR_CTL 0xffc00008 /* Voltage Regulator Control Register */
- #define PLL_STAT 0xffc0000c /* PLL Status Register */
- #define PLL_LOCKCNT 0xffc00010 /* PLL Lock Count Register */
- /* Debug/MP/Emulation Registers (0xFFC00014 - 0xFFC00014) */
- #define CHIPID 0xffc00014
- /* CHIPID Masks */
- #define CHIPID_VERSION 0xF0000000
- #define CHIPID_FAMILY 0x0FFFF000
- #define CHIPID_MANUFACTURE 0x00000FFE
- /* System Reset and Interrupt Controller (0xFFC00100 - 0xFFC00104) */
- #define SWRST 0xffc00100 /* Software Reset Register */
- #define SYSCR 0xffc00104 /* System Configuration register */
- /* SIC Registers */
- #define SIC_RVECT 0xffc00108
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