| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205 | /* * linux/arch/arm/mach-omap1/pm.c * * OMAP Power Management Routines * * Original code for the SA11x0: * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com> * * Modified for the PXA250 by Nicolas Pitre: * Copyright (c) 2002 Monta Vista Software, Inc. * * Modified for the OMAP1510 by David Singleton: * Copyright (c) 2002 Monta Vista Software, Inc. * * Cleanup 2004 for OMAP1510/1610 by Dirk Behme <dirk.behme@de.bosch.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */#include <linux/suspend.h>#include <linux/sched.h>#include <linux/proc_fs.h>#include <linux/interrupt.h>#include <linux/sysfs.h>#include <linux/module.h>#include <linux/io.h>#include <linux/atomic.h>#include <asm/fncpy.h>#include <asm/system_misc.h>#include <asm/irq.h>#include <asm/mach/time.h>#include <asm/mach/irq.h>#include <mach/tc.h>#include <mach/mux.h>#include <linux/omap-dma.h>#include <plat/dmtimer.h>#include <mach/irqs.h>#include "iomap.h"#include "clock.h"#include "pm.h"#include "sram.h"static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE];static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE];static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE];static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE];static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE];#ifdef CONFIG_OMAP_32K_TIMERstatic unsigned short enable_dyn_sleep = 1;static ssize_t idle_show(struct kobject *kobj, struct kobj_attribute *attr,			 char *buf){	return sprintf(buf, "%hu\n", enable_dyn_sleep);}static ssize_t idle_store(struct kobject *kobj, struct kobj_attribute *attr,			  const char * buf, size_t n){	unsigned short value;	if (sscanf(buf, "%hu", &value) != 1 ||	    (value != 0 && value != 1)) {		printk(KERN_ERR "idle_sleep_store: Invalid value\n");		return -EINVAL;	}	enable_dyn_sleep = value;	return n;}static struct kobj_attribute sleep_while_idle_attr =	__ATTR(sleep_while_idle, 0644, idle_show, idle_store);#endifstatic void (*omap_sram_suspend)(unsigned long r0, unsigned long r1) = NULL;/* * Let's power down on idle, but only if we are really * idle, because once we start down the path of * going idle we continue to do idle even if we get * a clock tick interrupt . . */void omap1_pm_idle(void){	extern __u32 arm_idlect1_mask;	__u32 use_idlect1 = arm_idlect1_mask;	int do_sleep = 0;	local_fiq_disable();#if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER)#warning Enable 32kHz OS timer in order to allow sleep states in idle	use_idlect1 = use_idlect1 & ~(1 << 9);#else	while (enable_dyn_sleep) {#ifdef CONFIG_CBUS_TAHVO_USB		extern int vbus_active;		/* Clock requirements? */		if (vbus_active)			break;#endif		do_sleep = 1;		break;	}#endif#ifdef CONFIG_OMAP_DM_TIMER	use_idlect1 = omap_dm_timer_modify_idlect_mask(use_idlect1);#endif	if (omap_dma_running())		use_idlect1 &= ~(1 << 6);	/* We should be able to remove the do_sleep variable and multiple	 * tests above as soon as drivers, timer and DMA code have been fixed.	 * Even the sleep block count should become obsolete. */	if ((use_idlect1 != ~0) || !do_sleep) {		__u32 saved_idlect1 = omap_readl(ARM_IDLECT1);		if (cpu_is_omap15xx())			use_idlect1 &= OMAP1510_BIG_SLEEP_REQUEST;		else			use_idlect1 &= OMAP1610_IDLECT1_SLEEP_VAL;		omap_writel(use_idlect1, ARM_IDLECT1);		__asm__ volatile ("mcr	p15, 0, r0, c7, c0, 4");		omap_writel(saved_idlect1, ARM_IDLECT1);		local_fiq_enable();		return;	}	omap_sram_suspend(omap_readl(ARM_IDLECT1),			  omap_readl(ARM_IDLECT2));	local_fiq_enable();}/* * Configuration of the wakeup event is board specific. For the * moment we put it into this helper function. Later it may move * to board specific files. */static void omap_pm_wakeup_setup(void){	u32 level1_wake = 0;	u32 level2_wake = OMAP_IRQ_BIT(INT_UART2);	/*	 * Turn off all interrupts except GPIO bank 1, L1-2nd level cascade,	 * and the L2 wakeup interrupts: keypad and UART2. Note that the	 * drivers must still separately call omap_set_gpio_wakeup() to	 * wake up to a GPIO interrupt.	 */	if (cpu_is_omap7xx())		level1_wake = OMAP_IRQ_BIT(INT_7XX_GPIO_BANK1) |			OMAP_IRQ_BIT(INT_7XX_IH2_IRQ);	else if (cpu_is_omap15xx())		level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |			OMAP_IRQ_BIT(INT_1510_IH2_IRQ);	else if (cpu_is_omap16xx())		level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |			OMAP_IRQ_BIT(INT_1610_IH2_IRQ);	omap_writel(~level1_wake, OMAP_IH1_MIR);	if (cpu_is_omap7xx()) {		omap_writel(~level2_wake, OMAP_IH2_0_MIR);		omap_writel(~(OMAP_IRQ_BIT(INT_7XX_WAKE_UP_REQ) |				OMAP_IRQ_BIT(INT_7XX_MPUIO_KEYPAD)),				OMAP_IH2_1_MIR);	} else if (cpu_is_omap15xx()) {		level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD);		omap_writel(~level2_wake,  OMAP_IH2_MIR);	} else if (cpu_is_omap16xx()) {		level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD);		omap_writel(~level2_wake, OMAP_IH2_0_MIR);		/* INT_1610_WAKE_UP_REQ is needed for GPIO wakeup... */
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