statisticsMemoryDefinition.h 7.6 KB

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  1. /*
  2. * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
  3. * http://www.samsung.com
  4. *
  5. * EXYNOS - IRQ definitions
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #ifndef __ASM_ARCH_IRQS_H
  12. #define __ASM_ARCH_IRQS_H __FILE__
  13. #include <plat/irqs.h>
  14. /* PPI: Private Peripheral Interrupt */
  15. #define IRQ_PPI(x) (x + 16)
  16. /* SPI: Shared Peripheral Interrupt */
  17. #define IRQ_SPI(x) (x + 32)
  18. /* COMBINER */
  19. #define MAX_IRQ_IN_COMBINER 8
  20. #define COMBINER_GROUP(x) ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(128))
  21. #define COMBINER_IRQ(x, y) (COMBINER_GROUP(x) + y)
  22. /* For EXYNOS4 and EXYNOS5 */
  23. #define EXYNOS_IRQ_MCT_LOCALTIMER IRQ_PPI(12)
  24. #define EXYNOS_IRQ_EINT16_31 IRQ_SPI(32)
  25. /* For EXYNOS4 SoCs */
  26. #define EXYNOS4_IRQ_EINT0 IRQ_SPI(16)
  27. #define EXYNOS4_IRQ_EINT1 IRQ_SPI(17)
  28. #define EXYNOS4_IRQ_EINT2 IRQ_SPI(18)
  29. #define EXYNOS4_IRQ_EINT3 IRQ_SPI(19)
  30. #define EXYNOS4_IRQ_EINT4 IRQ_SPI(20)
  31. #define EXYNOS4_IRQ_EINT5 IRQ_SPI(21)
  32. #define EXYNOS4_IRQ_EINT6 IRQ_SPI(22)
  33. #define EXYNOS4_IRQ_EINT7 IRQ_SPI(23)
  34. #define EXYNOS4_IRQ_EINT8 IRQ_SPI(24)
  35. #define EXYNOS4_IRQ_EINT9 IRQ_SPI(25)
  36. #define EXYNOS4_IRQ_EINT10 IRQ_SPI(26)
  37. #define EXYNOS4_IRQ_EINT11 IRQ_SPI(27)
  38. #define EXYNOS4_IRQ_EINT12 IRQ_SPI(28)
  39. #define EXYNOS4_IRQ_EINT13 IRQ_SPI(29)
  40. #define EXYNOS4_IRQ_EINT14 IRQ_SPI(30)
  41. #define EXYNOS4_IRQ_EINT15 IRQ_SPI(31)
  42. #define EXYNOS4_IRQ_MDMA0 IRQ_SPI(33)
  43. #define EXYNOS4_IRQ_MDMA1 IRQ_SPI(34)
  44. #define EXYNOS4_IRQ_PDMA0 IRQ_SPI(35)
  45. #define EXYNOS4_IRQ_PDMA1 IRQ_SPI(36)
  46. #define EXYNOS4_IRQ_TIMER0_VIC IRQ_SPI(37)
  47. #define EXYNOS4_IRQ_TIMER1_VIC IRQ_SPI(38)
  48. #define EXYNOS4_IRQ_TIMER2_VIC IRQ_SPI(39)
  49. #define EXYNOS4_IRQ_TIMER3_VIC IRQ_SPI(40)
  50. #define EXYNOS4_IRQ_TIMER4_VIC IRQ_SPI(41)
  51. #define EXYNOS4_IRQ_MCT_L0 IRQ_SPI(42)
  52. #define EXYNOS4_IRQ_WDT IRQ_SPI(43)
  53. #define EXYNOS4_IRQ_RTC_ALARM IRQ_SPI(44)
  54. #define EXYNOS4_IRQ_RTC_TIC IRQ_SPI(45)
  55. #define EXYNOS4_IRQ_GPIO_XB IRQ_SPI(46)
  56. #define EXYNOS4_IRQ_GPIO_XA IRQ_SPI(47)
  57. #define EXYNOS4_IRQ_MCT_L1 IRQ_SPI(48)
  58. #define EXYNOS4_IRQ_UART0 IRQ_SPI(52)
  59. #define EXYNOS4_IRQ_UART1 IRQ_SPI(53)
  60. #define EXYNOS4_IRQ_UART2 IRQ_SPI(54)
  61. #define EXYNOS4_IRQ_UART3 IRQ_SPI(55)
  62. #define EXYNOS4_IRQ_UART4 IRQ_SPI(56)
  63. #define EXYNOS4_IRQ_MCT_G0 IRQ_SPI(57)
  64. #define EXYNOS4_IRQ_IIC IRQ_SPI(58)
  65. #define EXYNOS4_IRQ_IIC1 IRQ_SPI(59)
  66. #define EXYNOS4_IRQ_IIC2 IRQ_SPI(60)
  67. #define EXYNOS4_IRQ_IIC3 IRQ_SPI(61)
  68. #define EXYNOS4_IRQ_IIC4 IRQ_SPI(62)
  69. #define EXYNOS4_IRQ_IIC5 IRQ_SPI(63)
  70. #define EXYNOS4_IRQ_IIC6 IRQ_SPI(64)
  71. #define EXYNOS4_IRQ_IIC7 IRQ_SPI(65)
  72. #define EXYNOS4_IRQ_SPI0 IRQ_SPI(66)
  73. #define EXYNOS4_IRQ_SPI1 IRQ_SPI(67)
  74. #define EXYNOS4_IRQ_SPI2 IRQ_SPI(68)
  75. #define EXYNOS4_IRQ_USB_HOST IRQ_SPI(70)
  76. #define EXYNOS4_IRQ_USB_HSOTG IRQ_SPI(71)
  77. #define EXYNOS4_IRQ_MODEM_IF IRQ_SPI(72)
  78. #define EXYNOS4_IRQ_HSMMC0 IRQ_SPI(73)
  79. #define EXYNOS4_IRQ_HSMMC1 IRQ_SPI(74)
  80. #define EXYNOS4_IRQ_HSMMC2 IRQ_SPI(75)
  81. #define EXYNOS4_IRQ_HSMMC3 IRQ_SPI(76)
  82. #define EXYNOS4_IRQ_DWMCI IRQ_SPI(77)
  83. #define EXYNOS4_IRQ_MIPI_CSIS0 IRQ_SPI(78)
  84. #define EXYNOS4_IRQ_MIPI_CSIS1 IRQ_SPI(80)
  85. #define EXYNOS4_IRQ_ONENAND_AUDI IRQ_SPI(82)
  86. #define EXYNOS4_IRQ_ROTATOR IRQ_SPI(83)
  87. #define EXYNOS4_IRQ_FIMC0 IRQ_SPI(84)
  88. #define EXYNOS4_IRQ_FIMC1 IRQ_SPI(85)
  89. #define EXYNOS4_IRQ_FIMC2 IRQ_SPI(86)
  90. #define EXYNOS4_IRQ_FIMC3 IRQ_SPI(87)
  91. #define EXYNOS4_IRQ_JPEG IRQ_SPI(88)
  92. #define EXYNOS4_IRQ_2D IRQ_SPI(89)
  93. #define EXYNOS4_IRQ_PCIE IRQ_SPI(90)
  94. #define EXYNOS4_IRQ_MIXER IRQ_SPI(91)
  95. #define EXYNOS4_IRQ_HDMI IRQ_SPI(92)
  96. #define EXYNOS4_IRQ_IIC_HDMIPHY IRQ_SPI(93)
  97. #define EXYNOS4_IRQ_MFC IRQ_SPI(94)
  98. #define EXYNOS4_IRQ_SDO IRQ_SPI(95)
  99. #define EXYNOS4_IRQ_AUDIO_SS IRQ_SPI(96)
  100. #define EXYNOS4_IRQ_I2S0 IRQ_SPI(97)
  101. #define EXYNOS4_IRQ_I2S1 IRQ_SPI(98)
  102. #define EXYNOS4_IRQ_I2S2 IRQ_SPI(99)
  103. #define EXYNOS4_IRQ_AC97 IRQ_SPI(100)
  104. #define EXYNOS4_IRQ_SPDIF IRQ_SPI(104)
  105. #define EXYNOS4_IRQ_ADC0 IRQ_SPI(105)
  106. #define EXYNOS4_IRQ_PEN0 IRQ_SPI(106)
  107. #define EXYNOS4_IRQ_ADC1 IRQ_SPI(107)
  108. #define EXYNOS4_IRQ_PEN1 IRQ_SPI(108)
  109. #define EXYNOS4_IRQ_KEYPAD IRQ_SPI(109)
  110. #define EXYNOS4_IRQ_PMU IRQ_SPI(110)
  111. #define EXYNOS4_IRQ_GPS IRQ_SPI(111)
  112. #define EXYNOS4_IRQ_INTFEEDCTRL_SSS IRQ_SPI(112)
  113. #define EXYNOS4_IRQ_SLIMBUS IRQ_SPI(113)
  114. #define EXYNOS4_IRQ_TSI IRQ_SPI(115)
  115. #define EXYNOS4_IRQ_SATA IRQ_SPI(116)
  116. #define EXYNOS4_IRQ_TMU_TRIG0 COMBINER_IRQ(2, 4)
  117. #define EXYNOS4_IRQ_TMU_TRIG1 COMBINER_IRQ(3, 4)
  118. #define EXYNOS4_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0)
  119. #define EXYNOS4_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1)
  120. #define EXYNOS4_IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2)
  121. #define EXYNOS4_IRQ_SYSMMU_FIMC1_0 COMBINER_IRQ(4, 3)
  122. #define EXYNOS4_IRQ_SYSMMU_FIMC2_0 COMBINER_IRQ(4, 4)
  123. #define EXYNOS4_IRQ_SYSMMU_FIMC3_0 COMBINER_IRQ(4, 5)
  124. #define EXYNOS4_IRQ_SYSMMU_JPEG_0 COMBINER_IRQ(4, 6)
  125. #define EXYNOS4_IRQ_SYSMMU_2D_0 COMBINER_IRQ(4, 7)
  126. #define EXYNOS4_IRQ_SYSMMU_ROTATOR_0 COMBINER_IRQ(5, 0)
  127. #define EXYNOS4_IRQ_SYSMMU_MDMA1_0 COMBINER_IRQ(5, 1)
  128. #define EXYNOS4_IRQ_SYSMMU_LCD0_M0_0 COMBINER_IRQ(5, 2)
  129. #define EXYNOS4_IRQ_SYSMMU_LCD1_M1_0 COMBINER_IRQ(5, 3)
  130. #define EXYNOS4_IRQ_SYSMMU_TV_M0_0 COMBINER_IRQ(5, 4)
  131. #define EXYNOS4_IRQ_SYSMMU_MFC_M0_0 COMBINER_IRQ(5, 5)
  132. #define EXYNOS4_IRQ_SYSMMU_MFC_M1_0 COMBINER_IRQ(5, 6)
  133. #define EXYNOS4_IRQ_SYSMMU_PCIE_0 COMBINER_IRQ(5, 7)
  134. #define EXYNOS4_IRQ_SYSMMU_FIMC_LITE0_0 COMBINER_IRQ(16, 0)
  135. #define EXYNOS4_IRQ_SYSMMU_FIMC_LITE1_0 COMBINER_IRQ(16, 1)
  136. #define EXYNOS4_IRQ_SYSMMU_FIMC_ISP_0 COMBINER_IRQ(16, 2)
  137. #define EXYNOS4_IRQ_SYSMMU_FIMC_DRC_0 COMBINER_IRQ(16, 3)
  138. #define EXYNOS4_IRQ_SYSMMU_FIMC_FD_0 COMBINER_IRQ(16, 4)
  139. #define EXYNOS4_IRQ_SYSMMU_FIMC_CX_0 COMBINER_IRQ(16, 5)
  140. #define EXYNOS4_IRQ_FIMD0_FIFO COMBINER_IRQ(11, 0)
  141. #define EXYNOS4_IRQ_FIMD0_VSYNC COMBINER_IRQ(11, 1)
  142. #define EXYNOS4_IRQ_FIMD0_SYSTEM COMBINER_IRQ(11, 2)
  143. #define EXYNOS4_MAX_COMBINER_NR 16
  144. #define EXYNOS4_IRQ_GPIO1_NR_GROUPS 16
  145. #define EXYNOS4_IRQ_GPIO2_NR_GROUPS 9
  146. /*
  147. * For Compatibility:
  148. * the default is for EXYNOS4, and
  149. * for exynos5, should be re-mapped at function
  150. */
  151. #define IRQ_TIMER0_VIC EXYNOS4_IRQ_TIMER0_VIC
  152. #define IRQ_TIMER1_VIC EXYNOS4_IRQ_TIMER1_VIC
  153. #define IRQ_TIMER2_VIC EXYNOS4_IRQ_TIMER2_VIC
  154. #define IRQ_TIMER3_VIC EXYNOS4_IRQ_TIMER3_VIC
  155. #define IRQ_TIMER4_VIC EXYNOS4_IRQ_TIMER4_VIC
  156. #define IRQ_WDT EXYNOS4_IRQ_WDT
  157. #define IRQ_RTC_ALARM EXYNOS4_IRQ_RTC_ALARM
  158. #define IRQ_RTC_TIC EXYNOS4_IRQ_RTC_TIC
  159. #define IRQ_GPIO_XB EXYNOS4_IRQ_GPIO_XB
  160. #define IRQ_GPIO_XA EXYNOS4_IRQ_GPIO_XA
  161. #define IRQ_IIC EXYNOS4_IRQ_IIC
  162. #define IRQ_IIC1 EXYNOS4_IRQ_IIC1
  163. #define IRQ_IIC3 EXYNOS4_IRQ_IIC3
  164. #define IRQ_IIC5 EXYNOS4_IRQ_IIC5
  165. #define IRQ_IIC6 EXYNOS4_IRQ_IIC6
  166. #define IRQ_IIC7 EXYNOS4_IRQ_IIC7
  167. #define IRQ_SPI0 EXYNOS4_IRQ_SPI0
  168. #define IRQ_SPI1 EXYNOS4_IRQ_SPI1
  169. #define IRQ_SPI2 EXYNOS4_IRQ_SPI2
  170. #define IRQ_USB_HOST EXYNOS4_IRQ_USB_HOST
  171. #define IRQ_OTG EXYNOS4_IRQ_USB_HSOTG
  172. #define IRQ_HSMMC0 EXYNOS4_IRQ_HSMMC0
  173. #define IRQ_HSMMC1 EXYNOS4_IRQ_HSMMC1
  174. #define IRQ_HSMMC2 EXYNOS4_IRQ_HSMMC2
  175. #define IRQ_HSMMC3 EXYNOS4_IRQ_HSMMC3
  176. #define IRQ_MIPI_CSIS0 EXYNOS4_IRQ_MIPI_CSIS0
  177. #define IRQ_ONENAND_AUDI EXYNOS4_IRQ_ONENAND_AUDI
  178. #define IRQ_FIMC0 EXYNOS4_IRQ_FIMC0
  179. #define IRQ_FIMC1 EXYNOS4_IRQ_FIMC1
  180. #define IRQ_FIMC2 EXYNOS4_IRQ_FIMC2
  181. #define IRQ_FIMC3 EXYNOS4_IRQ_FIMC3
  182. #define IRQ_JPEG EXYNOS4_IRQ_JPEG
  183. #define IRQ_2D EXYNOS4_IRQ_2D
  184. #define IRQ_MIXER EXYNOS4_IRQ_MIXER
  185. #define IRQ_HDMI EXYNOS4_IRQ_HDMI
  186. #define IRQ_IIC_HDMIPHY EXYNOS4_IRQ_IIC_HDMIPHY
  187. #define IRQ_MFC EXYNOS4_IRQ_MFC
  188. #define IRQ_SDO EXYNOS4_IRQ_SDO
  189. #define IRQ_I2S0 EXYNOS4_IRQ_I2S0
  190. #define IRQ_ADC EXYNOS4_IRQ_ADC0
  191. #define IRQ_TC EXYNOS4_IRQ_PEN0